[llvm] 3a7c82e - [DAG] isGuaranteedNotToBeUndefOrPoison - handle ISD::BUILD_VECTOR nodes
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 31 07:08:43 PDT 2021
Author: Simon Pilgrim
Date: 2021-07-31T15:08:25+01:00
New Revision: 3a7c82efb8db57f0bf1cfbbd681b3905556bd049
URL: https://github.com/llvm/llvm-project/commit/3a7c82efb8db57f0bf1cfbbd681b3905556bd049
DIFF: https://github.com/llvm/llvm-project/commit/3a7c82efb8db57f0bf1cfbbd681b3905556bd049.diff
LOG: [DAG] isGuaranteedNotToBeUndefOrPoison - handle ISD::BUILD_VECTOR nodes
If all demanded elements of the BUILD_VECTOR pass a isGuaranteedNotToBeUndefOrPoison check, then we can treat this specific demanded use of the BUILD_VECTOR as guaranteed not to be undef or poison either.
Differential Revision: https://reviews.llvm.org/D107174
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/test/CodeGen/X86/freeze-constant-fold.ll
llvm/test/CodeGen/X86/freeze-legalize.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 2a98464425c40..1450bf0eafca3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4285,7 +4285,17 @@ bool SelectionDAG::isGuaranteedNotToBeUndefOrPoison(SDValue Op,
case ISD::UNDEF:
return PoisonOnly;
- // TODO: ISD::BUILD_VECTOR handling
+ case ISD::BUILD_VECTOR:
+ // NOTE: BUILD_VECTOR has implicit truncation of wider scalar elements -
+ // this shouldn't affect the result.
+ for (unsigned i = 0, e = Op.getNumOperands(); i < e; ++i) {
+ if (!DemandedElts[i])
+ continue;
+ if (!isGuaranteedNotToBeUndefOrPoison(Op.getOperand(i), PoisonOnly,
+ Depth + 1))
+ return false;
+ }
+ return true;
// TODO: Search for noundef attributes from library functions.
diff --git a/llvm/test/CodeGen/X86/freeze-constant-fold.ll b/llvm/test/CodeGen/X86/freeze-constant-fold.ll
index 552921918709c..6c22d855e79fe 100644
--- a/llvm/test/CodeGen/X86/freeze-constant-fold.ll
+++ b/llvm/test/CodeGen/X86/freeze-constant-fold.ll
@@ -15,7 +15,6 @@ define i32 @fold_add_freeze_i32() {
ret i32 %5
}
-; FIXME: X86 scalarization sees through the freeze, but vector types don't.
define <4 x i32> @fold_add_freeze_v4i32() {
; X86-LABEL: fold_add_freeze_v4i32:
; X86: # %bb.0:
@@ -28,9 +27,7 @@ define <4 x i32> @fold_add_freeze_v4i32() {
;
; X64-LABEL: fold_add_freeze_v4i32:
; X64: # %bb.0:
-; X64-NEXT: pxor %xmm1, %xmm1
; X64-NEXT: pcmpeqd %xmm0, %xmm0
-; X64-NEXT: paddd %xmm1, %xmm0
; X64-NEXT: retq
%1 = insertelement <4 x i32> poison, i32 0, i32 0
%2 = shufflevector <4 x i32> %1, <4 x i32> poison, <4 x i32> zeroinitializer
diff --git a/llvm/test/CodeGen/X86/freeze-legalize.ll b/llvm/test/CodeGen/X86/freeze-legalize.ll
index 4fe60bc4cce6c..788ce154dfdce 100644
--- a/llvm/test/CodeGen/X86/freeze-legalize.ll
+++ b/llvm/test/CodeGen/X86/freeze-legalize.ll
@@ -46,7 +46,7 @@ define i10 @promote() {
define <2 x i10> @promote_vec() {
; CHECK-LABEL: promote_vec:
; CHECK: ## %bb.0:
-; CHECK-NEXT: movw $1674, %ax ## imm = 0x68A
+; CHECK-NEXT: movw $650, %ax ## imm = 0x28A
; CHECK-NEXT: movw $518, %dx ## imm = 0x206
; CHECK-NEXT: retl
%a = freeze <2 x i10> <i10 682, i10 125>
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