[PATCH] D106900: [PowerPC][AIX] Packed zero-width bitfields do not affect alignment.

[Steven Wan via Phabricator via llvm-commits]

stevewan accepted this revision.
stevewan added a comment.
This revision is now accepted and ready to land.

LGTM with some nits.



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Comment at: clang/lib/AST/RecordLayoutBuilder.cpp:1781
-  // pragma align(packed).
-  if (isAIXLayout(Context) && !MaxFieldAlignment.isZero() && !FieldSize)
-    FieldAlign = std::min(FieldAlign, MaxFieldAlignmentInBits);
----------------
Just noting that the comment says `MaxFieldAlignment - The maximum allowed field alignment. This is set by #pragma pack`, but `__attribute__(packed)` also seems to set it to some large value that is at least as large as the FieldAlign. Maybe edit the comment accordingly for now, and a future follow-on patch if necessary.


================
Comment at: clang/test/Layout/aix-packed-bitfields.c:95
+
+#pragma pack(2)
+struct __attribute__((packed)) PackedAttrAndPragma {
----------------
nit: might be helpful to use a different type for the zero-width bitfield here. (e.g., `long long : 0`


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