[llvm] d4a2daa - [ARM] Define a couple more ssub indexes. NFC

[David Green via llvm-commits]

Author: David Green
Date: 2021-07-29T23:00:35+01:00
New Revision: d4a2daa919272081582c6c14141dd57a6eab9832

URL: https://github.com/llvm/llvm-project/commit/d4a2daa919272081582c6c14141dd57a6eab9832
DIFF: https://github.com/llvm/llvm-project/commit/d4a2daa919272081582c6c14141dd57a6eab9832.diff

LOG: [ARM] Define a couple more ssub indexes. NFC

Same as 91bd3ad128f7b3b28bd98242e9a5df214eb04eea, this doesn't really
change anything but gives the registers better names than the ones
tablegen would define. And fills in the missing gaps.

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMRegisterInfo.td

Removed: 
    


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diff  --git a/llvm/lib/Target/ARM/ARMRegisterInfo.td b/llvm/lib/Target/ARM/ARMRegisterInfo.td
index b37988232127f..93f3b75823480 100644
--- a/llvm/lib/Target/ARM/ARMRegisterInfo.td
+++ b/llvm/lib/Target/ARM/ARMRegisterInfo.td
@@ -66,6 +66,8 @@ def ssub_10 : ComposedSubRegIndex<dsub_5, ssub_0>;
 def ssub_11 : ComposedSubRegIndex<dsub_5, ssub_1>;
 def ssub_12 : ComposedSubRegIndex<dsub_6, ssub_0>;
 def ssub_13 : ComposedSubRegIndex<dsub_6, ssub_1>;
+def ssub_14 : ComposedSubRegIndex<dsub_7, ssub_0>;
+def ssub_15 : ComposedSubRegIndex<dsub_7, ssub_1>;
 
 def gsub_0 : SubRegIndex<32>;
 def gsub_1 : SubRegIndex<32, 32>;