[PATCH] D106601: [RISCV] Teach vsetvli insertion pass that it doesn't need to insert vsetvli for unit strided stores in some cases.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 362432.
craig.topper added a comment.

-Add loads
-Add strided loads/stores
-Add missing check for AVL being the same.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106601/new/

https://reviews.llvm.org/D106601

Files:
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll

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