[PATCH] D98002: [RISCV] Add scheduling resources for V

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 27 15:46:36 PDT 2021


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:859
+def VSE1_V : VUnitStrideStoreMask<"vse1.v">,
+             Sched<[WriteVSTM, ReadVSTM, ReadVLDX]>;
+
----------------
Should ReadVLDX be ReadVSTX for VSE1_V?


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:1372
+                      "vpopc.m", "$vd, $vs2$vm">,
+              Sched<[WriteVMPopV, ReadVMPopV, ReadVMPopV]>;
 
----------------
Should the last be ReadVMask?


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:1378
+                       "vfirst.m", "$vd, $vs2$vm">,
+              Sched<[WriteVMFFSV, ReadVMFFSV, ReadVMFFSV]>;
+
----------------
Should the last be ReadVMask?


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:1401
+                    (ins VMaskOp:$vm), "vid.v", "$vd$vm">,
+            Sched<[WriteVMIdxV, ReadVMIdxV]>;
 
----------------
Why is this ReadVMIdxV and not ReadVMask?


================
Comment at: llvm/lib/Target/RISCV/RISCVScheduleV.td:90
+def WriteVExtV        : SchedWrite;
+def WriteVExtX        : SchedWrite;
+def WriteVExtI        : SchedWrite;
----------------
There are no X or I forms for extensions are there?


================
Comment at: llvm/lib/Target/RISCV/RISCVScheduleV.td:313
+def ReadVExtV         : SchedRead;
+def ReadVExtX         : SchedRead;
+// 12.4. Vector Integer Arithmetic with Carry or Borrow Instructions
----------------
Is `ReadVExtX` used?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98002/new/

https://reviews.llvm.org/D98002



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