[llvm] a11d9a1 - [AArch64][GlobalISel] Fix constraining LDXPX intrinsic selection.

[Amara Emerson via llvm-commits]

Author: Amara Emerson
Date: 2021-07-27T12:13:56-07:00
New Revision: a11d9a1f480ff83f98c550a6139637ff69c9c07c

URL: https://github.com/llvm/llvm-project/commit/a11d9a1f480ff83f98c550a6139637ff69c9c07c
DIFF: https://github.com/llvm/llvm-project/commit/a11d9a1f480ff83f98c550a6139637ff69c9c07c.diff

LOG: [AArch64][GlobalISel] Fix constraining LDXPX intrinsic selection.

Causes a fallback because of lack of regclasses on vregs, unless its without
asserts, where we end up crashing later in codegen.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index f4525e73e590e..a98248438e401 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -5042,6 +5042,7 @@ bool AArch64InstructionSelector::selectIntrinsicWithSideEffects(
         {I.getOperand(0).getReg(), I.getOperand(1).getReg()},
         {I.getOperand(3)});
     NewI.cloneMemRefs(I);
+    constrainSelectedInstRegOperands(*NewI, TII, TRI, RBI);
     break;
   }
   case Intrinsic::trap: