[PATCH] D105347: [AMDGPU][GlobalISel] Legalization of G_ROTL and G_ROTR

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 27 09:17:04 PDT 2021


foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:2762
+  if (MI.getOpcode() == TargetOpcode::G_ROTL) {
+    LLT DstTy = MRI.getType(Dst);
+    Register Zero = B.buildConstant(DstTy, 0).getReg(0);
----------------
Can we guarantee that DstTy is a power of two size here? Otherwise just negating the rotate amount does not work.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:2764
+    Register Zero = B.buildConstant(DstTy, 0).getReg(0);
+    Src1 = B.buildSub(DstTy, Zero, Src1).getReg(0);
+  }
----------------
You could implement B.buildNeg for this, similar to the existing B.buildNot.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105347/new/

https://reviews.llvm.org/D105347



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