[PATCH] D106498: AMDGPU: Treat IMPLICIT_DEF like a constant lanemask source

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 27 08:45:50 PDT 2021


arsenm closed this revision.
arsenm added a comment.

b32d3d9e81cdd9275d19cd2a396c461edc9e7189 <https://reviews.llvm.org/rGb32d3d9e81cdd9275d19cd2a396c461edc9e7189>



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Comment at: llvm/test/CodeGen/AMDGPU/lower-i1-copies-implicit-def-unstructured-loop.mir:7
+# When the phi in %bb.3 is handled, it attempted to insert instructions
+# in %bb.1 to handle this def, but ended up inserting mask management
+# instructions before the def of %34. This is avoided by treating
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ruiling wrote:
> Yes, the situation sounds a little bit awkward to handle. In fact, we can easily get another failure case by just replacing `%34 = IMPLICIT_DEF` with `%34:sreg_64 = V_CMP_EQ_U32_e64 %17:vgpr_32, 1, implicit $exec`. Could you share with me an IR reproducer for this issue? That may help me better understand the problem.
I started this patch month ago and seem to have misplaced the original reduced IR case. I could re-reduce a second case I saw


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