[PATCH] D103230: [AMDGPU] Disable NSA for BVH instructions when appropriate
Carl Ritson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 27 01:29:44 PDT 2021
critson marked 4 inline comments as done.
critson added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:4812
+ // Build a single vector containing all the operands so far prepared.
+ const unsigned LaneCount = NumVAddrs <= 8 ? 8 : 16;
+
----------------
foad wrote:
> Why do we have to round up to 8 or 16?
I cannot remember why I did this for GlobalIsel.
It certainly works without, perhaps it didn't when I first wrote this.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103230/new/
https://reviews.llvm.org/D103230
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