[llvm] 2aaf038 - [Attributor] Update check lines for all AMDGPU attributor tests
Johannes Doerfert via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 26 22:56:48 PDT 2021
Author: Johannes Doerfert
Date: 2021-07-27T00:55:26-05:00
New Revision: 2aaf038efd8cb5db4e35f8b26a0b28b6ac1bb8b1
URL: https://github.com/llvm/llvm-project/commit/2aaf038efd8cb5db4e35f8b26a0b28b6ac1bb8b1
DIFF: https://github.com/llvm/llvm-project/commit/2aaf038efd8cb5db4e35f8b26a0b28b6ac1bb8b1.diff
LOG: [Attributor] Update check lines for all AMDGPU attributor tests
I thought there was only one when I pushed
cdb4cfe8b3ce2b0c50d4855ec260eab07fe63611, these should be all (in the
CodeGen/AMDGPU folder).
Added:
Modified:
llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll b/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
index 7f940cac0c71..15225677da7c 100644
--- a/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
+++ b/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
@@ -405,12 +405,16 @@ define amdgpu_kernel void @use_flat_to_constant_addrspacecast(i32* %ptr) #1 {
}
define amdgpu_kernel void @use_is_shared(i8* %ptr) #1 {
-; HSA-LABEL: define {{[^@]+}}@use_is_shared
-; HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR11]] {
-; HSA-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(i8* [[PTR]])
-; HSA-NEXT: [[EXT:%.*]] = zext i1 [[IS_SHARED]] to i32
-; HSA-NEXT: store i32 [[EXT]], i32 addrspace(1)* undef, align 4
-; HSA-NEXT: ret void
+; AKF_HSA-LABEL: define {{[^@]+}}@use_is_shared
+; AKF_HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR11]] {
+; AKF_HSA-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(i8* [[PTR]])
+; AKF_HSA-NEXT: [[EXT:%.*]] = zext i1 [[IS_SHARED]] to i32
+; AKF_HSA-NEXT: store i32 [[EXT]], i32 addrspace(1)* undef, align 4
+; AKF_HSA-NEXT: ret void
+;
+; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_is_shared
+; ATTRIBUTOR_HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT: ret void
;
%is.shared = call i1 @llvm.amdgcn.is.shared(i8* %ptr)
%ext = zext i1 %is.shared to i32
@@ -419,12 +423,16 @@ define amdgpu_kernel void @use_is_shared(i8* %ptr) #1 {
}
define amdgpu_kernel void @use_is_private(i8* %ptr) #1 {
-; HSA-LABEL: define {{[^@]+}}@use_is_private
-; HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR11]] {
-; HSA-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(i8* [[PTR]])
-; HSA-NEXT: [[EXT:%.*]] = zext i1 [[IS_PRIVATE]] to i32
-; HSA-NEXT: store i32 [[EXT]], i32 addrspace(1)* undef, align 4
-; HSA-NEXT: ret void
+; AKF_HSA-LABEL: define {{[^@]+}}@use_is_private
+; AKF_HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR11]] {
+; AKF_HSA-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(i8* [[PTR]])
+; AKF_HSA-NEXT: [[EXT:%.*]] = zext i1 [[IS_PRIVATE]] to i32
+; AKF_HSA-NEXT: store i32 [[EXT]], i32 addrspace(1)* undef, align 4
+; AKF_HSA-NEXT: ret void
+;
+; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_is_private
+; ATTRIBUTOR_HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT: ret void
;
%is.private = call i1 @llvm.amdgcn.is.private(i8* %ptr)
%ext = zext i1 %is.private to i32
@@ -433,11 +441,16 @@ define amdgpu_kernel void @use_is_private(i8* %ptr) #1 {
}
define amdgpu_kernel void @use_alloca() #1 {
-; HSA-LABEL: define {{[^@]+}}@use_alloca
-; HSA-SAME: () #[[ATTR13:[0-9]+]] {
-; HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
-; HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
-; HSA-NEXT: ret void
+; AKF_HSA-LABEL: define {{[^@]+}}@use_alloca
+; AKF_HSA-SAME: () #[[ATTR13:[0-9]+]] {
+; AKF_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; AKF_HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
+; AKF_HSA-NEXT: ret void
+;
+; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_alloca
+; ATTRIBUTOR_HSA-SAME: () #[[ATTR13:[0-9]+]] {
+; ATTRIBUTOR_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; ATTRIBUTOR_HSA-NEXT: ret void
;
%alloca = alloca i32, addrspace(5)
store i32 0, i32 addrspace(5)* %alloca
@@ -445,14 +458,22 @@ define amdgpu_kernel void @use_alloca() #1 {
}
define amdgpu_kernel void @use_alloca_non_entry_block() #1 {
-; HSA-LABEL: define {{[^@]+}}@use_alloca_non_entry_block
-; HSA-SAME: () #[[ATTR13]] {
-; HSA-NEXT: entry:
-; HSA-NEXT: br label [[BB:%.*]]
-; HSA: bb:
-; HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
-; HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
-; HSA-NEXT: ret void
+; AKF_HSA-LABEL: define {{[^@]+}}@use_alloca_non_entry_block
+; AKF_HSA-SAME: () #[[ATTR13]] {
+; AKF_HSA-NEXT: entry:
+; AKF_HSA-NEXT: br label [[BB:%.*]]
+; AKF_HSA: bb:
+; AKF_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; AKF_HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
+; AKF_HSA-NEXT: ret void
+;
+; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_alloca_non_entry_block
+; ATTRIBUTOR_HSA-SAME: () #[[ATTR13]] {
+; ATTRIBUTOR_HSA-NEXT: entry:
+; ATTRIBUTOR_HSA-NEXT: br label [[BB:%.*]]
+; ATTRIBUTOR_HSA: bb:
+; ATTRIBUTOR_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; ATTRIBUTOR_HSA-NEXT: ret void
;
entry:
br label %bb
@@ -464,11 +485,16 @@ bb:
}
define void @use_alloca_func() #1 {
-; HSA-LABEL: define {{[^@]+}}@use_alloca_func
-; HSA-SAME: () #[[ATTR13]] {
-; HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
-; HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
-; HSA-NEXT: ret void
+; AKF_HSA-LABEL: define {{[^@]+}}@use_alloca_func
+; AKF_HSA-SAME: () #[[ATTR13]] {
+; AKF_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; AKF_HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
+; AKF_HSA-NEXT: ret void
+;
+; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_alloca_func
+; ATTRIBUTOR_HSA-SAME: () #[[ATTR13]] {
+; ATTRIBUTOR_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; ATTRIBUTOR_HSA-NEXT: ret void
;
%alloca = alloca i32, addrspace(5)
store i32 0, i32 addrspace(5)* %alloca
diff --git a/llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll b/llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
index 37fc20e5b92a..5ea0579c984a 100644
--- a/llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
+++ b/llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
@@ -21,8 +21,6 @@ define internal void @direct() {
;
; ATTRIBUTOR_GCN-LABEL: define {{[^@]+}}@direct
; ATTRIBUTOR_GCN-SAME: () #[[ATTR1:[0-9]+]] {
-; ATTRIBUTOR_GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8
-; ATTRIBUTOR_GCN-NEXT: store void ()* @indirect, void ()** [[FPTR]], align 8
; ATTRIBUTOR_GCN-NEXT: call void @indirect()
; ATTRIBUTOR_GCN-NEXT: ret void
;
diff --git a/llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll b/llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
index bb041d0f9ff5..db37347414bc 100644
--- a/llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
+++ b/llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
@@ -14,13 +14,18 @@ define internal void @indirect() {
}
define amdgpu_kernel void @test_simple_indirect_call() #0 {
-; GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
-; GCN-SAME: () #[[ATTR1:[0-9]+]] {
-; GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8
-; GCN-NEXT: store void ()* @indirect, void ()** [[FPTR]], align 8
-; GCN-NEXT: [[FP:%.*]] = load void ()*, void ()** [[FPTR]], align 8
-; GCN-NEXT: call void [[FP]]()
-; GCN-NEXT: ret void
+; AKF_GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
+; AKF_GCN-SAME: () #[[ATTR1:[0-9]+]] {
+; AKF_GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8
+; AKF_GCN-NEXT: store void ()* @indirect, void ()** [[FPTR]], align 8
+; AKF_GCN-NEXT: [[FP:%.*]] = load void ()*, void ()** [[FPTR]], align 8
+; AKF_GCN-NEXT: call void [[FP]]()
+; AKF_GCN-NEXT: ret void
+;
+; ATTRIBUTOR_GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
+; ATTRIBUTOR_GCN-SAME: () #[[ATTR1:[0-9]+]] {
+; ATTRIBUTOR_GCN-NEXT: call void @indirect()
+; ATTRIBUTOR_GCN-NEXT: ret void
;
; CHECK-LABEL: define {{[^@]+}}@test_simple_indirect_call
; CHECK-SAME: () #[[ATTR1:[0-9]+]] {
diff --git a/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll b/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
index ce25bb52edc2..55264563d5a6 100644
--- a/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
+++ b/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
@@ -43,14 +43,19 @@ define internal void @indirect() {
; GFX9-NEXT: s_swappc_b64 s[30:31], s[18:19]
; GFX9-NEXT: s_endpgm
define amdgpu_kernel void @test_simple_indirect_call() {
-; GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
-; GCN-SAME: () #[[ATTR1:[0-9]+]] {
-; GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8, addrspace(5)
-; GCN-NEXT: [[FPTR_CAST:%.*]] = addrspacecast void ()* addrspace(5)* [[FPTR]] to void ()**
-; GCN-NEXT: store void ()* @indirect, void ()** [[FPTR_CAST]], align 8
-; GCN-NEXT: [[FP:%.*]] = load void ()*, void ()** [[FPTR_CAST]], align 8
-; GCN-NEXT: call void [[FP]]()
-; GCN-NEXT: ret void
+; AKF_GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
+; AKF_GCN-SAME: () #[[ATTR1:[0-9]+]] {
+; AKF_GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8, addrspace(5)
+; AKF_GCN-NEXT: [[FPTR_CAST:%.*]] = addrspacecast void ()* addrspace(5)* [[FPTR]] to void ()**
+; AKF_GCN-NEXT: store void ()* @indirect, void ()** [[FPTR_CAST]], align 8
+; AKF_GCN-NEXT: [[FP:%.*]] = load void ()*, void ()** [[FPTR_CAST]], align 8
+; AKF_GCN-NEXT: call void [[FP]]()
+; AKF_GCN-NEXT: ret void
+;
+; ATTRIBUTOR_GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
+; ATTRIBUTOR_GCN-SAME: () #[[ATTR1:[0-9]+]] {
+; ATTRIBUTOR_GCN-NEXT: call void @indirect()
+; ATTRIBUTOR_GCN-NEXT: ret void
;
%fptr = alloca void()*, addrspace(5)
%fptr.cast = addrspacecast void()* addrspace(5)* %fptr to void()**
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