[PATCH] D106843: [IVDescriptors] Fix bug in checkOrderedReduction

[Anna Thomas via Phabricator via llvm-commits]

anna created this revision.
anna added reviewers: kmclaughlin, fhahn, reames.
Herald added a subscriber: hiraditya.
anna requested review of this revision.
Herald added a project: LLVM.

The Exit instruction passed in for checking if it's an ordered reduction need not be
an FPAdd operation. We need to bail out at that point instead of
assuming it is an FPAdd (and hence has two operands). See added testcase.
It crashes without the patch because the Exit instruction is a phi with
exactly one operand.
This latent bug was exposed by 95346ba <https://reviews.llvm.org/rG95346ba87740aabcb82cb3c8d0e722e7b86d93b7> which added support for
multi-exit loops for vectorization.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D106843

Files:
  llvm/lib/Analysis/IVDescriptors.cpp
  llvm/test/Transforms/LoopVectorize/fp-reduction-crash.ll


Index: llvm/test/Transforms/LoopVectorize/fp-reduction-crash.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/LoopVectorize/fp-reduction-crash.ll
@@ -0,0 +1,21 @@
+; REQUIRES: asserts
+; RUN: opt < %s -loop-vectorize -S | FileCheck %s
+
+; CHECK-LABEL: quux
+define void @quux() {
+bb:
+  br label %bb4
+
+bb1:                                              ; preds = %bb4
+  %tmp = phi double [ %tmp6, %bb4 ]
+  br i1 undef, label %bb4, label %bb2
+
+bb2:                                              ; preds = %bb1
+  %tmp3 = phi double [ %tmp, %bb1 ]
+  ret void
+
+bb4:                                              ; preds = %bb1, %bb
+  %tmp5 = phi double [ 1.300000e+01, %bb ], [ %tmp, %bb1 ]
+  %tmp6 = fadd double %tmp5, 1.000000e+00
+  br label %bb1
+}
Index: llvm/lib/Analysis/IVDescriptors.cpp
===================================================================
--- llvm/lib/Analysis/IVDescriptors.cpp
+++ llvm/lib/Analysis/IVDescriptors.cpp
@@ -199,16 +199,14 @@
   if (Kind != RecurKind::FAdd)
     return false;
 
-  bool IsOrdered =
-      Exit->getOpcode() == Instruction::FAdd && Exit == ExactFPMathInst;
+  if (Exit->getOpcode() != Instruction::FAdd || Exit != ExactFPMathInst)
+    return false;
 
   // The only pattern accepted is the one in which the reduction PHI
   // is used as one of the operands of the exit instruction
   auto *LHS = Exit->getOperand(0);
   auto *RHS = Exit->getOperand(1);
-  IsOrdered &= ((LHS == Phi) || (RHS == Phi));
-
-  if (!IsOrdered)
+  if (LHS != Phi && RHS != Phi)
     return false;
 
   LLVM_DEBUG(dbgs() << "LV: Found an ordered reduction: Phi: " << *Phi


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