[PATCH] D106839: GlobalISel: Have lowerLoad scalarize unaligned vectors

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 26 17:20:06 PDT 2021


arsenm created this revision.
arsenm added reviewers: aemerson, paquette, dsanders, aditya_nandakumar, bogner.
Herald added subscribers: kerbowa, hiraditya, tpr, rovka, nhaehnle, jvesely.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

This could be smarter by picking an ideal type, or at least splitting
the vector in half first. Also handles lower for non-power-of-2,
non-extending vector loads.

      

Currently this just avoids failing to legalize some odd vector AMDGPU
tests, but is a step towards removing the split logic from the
NarrowScalar logic.


https://reviews.llvm.org/D106839

Files:
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D106839.361861.patch
Type: text/x-patch
Size: 195574 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210727/11bc2c8c/attachment-0001.bin>


More information about the llvm-commits mailing list