[llvm] 2d78895 - [PowerPC] Add implicit-def RM to instructions mtfsb[01]

[Lei Huang via llvm-commits]

Author: Lei Huang
Date: 2021-07-26T14:07:08-05:00
New Revision: 2d788959edda2155398ed760d19aee84259ed814

URL: https://github.com/llvm/llvm-project/commit/2d788959edda2155398ed760d19aee84259ed814
DIFF: https://github.com/llvm/llvm-project/commit/2d788959edda2155398ed760d19aee84259ed814.diff

LOG: [PowerPC] Add implicit-def RM to instructions mtfsb[01]

This is a followup patch for D105930 to add implicit-def of RM for
mtfsb[01] instructions as per review comments.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D106603

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCInstrInfo.td
    llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll

Removed: 
    


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diff  --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 126cfeceece49..edcf1b9001626 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -3089,7 +3089,7 @@ let Uses = [RM], mayRaiseFPException = 1 in {
 
 // When FM is 30/31, we are setting the 62/63 bit of FPSCR, the implicit-def
 // RM should be set.
-let hasSideEffects = 1 in {
+let hasSideEffects = 1, Defs = [RM] in {
 def MTFSB0 : XForm_43<63, 70, (outs), (ins u5imm:$FM),
                       "mtfsb0 $FM", IIC_IntMTFSB0,
                       [(int_ppc_mtfsb0 timm:$FM)]>,

diff  --git a/llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll b/llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
index 4c72065e19127..1d9ab7e550713 100644
--- a/llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
+++ b/llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
@@ -272,15 +272,15 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
 ; CHECK-NEXT:    mffs 0
 ; CHECK-NEXT:    mtfsb1 31
 ; CHECK-NEXT:    lis 3, .LCPI0_0 at ha
-; CHECK-NEXT:    lfs 2, .LCPI0_0 at l(3)
+; CHECK-NEXT:    lfs 1, .LCPI0_0 at l(3)
 ; CHECK-NEXT:    mtfsb0 30
 ; CHECK-NEXT:    lis 3, .LCPI0_1 at ha
-; CHECK-NEXT:    fadd 1, 30, 31
+; CHECK-NEXT:    fadd 2, 30, 31
 ; CHECK-NEXT:    mtfsf 1, 0
 ; CHECK-NEXT:    lfs 0, .LCPI0_1 at l(3)
-; CHECK-NEXT:    fctiwz 1, 1
-; CHECK-NEXT:    stfd 1, 88(1)
-; CHECK-NEXT:    fcmpu 0, 30, 2
+; CHECK-NEXT:    fctiwz 2, 2
+; CHECK-NEXT:    stfd 2, 88(1)
+; CHECK-NEXT:    fcmpu 0, 30, 1
 ; CHECK-NEXT:    lwz 3, 100(1)
 ; CHECK-NEXT:    fcmpu 1, 31, 0
 ; CHECK-NEXT:    lwz 4, 92(1)