[PATCH] D98002: [RISCV] Add scheduling resources for V

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:106
+class VSXSched<int n, string o> :
+  Sched <[!cast<SchedReadWrite>("WriteVST" # o # "X" # n),
+          ReadVSTX, !cast<SchedReadWrite>("ReadVST" # o # "XV"), ReadVMask]>;
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No scheduling resource for store value?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98002/new/

https://reviews.llvm.org/D98002