[PATCH] D106561: [AArch64] Optimise min/max lowering in ISel

[Irina Dobrescu via Phabricator via llvm-commits]

Rin added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7107
+
+  if ((VT != MVT::v1i64 && VT != MVT::v2i64) ||
+      useSVEForFixedLengthVectorVT(VT, /*OverrideNEON=*/true)) {
----------------
david-arm wrote:
> dmgreen wrote:
> > Is this VT check needed?
> I think you can move this if block to the start of the function, i.e.
> 
>   unsigned Opcode = Op.getOpcode();
>   if (...) {
>     switch (Opcode) {
>     ...
>     }
>   }
> Is this VT check needed?

Nope, I'll get rid of it


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106561/new/

https://reviews.llvm.org/D106561