[PATCH] D78586: [MachineVerifier] Add more checks for registers in live-in lists.

[Sam Elliott via Phabricator via llvm-commits]

lenary added a comment.

Writing a comment here, so others know I'm looking into it: I spent some time looking at the `CodeGen/ARM/cmse-expand-bxns-ret.mir` test, and trying it from LLVM IR as well - the latter passes, and if I take the mir as printed before the relevant pass from that test, the test fails. I think this is because the `isReserved` test is different *after* regalloc, where the reserved registers are saved into the MachineRegisterInfo for the MachineFunction. I *think* serializing them when printing the MIR might solve this bug, so I'm looking into implementing that. Not sure when I'll next make progress though.


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D78586