[PATCH] D106744: [SVE] Use reg+reg addressing mode for immediate offsets.

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Jul 24 08:15:45 PDT 2021


sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.

That's a welcome improvement!



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:5025
+
+    // If we can unscale the immediate we can use the reg+reg addressing mode.
+    if (ImmOff % Size)
----------------
nit: seems a bit of an odd comment, how about:

  // To use the reg+reg addressing mode, the immediate must be scaled by the element size.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106744/new/

https://reviews.llvm.org/D106744



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