[PATCH] D89214: [X86] Add basic computeKnownBits support for X86ISD::BSR

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.
Herald added a subscriber: pengfei.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:34045
+    // TODO: Bound with input known bits?
+    Known.Zero.setBitsFrom(Log2_32(BitWidth));
+    break;
----------------
craig.topper wrote:
> RKSimon wrote:
> > I'm a bit worried about not handling the src==0 undef case - how well does this work if we guarded it with a KnownNeverZero check?
> The case I was trying to fix was this cross basic block case from the OPTIMIZE version of https://skanthak.homepage.t-online.de/llvm.html#case21
> 
> I doubt KnownNeverZero would work since its control flow dependent and it looks like the SelectionDAG implementation is only handles non-zero constants or an OR involving a non-zero constant.
Sorry - I forgot about this! I think you're right in that in all the cases where X86ISD::BSR is generated, we have suitable zero-input handling in place - either we already treat this as CTLZ_ZERO_UNDEF (which computeknownbits already reports the same result for) or its part of an CTLZ and LowerCTLZ added zero-input wrapping already.

I'd feel better with a bit more of an explanation comment about our assumptions, but otherwise looks ok.


Repository:
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  https://reviews.llvm.org/D89214/new/

https://reviews.llvm.org/D89214