[PATCH] D106679: [WIP][X86] Move shl(x, 1) -> add(x, x) vector fold to ISEL (PR50468)

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/X86/stack-folding-int-avx512.ll:6315
 ; CHECK-NEXT:    #NO_APP
-; CHECK-NEXT:    vpslld $1, {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Folded Reload
+; CHECK-NEXT:    vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
+; CHECK-NEXT:    vpaddd %zmm0, %zmm0, %zmm0
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This is a bit sad. Would it make sense to convert add back to shift when folding a load?


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  https://reviews.llvm.org/D106679/new/

https://reviews.llvm.org/D106679