[PATCH] D106634: [X86] Fix a bug in TEST with immediate creation

[Craig Topper via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGcc6d302c91ba: [X86] Fix a bug in TEST with immediate creation (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106634/new/

https://reviews.llvm.org/D106634

Files:
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/test/CodeGen/X86/pr51175.ll


Index: llvm/test/CodeGen/X86/pr51175.ll
===================================================================
--- llvm/test/CodeGen/X86/pr51175.ll
+++ llvm/test/CodeGen/X86/pr51175.ll
@@ -15,7 +15,7 @@
 ; CHECK-NEXT:    andl $65527, %eax # imm = 0xFFF7
 ; CHECK-NEXT:    movl %eax, (%rdx)
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    testl $-9, %edi
+; CHECK-NEXT:    testb $-9, %dil
 ; CHECK-NEXT:    cmovel %esi, %eax
 ; CHECK-NEXT:    retq
   %4 = add i16 %0, 1
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -5446,6 +5446,9 @@
       ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
       if (!C) break;
       uint64_t Mask = C->getZExtValue();
+      // We may have looked through a truncate so mask off any bits that
+      // shouldn't be part of the compare.
+      Mask &= maskTrailingOnes<uint64_t>(CmpVT.getScalarSizeInBits());
 
       // Check if we can replace AND+IMM64 with a shift. This is possible for
       // masks/ like 0xFF000000 or 0x00FFFFFF and if we care only about the zero


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