[PATCH] D106347: [PoC][RISCV] Encode arch information in a new module flag meatadata 'riscv-isa-bits'.
Zakk Chen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 22 01:01:05 PDT 2021
khchen updated this revision to Diff 360723.
khchen added a comment.
store target-features string as module flag.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D106347/new/
https://reviews.llvm.org/D106347
Files:
clang/lib/CodeGen/CodeGenModule.cpp
clang/test/CodeGen/RISCV/riscv-metadata-isa-features-empty-target-feature.cpp
clang/test/CodeGen/RISCV/riscv-metadata-isa-features-ifunc.c
clang/test/CodeGen/RISCV/riscv-metadata-isa-features.c
llvm/include/llvm/Support/RISCVISAInfo.h
llvm/lib/Support/RISCVISAInfo.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
llvm/test/CodeGen/RISCV/riscv-isa-features.ll
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