[PATCH] D106498: AMDGPU: Treat IMPLICIT_DEF like a constant lanemask source
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 21 14:29:03 PDT 2021
arsenm created this revision.
arsenm added reviewers: sameerds, nhaehnle, foad, ruiling.
Herald added subscribers: kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, jvesely, kzhuravl.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.
This is partially a workaround. SILowerI1Copies does not understand
unstructured loops. This would result in inserting instructions to
merge a mask register in the same block where it was defined in an
unstructured loop. This is also a small code improvement.
https://reviews.llvm.org/D106498
Files:
llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
llvm/test/CodeGen/AMDGPU/loop_break.ll
llvm/test/CodeGen/AMDGPU/lower-i1-copies-implicit-def-unstructured-loop.mir
llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
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