[PATCH] D106447: [DAGCombine] DAGTypeLegalizer::GenWidenVectorLoads(): make use of dereferenceability knowledge

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:5336
+      NumDereferenceableBytes = std::max<unsigned>(
+          NumDereferenceableBytes, cast<LoadSDNode>(LdOp)->getAlignment());
+    } else
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lebedev.ri wrote:
> Ugh, actually, this is still not quite right, because it should be the alignment of the load we will produce now, not of the one we just produced.
This is rather horrible :(


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D106447/new/

https://reviews.llvm.org/D106447