[llvm] d0af732 - [AArch64][GlobalISel] Widen s2 and s4 G_IMPLICIT_DEF + G_FREEZE

[Jessica Paquette via llvm-commits]

Author: Jessica Paquette
Date: 2021-07-21T12:59:20-07:00
New Revision: d0af732bd00c0390fbcc6f900e8a59eb3954106c

URL: https://github.com/llvm/llvm-project/commit/d0af732bd00c0390fbcc6f900e8a59eb3954106c
DIFF: https://github.com/llvm/llvm-project/commit/d0af732bd00c0390fbcc6f900e8a59eb3954106c.diff

LOG: [AArch64][GlobalISel] Widen s2 and s4 G_IMPLICIT_DEF + G_FREEZE

These had

```
.clampScalar(0, s1, 64)
.widenScalarToNextPow2(0, 8)
```

If you have s2 or s4, then `widenScalarToNextPow2` does nothing.

This changes the `widenScalarToNextPow2` rule to use s8 as the minimum type
instead, allowing us to correctly widen s2 and s4.

This does not impact s1, since it's marked as legal already.

Differential Revision: https://reviews.llvm.org/D106413

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index caa8bf6f7f73..e2788276a936 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -80,7 +80,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
   getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_FREEZE})
       .legalFor({p0, s1, s8, s16, s32, s64})
       .legalFor(PackedVectorAllTypeList)
-      .clampScalar(0, s1, s64)
+      .clampScalar(0, s8, s64)
       .widenScalarToNextPow2(0, 8)
       .fewerElementsIf(
           [=](const LegalityQuery &Query) {

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
index f6c15ec4925d..ba4988572360 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
@@ -85,3 +85,35 @@ body: |
     $w0 = COPY %1
     $w1 = COPY %2
 ...
+---
+name:            test_freeze_s1
+body: |
+  bb.0.entry:
+    liveins: $x0
+    ; CHECK-LABEL: name: test_freeze_s1
+    ; CHECK: %x:_(s1) = G_IMPLICIT_DEF
+    ; CHECK: %freeze:_(s1) = G_FREEZE %x
+    ; CHECK: %ext:_(s64) = G_ZEXT %freeze(s1)
+    ; CHECK: $x0 = COPY %ext(s64)
+    %x:_(s1) = G_IMPLICIT_DEF
+    %freeze:_(s1) = G_FREEZE %x
+    %ext:_(s64) = G_ZEXT %freeze
+    $x0 = COPY %ext(s64)
+...
+---
+name:            test_freeze_s2
+body: |
+  bb.0.entry:
+    liveins: $x0
+    ; CHECK-LABEL: name: test_freeze_s2
+    ; CHECK: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
+    ; CHECK: [[COPY:%[0-9]+]]:_(s8) = COPY [[DEF]](s8)
+    ; CHECK: [[FREEZE:%[0-9]+]]:_(s8) = G_FREEZE [[COPY]]
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
+    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[FREEZE]](s8)
+    ; CHECK: %ext:_(s64) = G_AND [[ANYEXT]], [[C]]
+    ; CHECK: $x0 = COPY %ext(s64)
+    %x:_(s2) = G_IMPLICIT_DEF
+    %freeze:_(s2) = G_FREEZE %x
+    %ext:_(s64) = G_ZEXT %freeze
+    $x0 = COPY %ext(s64)