[PATCH] D106447: [DAGCombine] DAGTypeLegalizer::GenWidenVectorLoads(): make use of dereferenceability knowledge

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


================
Comment at: llvm/test/CodeGen/X86/widen_load-3.ll:118
 ; X64-AVX-NEXT:    vmovups (%rsi), %ymm0
+; X64-AVX-NEXT:    vmovups 48(%rsi), %xmm1
+; X64-AVX-NEXT:    vmovlps %xmm1, 48(%rdi)
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How are we proving this transform is legal?


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D106447