[PATCH] D106447: [DAGCombine] DAGTypeLegalizer::GenWidenVectorLoads(): make use of dereferenceability knowledge

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 21 09:24:05 PDT 2021


lebedev.ri added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:5334
+      NewVT = FindMemType(DAG, TLI, LdWidth.getKnownMinSize(), WidenVT,
+                          NumDereferenecableBytes, WidthDiff.getKnownMinSize());
       NewVTWidth = NewVT.getSizeInBits();
----------------
RKSimon wrote:
> do we have to reduce NumDereferenecableBytes in the loop?
Oh, hmm, yes i do believe we do indeed, good spot!


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106447/new/

https://reviews.llvm.org/D106447



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