[llvm] 6955148 - [ms] [llvm-ml] Restrict implicit RIP-relative addressing to named-variable references

[Eric Astor via llvm-commits]

Author: Eric Astor
Date: 2021-07-21T11:49:58-04:00
New Revision: 69551486fd352e52bd1cfeffc258cf95044d3080

URL: https://github.com/llvm/llvm-project/commit/69551486fd352e52bd1cfeffc258cf95044d3080
DIFF: https://github.com/llvm/llvm-project/commit/69551486fd352e52bd1cfeffc258cf95044d3080.diff

LOG: [ms] [llvm-ml] Restrict implicit RIP-relative addressing to named-variable references

ML64.EXE applies implicit RIP-relative addressing only to memory references that include a named-variable reference.

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D105372

Added: 
    

Modified: 
    llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/test/tools/llvm-ml/rip-relative-addressing.asm

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 00d9d195fb57a..67ca67d6cee6f 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -2594,9 +2594,9 @@ bool X86AsmParser::ParseIntelOperand(OperandVector &Operands) {
                                    End, Size, SM.getSymName(),
                                    SM.getIdentifierInfo(), Operands);
 
-  // When parsing x64 MS-style assembly, all memory operands default to
-  // RIP-relative when interpreted as non-absolute references.
-  if (Parser.isParsingMasm() && is64BitMode()) {
+  // When parsing x64 MS-style assembly, all non-absolute references to a named
+  // variable default to RIP-relative.
+  if (Parser.isParsingMasm() && is64BitMode() && SM.getElementSize() > 0) {
     Operands.push_back(X86Operand::CreateMem(getPointerWidth(), RegNo, Disp,
                                              BaseReg, IndexReg, Scale, Start,
                                              End, Size,

diff  --git a/llvm/test/tools/llvm-ml/rip-relative-addressing.asm b/llvm/test/tools/llvm-ml/rip-relative-addressing.asm
index 8e8c63cb54a34..d237e84435b7d 100644
--- a/llvm/test/tools/llvm-ml/rip-relative-addressing.asm
+++ b/llvm/test/tools/llvm-ml/rip-relative-addressing.asm
@@ -1,8 +1,56 @@
-; RUN: llvm-ml -m32 -filetype=s %s /Fo - | FileCheck %s --check-prefix=CHECK-32
-; RUN: llvm-ml -m64 -filetype=s %s /Fo - | FileCheck %s --check-prefix=CHECK-64
+; RUN: llvm-ml -m32 -filetype=s %s /Fo - | FileCheck %s --check-prefixes=CHECK,CHECK-32
+; RUN: llvm-ml -m64 -filetype=s %s /Fo - | FileCheck %s --check-prefixes=CHECK,CHECK-64
+
+.data
+foo DWORD 28
+
+bar:
+DWORD 29
 
 .code
+
+t1:
+mov eax, foo
+; CHECK-LABEL: t1:
+; CHECK-32: mov eax, dword ptr [foo]
+; CHECK-64: mov eax, dword ptr [rip + foo]
+
+t2:
+mov eax, [foo]
+; CHECK-LABEL: t2:
+; CHECK-32: mov eax, dword ptr [foo]
+; CHECK-64: mov eax, dword ptr [rip + foo]
+
+t3:
+mov eax, [foo+2]
+; CHECK-LABEL: t3:
+; CHECK-32: mov eax, dword ptr [foo+2]
+; CHECK-64: mov eax, dword ptr [rip + foo+2]
+
+t4:
+mov eax, [2+foo]
+; CHECK-LABEL: t4:
+; CHECK-32: mov eax, dword ptr [foo+2]
+; CHECK-64: mov eax, dword ptr [rip + foo+2]
+
+t5:
 mov eax, [4]
-; CHECK-32: mov eax, dword ptr [4]
-; CHECK-64: mov eax, dword ptr [rip + 4]
+; CHECK-LABEL: t5:
+; CHECK: mov eax, dword ptr [4]
+
+t6:
+mov eax, [foo+ebx]
+; CHECK-LABEL: t6:
+; CHECK: mov eax, dword ptr [ebx + foo]
+
+t7:
+mov eax, [bar]
+; CHECK-LABEL: t7:
+; CHECK: mov eax, dword ptr [bar]
+
+t8:
+mov eax, [t8]
+; CHECK-LABEL: t8:
+; CHECK: mov eax, dword ptr [t8]
+
 END
\ No newline at end of file