[PATCH] D106176: [Scheduler] Treat weak edges uniformly at entry
Carl Ritson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 20 19:21:05 PDT 2021
critson added a comment.
In D106176#2890256 <https://reviews.llvm.org/D106176#2890256>, @Joe_Nash wrote:
> In D106176#2889833 <https://reviews.llvm.org/D106176#2889833>, @fhahn wrote:
>
>> Is it possible to add a test case?
>
> Do you know a way to create a synthetic schedule DAG for testing? Without that, I would say no, since I don't think we want to create a new schedule mutator purely for testing purposes?
It will be a little bit tedious, but you can create a new unittest under `llvm/unittests/CodeGen`.
One approach may be to parse some MIR (for an example see `MI/LiveIntervalTest.cpp`).
Then add a simple DAG mutation to a custom instance of the PostRA scheduler and apply it.
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https://reviews.llvm.org/D106176/new/
https://reviews.llvm.org/D106176
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