[PATCH] D106353: [PowerPC] use lfiwax/lfiwzx for scalar_to_vector + load at PWR7

Nemanja Ivanovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 20 18:46:39 PDT 2021


nemanjai requested changes to this revision.
nemanjai added a comment.
This revision now requires changes to proceed.

I don't think this is actually correct.



================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10519
+
+  auto FoldScalarToVector = [&]() {
+    // If we are on targets which has VSX and P8 Vector, don't waste time here.
----------------
Is this expected to have further uses in the future? Defining a lambda with all the implementation in it and then simply calling it once seems like a very strange idiom.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10540
+
+    return DAG.getMemIntrinsicNode(Opcode, dl, DAG.getVTList(VT, MVT::Other),
+                                   {LD->getChain(), LD->getBasePtr()}, MVT::i32,
----------------
I think this is incorrect for little endian systems since on LE, `LFIW[AZ]X` will put the value into an element that is not element zero.


================
Comment at: llvm/test/CodeGen/PowerPC/load-and-splat.ll:62
+; P7-NEXT:    lfiwzx f0, 0, r4
 ; P7-NEXT:    xxspltw vs0, vs0, 0
 ; P7-NEXT:    stxvw4x vs0, 0, r3
----------------
This looks wrong. It will splat word zero (which is just zero) rather than word 1 which it is supposed to splat (i.e. it should match the P8 codegen).


Repository:
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https://reviews.llvm.org/D106353



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