[llvm] c4e1acf - [AArch64] Add tests for 128-bit atomic loads with casp available.

[Eli Friedman via llvm-commits]

Author: Eli Friedman
Date: 2021-07-20T14:02:44-07:00
New Revision: c4e1acf19b754f47350fd73b0d5b9614ee64a584

URL: https://github.com/llvm/llvm-project/commit/c4e1acf19b754f47350fd73b0d5b9614ee64a584
DIFF: https://github.com/llvm/llvm-project/commit/c4e1acf19b754f47350fd73b0d5b9614ee64a584.diff

LOG: [AArch64] Add tests for 128-bit atomic loads with casp available.

We currently don't use casp; maybe we should?

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
    llvm/test/CodeGen/AArch64/atomic-ops-lse.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
index 85072688e42b..da82f2447ef2 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
@@ -96,3 +96,24 @@ define void @val_compare_and_swap_release_acquire(i128* %p, i128 %oldval, i128 %
   store i128 %val, i128* %p
   ret void
 }
+
+define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
+; CHECK-LLSC-O1-LABEL: atomic_load_relaxed
+; CHECK-LLSC-O1: ldxp
+; CHECK-LLSC-O1: stxp
+
+; CHECK-LLSC-O0-LABEL: atomic_load_relaxed
+; CHECK-LLSC-O0: ldxp
+; CHECK-LLSC-O0: stxp
+
+; CHECK-CAS-O1-LABEL: atomic_load_relaxed
+; CHECK-CAS-O1: ldxp
+; CHECK-CAS-O1: stxp
+
+; CHECK-CAS-O0-LABEL: atomic_load_relaxed
+; CHECK-CAS-O0: ldxp
+; CHECK-CAS-O0: stxp
+    %r = load atomic i128, i128* %p monotonic, align 16
+    store i128 %r, i128* %p2
+    ret void
+}

diff  --git a/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll b/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
index 811f2a8553d7..2ec21c832a47 100644
--- a/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
+++ b/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
@@ -9412,4 +9412,14 @@ define dso_local void @test_atomic_load_xor_i64_noret_seq_cst(i64 %offset) nounw
   ret void
 }
 
+define dso_local i128 @test_atomic_load_i128() nounwind {
+; CHECK-LABEL: test_atomic_load_i128:
+; CHECK: ldxp
+; CHECK: stxp
 
+; OUTLINE-ATOMICS-LABEL: test_atomic_load_i128:
+; OUTLINE-ATOMICS: ldxp
+; OUTLINE-ATOMICS: stxp
+   %pair = load atomic i128, i128* @var128 monotonic, align 16
+   ret i128 %pair
+}