[PATCH] D106365: [AArch64] Prefer fmov over orr v.16b when copying f32/f64
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 20 08:06:25 PDT 2021
dmgreen created this revision.
dmgreen added reviewers: fhahn, t.p.northover.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
dmgreen requested review of this revision.
Herald added a project: LLVM.
This change the lowering of f32 and f64 COPY from a 128bit vector ORR to a fmov of the appropriate type. At least on some CPU's with 64bit NEON data paths this is expected to be faster, and shouldn't be slower on any CPU that treats fmov as a register rename.
https://reviews.llvm.org/D106365
Files:
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll
llvm/test/CodeGen/AArch64/arm64-aapcs.ll
llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
llvm/test/CodeGen/AArch64/arm64-vector-insertion.ll
llvm/test/CodeGen/AArch64/bf16-vector-bitcast.ll
llvm/test/CodeGen/AArch64/bf16-vector-shuffle.ll
llvm/test/CodeGen/AArch64/bitcast-promote-widen.ll
llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
llvm/test/CodeGen/AArch64/f16-instructions.ll
llvm/test/CodeGen/AArch64/fadd-combines.ll
llvm/test/CodeGen/AArch64/fast-isel-select.ll
llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
llvm/test/CodeGen/AArch64/fp16-vector-bitcast.ll
llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
llvm/test/CodeGen/AArch64/machine-combiner.ll
llvm/test/CodeGen/AArch64/mla_mls_merge.ll
llvm/test/CodeGen/AArch64/neon-mla-mls.ll
llvm/test/CodeGen/AArch64/popcount.ll
llvm/test/CodeGen/AArch64/sqrt-fastmath.ll
llvm/test/CodeGen/AArch64/swift-return.ll
llvm/test/CodeGen/AArch64/urem-vector-lkk.ll
llvm/test/CodeGen/AArch64/vec-libcalls.ll
llvm/test/Transforms/LoopStrengthReduce/AArch64/small-constant.ll
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