[PATCH] D106039: [AArch64] Fix i128 cmpxchg using ldxp/stxp.

[Sam Parker via Phabricator via llvm-commits]

samparker accepted this revision.
samparker added a comment.
This revision is now accepted and ready to land.

This made my brain melt a little... anyway, from Section B 2.2.1 of Arm ARM:

//When the Store-Exclusive of a Load-Exclusive/Store-Exclusive pair instruction
using two 64-bit quantities succeeds, it causes a single-copy atomic update
of the entire memory location being updated.//

//To atomically load two 64-bit quantities, perform a Load-Exclusive
pair/Store-Exclusive pair sequence of reading and writing the same value for
which the Store-Exclusive pair succeeds, and use the read values from the
Load-Exclusive pair.//

And it looks like this is what we are doing.

Ordering changes also LGTM.


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