[PATCH] D106028: [AArch64][SelectionDAG] Add legalization for widening LOAD/MLOAD.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 19 13:14:26 PDT 2021
sdesmalen added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:4048
+
+ // FIXME: Figure out how to replace constant "2".
+ if (VT.isScalableVector() && VT.getVectorMinNumElements() % 2 != 0) {
----------------
Do we also want to do this for other element-counts that are not a power of 2? (e.g. `<vscale x 6 x i8>`)
Was this code intended to work for `<vscale x 1 x eltty>` ? (I tried that a few days ago with this patch and ran into some failures. I didn't really investigate further though)
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:4049
+ // FIXME: Figure out how to replace constant "2".
+ if (VT.isScalableVector() && VT.getVectorMinNumElements() % 2 != 0) {
+ // Convert load to masked load. Let MLOAD legalization handle widening.
----------------
nit: VT.isKnownMultipleOf(2)
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:4135
+ MachineMemOperand *MemOp = MF.getMachineMemOperand(
+ N->getMemOperand(), 0, MemoryLocation::UnknownSize);
+
----------------
Should `MemoryLocation::UnknownSize` only be used for the scalable case?
Repository:
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https://reviews.llvm.org/D106028/new/
https://reviews.llvm.org/D106028
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