[PATCH] D106138: [AArch64][SVE] Optimize bitcasts between unpacked half/i16 vectors.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 19 00:30:38 PDT 2021
sdesmalen marked 2 inline comments as done.
sdesmalen added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3527
+ assert(OpVT.isFloatingPoint() && !ArgVT.isFloatingPoint() &&
+ "Expected int->fp bitcast!");
SDValue ExtResult =
----------------
efriedma wrote:
> I'm wondering if this is going to blow up if you try to `bitcast <vscale x 1 x double> %v to <vscale x 2 x float>` or something like that... maybe not worth worrying about at the moment.
Yes, although trying that example runs into other trouble before reaching this code.
Using an ANY_EXTEND won't work for the fp->fp bitcast, so at least the assert guards that for now.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D106138/new/
https://reviews.llvm.org/D106138
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