[PATCH] D105919: [AMDGPU] Mark all relevant VOP1 instructions rematerializable

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 13 17:26:48 PDT 2021


arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/VOP1Instructions.td:361
 
+let isReMaterializable = 1 in {
 let SubtargetPredicate = isGFX6GFX7 in {
----------------
rampitec wrote:
> rampitec wrote:
> > arsenm wrote:
> > > rampitec wrote:
> > > > arsenm wrote:
> > > > > I think we need a nofpexcept flag check for most of these FP ops
> > > > Do we realy raise anything? I suppose at maximum we will get SNaN, but that can be remated. On practice have you seen a signaling scenario anywhere?
> > > It's not enabled anywhere but the hardware does support it. You just need to check MI::mayRaiseFPException
> > If I just check it these will never be remated, there is no even a point to mark them. If the check will include something like "exceptions enabled for the functuon and may raise", then it makes more sense. But since we don't enable it I doubt I can write such check. Maybe just leave a TODO?
> I can even add a stub areFPEcxeptionsEnabled() returning false in the MFI, and check it. One day we will write something into that stub.
You don't need to track a function level property. The regular non-constrained FP operations imply nofpexcept. You just need to check MI::mayRaiseFPException


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