[llvm] fcb710a - [NVPTX] Add select(cc, binop(), binop()) fast-math tests

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2021-07-18T15:30:24+01:00
New Revision: fcb710a7ad4f9d9ffc82f66ae3bcd77786b781aa

URL: https://github.com/llvm/llvm-project/commit/fcb710a7ad4f9d9ffc82f66ae3bcd77786b781aa
DIFF: https://github.com/llvm/llvm-project/commit/fcb710a7ad4f9d9ffc82f66ae3bcd77786b781aa.diff

LOG: [NVPTX] Add select(cc,binop(),binop()) fast-math tests

As discussed on D106058 - we're not propagating the common flags to the merged binop

Added: 
    

Modified: 
    llvm/test/CodeGen/NVPTX/fast-math.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/NVPTX/fast-math.ll b/llvm/test/CodeGen/NVPTX/fast-math.ll
index 8315aa03811d..a29d70a0b55b 100644
--- a/llvm/test/CodeGen/NVPTX/fast-math.ll
+++ b/llvm/test/CodeGen/NVPTX/fast-math.ll
@@ -158,6 +158,16 @@ define float @repeated_div_recip_allowed(i1 %pred, float %a, float %b, float %di
   ret float %w
 }
 
+; CHECK-LABEL: repeated_div_recip_allowed_sel
+define float @repeated_div_recip_allowed_sel(i1 %pred, float %a, float %b, float %divisor) {
+; CHECK: selp.f32
+; CHECK: div.rn.f32
+  %x = fdiv arcp float %a, %divisor
+  %y = fdiv arcp float %b, %divisor
+  %w = select i1 %pred, float %x, float %y
+  ret float %w
+}
+
 ; CHECK-LABEL: repeated_div_recip_allowed_ftz
 define float @repeated_div_recip_allowed_ftz(i1 %pred, float %a, float %b, float %divisor) #1 {
 ; CHECK: rcp.rn.ftz.f32
@@ -172,6 +182,16 @@ define float @repeated_div_recip_allowed_ftz(i1 %pred, float %a, float %b, float
   ret float %w
 }
 
+; CHECK-LABEL: repeated_div_recip_allowed_ftz_sel
+define float @repeated_div_recip_allowed_ftz_sel(i1 %pred, float %a, float %b, float %divisor) #1 {
+; CHECK: selp.f32
+; CHECK: div.rn.ftz.f32
+  %x = fdiv arcp float %a, %divisor
+  %y = fdiv arcp float %b, %divisor
+  %w = select i1 %pred, float %x, float %y
+  ret float %w
+}
+
 ; CHECK-LABEL: repeated_div_fast
 define float @repeated_div_fast(i1 %pred, float %a, float %b, float %divisor) #0 {
 ; CHECK: rcp.approx.f32
@@ -186,6 +206,16 @@ define float @repeated_div_fast(i1 %pred, float %a, float %b, float %divisor) #0
   ret float %w
 }
 
+; CHECK-LABEL: repeated_div_fast_sel
+define float @repeated_div_fast_sel(i1 %pred, float %a, float %b, float %divisor) #0 {
+; CHECK: selp.f32
+; CHECK: div.approx.f32
+  %x = fdiv float %a, %divisor
+  %y = fdiv float %b, %divisor
+  %w = select i1 %pred, float %x, float %y
+  ret float %w
+}
+
 ; CHECK-LABEL: repeated_div_fast_ftz
 define float @repeated_div_fast_ftz(i1 %pred, float %a, float %b, float %divisor) #0 #1 {
 ; CHECK: rcp.approx.ftz.f32
@@ -200,5 +230,15 @@ define float @repeated_div_fast_ftz(i1 %pred, float %a, float %b, float %divisor
   ret float %w
 }
 
+; CHECK-LABEL: repeated_div_fast_ftz_sel
+define float @repeated_div_fast_ftz_sel(i1 %pred, float %a, float %b, float %divisor) #0 #1 {
+; CHECK: selp.f32
+; CHECK: div.approx.ftz.f32
+  %x = fdiv float %a, %divisor
+  %y = fdiv float %b, %divisor
+  %w = select i1 %pred, float %x, float %y
+  ret float %w
+}
+
 attributes #0 = { "unsafe-fp-math" = "true" }
 attributes #1 = { "denormal-fp-math-f32" = "preserve-sign" }