[PATCH] D106237: [ISel] Port AArch64 HADD and RHADD to ISel

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

X86 might be able to reuse this for X86ISD::AVG



================
Comment at: llvm/include/llvm/CodeGen/ISDOpcodes.h:614
 
+  /// HADDS/HADDU - Having add - Add two integers using an integer of type
+  /// i[N+1], halving the result by shifting it one bit right.
----------------
having add?
Maybe add a code snippet?


================
Comment at: llvm/include/llvm/CodeGen/ISDOpcodes.h:619
+  /// RHADDS/RHADDU - Rounding having add - Add two integers using an integer of
+  /// type i[N+2], add 1 and halve the result by shifting it one bit right.
+  RHADDS,
----------------
Maybe add a code snippet?


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  https://reviews.llvm.org/D106237/new/

https://reviews.llvm.org/D106237