[PATCH] D105796: [RISCV] Optimize multiplication in the zba extension with SH*ADD

[Ben Shi via Phabricator via llvm-commits]

benshi001 added a comment.

In D105796#2885130 <https://reviews.llvm.org/D105796#2885130>, @craig.topper wrote:

> In D105796#2885104 <https://reviews.llvm.org/D105796#2885104>, @benshi001 wrote:
>
>> I change the $rs2 in the Pat from non_imm12 to GPR as following
>>
>>   def : Pat<(addshl GPR:$rs1, (XLenVT 1), (XLenVT 2), GPR:$rs2),
>>             (SH1ADD (SH1ADD GPR:$rs1, GPR:$rs1), GPR:$rs2)>;
>>
>> Because for `a*6 + 10`, `non_imm12:$rs2` will lead to
>>
>>   addi Rb, zero, 6
>>   mul Ra, Rb, Ra
>>   addi Ra, Ra, 6
>>
>> while `GPR:$rs2` will lead to
>>
>>   addi Rb, zero, 10
>>   sh1add Ra, Ra, Ra
>>   sh1add Ra, Ra, Rb
>>
>> And I think the later one is better, so I changed `non_imm12:$rs2` to `GPR:$rs2`.
>
> I'm not sure I follow this. How can a change to the isel pattern cause a mul to be created? Wasn't the mul already decomposed?

You are right. For non_imm12:$rs2, the following is generated

  slli    a1, a0, 1
  sh3add  a0, a0, a1
  addi    a0, a0, 6

For GPR:$rs2, the assembly is

  sh2add  a0, a0, a0
  addi    a1, zero, 6
  sh1add  a0, a0, a1

I think neither one is OK.


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https://reviews.llvm.org/D105796