[PATCH] D106138: [AArch64][SVE] Optimize bitcasts between unpacked half/i16 vectors.

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 16 16:53:01 PDT 2021


efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM with a couple minor comments.



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3527
+      assert(OpVT.isFloatingPoint() && !ArgVT.isFloatingPoint() &&
+             "Expected int->fp bitcast!");
       SDValue ExtResult =
----------------
I'm wondering if this is going to blow up if you try to `bitcast <vscale x 1 x double> %v to <vscale x 2 x float>` or something like that... maybe not worth worrying about at the moment.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16957
+    SDValue CastResult = getSVESafeBitCast(getSVEContainerType(VT), Op, DAG);
+    Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, VT, CastResult));
   }
----------------
"return;"?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106138/new/

https://reviews.llvm.org/D106138



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