[llvm] 0ce13f9 - [RISCV] Add curly braces around a case body that declares variables. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 16 09:36:04 PDT 2021


Author: Craig Topper
Date: 2021-07-16T09:35:56-07:00
New Revision: 0ce13f92b7c6b368c0d1862d9e76540aad9629a6

URL: https://github.com/llvm/llvm-project/commit/0ce13f92b7c6b368c0d1862d9e76540aad9629a6
DIFF: https://github.com/llvm/llvm-project/commit/0ce13f92b7c6b368c0d1862d9e76540aad9629a6.diff

LOG: [RISCV] Add curly braces around a case body that declares variables. NFC

This is at the end of the switch so doesn't cause any issues now,
but if a new case is added it will break.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index e6527a9967dbd..7273a3ada40b3 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -889,7 +889,7 @@ bool RISCVTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
   case Intrinsic::riscv_masked_atomicrmw_min_i32:
   case Intrinsic::riscv_masked_atomicrmw_umax_i32:
   case Intrinsic::riscv_masked_atomicrmw_umin_i32:
-  case Intrinsic::riscv_masked_cmpxchg_i32:
+  case Intrinsic::riscv_masked_cmpxchg_i32: {
     PointerType *PtrTy = cast<PointerType>(I.getArgOperand(0)->getType());
     Info.opc = ISD::INTRINSIC_W_CHAIN;
     Info.memVT = MVT::getVT(PtrTy->getElementType());
@@ -900,6 +900,7 @@ bool RISCVTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
                  MachineMemOperand::MOVolatile;
     return true;
   }
+  }
 }
 
 bool RISCVTargetLowering::isLegalAddressingMode(const DataLayout &DL,


        


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