[llvm] ba627a3 - [PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
Amy Kwan via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 16 07:29:23 PDT 2021
Author: Amy Kwan
Date: 2021-07-16T09:28:48-05:00
New Revision: ba627a32e125cab988f97da8e2466398f2bc75b2
URL: https://github.com/llvm/llvm-project/commit/ba627a32e125cab988f97da8e2466398f2bc75b2
DIFF: https://github.com/llvm/llvm-project/commit/ba627a32e125cab988f97da8e2466398f2bc75b2.diff
LOG: [PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
This patch includes the following updates to the load/store refactoring effort introduced in D93370:
- Update various VSX patterns that use to "force" an XForm, to instead just XForm.
This allows the ability for the patterns to compute the most optimal addressing
mode (and to produce a DForm instruction when possible)
- Update pattern and test case for the LXVD2X/STXVD2X intrinsics
- Update LIT test cases that use to use the XForm instruction to use the DForm instruction
Differential Revision: https://reviews.llvm.org/D95115
Added:
Modified:
llvm/lib/Target/PowerPC/PPCInstrVSX.td
llvm/test/CodeGen/PowerPC/PR33671.ll
llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll
llvm/test/CodeGen/PowerPC/aix-p9-insert-extract.ll
llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-callee.ll
llvm/test/CodeGen/PowerPC/aix-vector-vararg-fixed-caller.ll
llvm/test/CodeGen/PowerPC/aix32-vector-vararg-fixed-callee.ll
llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll
llvm/test/CodeGen/PowerPC/build-vector-tests.ll
llvm/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
llvm/test/CodeGen/PowerPC/constant-pool.ll
llvm/test/CodeGen/PowerPC/ctrloop-constrained-fp.ll
llvm/test/CodeGen/PowerPC/extract-and-store.ll
llvm/test/CodeGen/PowerPC/f128-aggregates.ll
llvm/test/CodeGen/PowerPC/f128-arith.ll
llvm/test/CodeGen/PowerPC/f128-compare.ll
llvm/test/CodeGen/PowerPC/f128-conv.ll
llvm/test/CodeGen/PowerPC/f128-passByValue.ll
llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll
llvm/test/CodeGen/PowerPC/f128_ldst.ll
llvm/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll
llvm/test/CodeGen/PowerPC/float-load-store-pair.ll
llvm/test/CodeGen/PowerPC/fma-combine.ll
llvm/test/CodeGen/PowerPC/fmf-propagation.ll
llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
llvm/test/CodeGen/PowerPC/instr-properties.ll
llvm/test/CodeGen/PowerPC/load-shuffle-and-shuffle-store.ll
llvm/test/CodeGen/PowerPC/lxv-aligned-stack-slots.ll
llvm/test/CodeGen/PowerPC/mcm-4.ll
llvm/test/CodeGen/PowerPC/mma-acc-spill.ll
llvm/test/CodeGen/PowerPC/mma-outer-product.ll
llvm/test/CodeGen/PowerPC/mul-const-vector.ll
llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll
llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
llvm/test/CodeGen/PowerPC/p10-vector-rotate.ll
llvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll
llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll
llvm/test/CodeGen/PowerPC/pcrel_ldst.ll
llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll
llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll
llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
llvm/test/CodeGen/PowerPC/pr30715.ll
llvm/test/CodeGen/PowerPC/pr36292.ll
llvm/test/CodeGen/PowerPC/pr38087.ll
llvm/test/CodeGen/PowerPC/pr45628.ll
llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
llvm/test/CodeGen/PowerPC/recipest.ll
llvm/test/CodeGen/PowerPC/register-pressure-reduction.ll
llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll
llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll
llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll
llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
llvm/test/CodeGen/PowerPC/scalar_vector_test_1.ll
llvm/test/CodeGen/PowerPC/scalar_vector_test_2.ll
llvm/test/CodeGen/PowerPC/select_const.ll
llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
llvm/test/CodeGen/PowerPC/store_fptoi.ll
llvm/test/CodeGen/PowerPC/swaps-le-6.ll
llvm/test/CodeGen/PowerPC/tailcall-speculatable-callee.ll
llvm/test/CodeGen/PowerPC/toc-float.ll
llvm/test/CodeGen/PowerPC/unaligned-addressing-mode.ll
llvm/test/CodeGen/PowerPC/unaligned.ll
llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
llvm/test/CodeGen/PowerPC/vavg.ll
llvm/test/CodeGen/PowerPC/vec-itofp.ll
llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
llvm/test/CodeGen/PowerPC/vec_int_ext.ll
llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
llvm/test/CodeGen/PowerPC/vector-extend-sign.ll
llvm/test/CodeGen/PowerPC/vector-ldst.ll
llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
llvm/test/CodeGen/PowerPC/vsx-p9.ll
llvm/test/CodeGen/PowerPC/vsx.ll
llvm/test/CodeGen/PowerPC/vsx_builtins.ll
llvm/test/CodeGen/PowerPC/vsx_insert_extract_le.ll
llvm/test/CodeGen/PowerPC/vsx_scalar_ld_st.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
index 319842450768..86bb5dda33c5 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -316,13 +316,13 @@ let hasSideEffects = 0 in {
let CodeSize = 3 in
def XFLOADf64 : PseudoXFormMemOp<(outs vsfrc:$XT), (ins memrr:$src),
"#XFLOADf64",
- [(set f64:$XT, (load ForceXForm:$src))]>;
+ [(set f64:$XT, (load XForm:$src))]>;
let Predicates = [HasVSX, HasOnlySwappingMemOps] in
def LXVD2X : XX1Form_memOp<31, 844,
(outs vsrc:$XT), (ins memrr:$src),
"lxvd2x $XT, $src", IIC_LdStLFD,
- [(set v2f64:$XT, (int_ppc_vsx_lxvd2x ForceXForm:$src))]>;
+ []>;
def LXVDSX : XX1Form_memOp<31, 332,
(outs vsrc:$XT), (ins memrr:$src),
@@ -347,7 +347,7 @@ let hasSideEffects = 0 in {
let CodeSize = 3 in
def XFSTOREf64 : PseudoXFormMemOp<(outs), (ins vsfrc:$XT, memrr:$dst),
"#XFSTOREf64",
- [(store f64:$XT, ForceXForm:$dst)]>;
+ [(store f64:$XT, XForm:$dst)]>;
let Predicates = [HasVSX, HasOnlySwappingMemOps] in {
// The behaviour of this instruction is endianness-specific so we provide no
@@ -1128,7 +1128,7 @@ let Predicates = [HasVSX, HasP8Vector] in {
let CodeSize = 3 in
def XFLOADf32 : PseudoXFormMemOp<(outs vssrc:$XT), (ins memrr:$src),
"#XFLOADf32",
- [(set f32:$XT, (load ForceXForm:$src))]>;
+ [(set f32:$XT, (load XForm:$src))]>;
// Pseudo instruction LIWAX will be expanded to LXSIWAX or LFIWAX later
def LIWAX : PseudoXFormMemOp<(outs vsfrc:$XT), (ins memrr:$src),
"#LIWAX",
@@ -1151,7 +1151,7 @@ let Predicates = [HasVSX, HasP8Vector] in {
let CodeSize = 3 in
def XFSTOREf32 : PseudoXFormMemOp<(outs), (ins vssrc:$XT, memrr:$dst),
"#XFSTOREf32",
- [(store f32:$XT, ForceXForm:$dst)]>;
+ [(store f32:$XT, XForm:$dst)]>;
// Pseudo instruction STIWX will be expanded to STXSIWX or STFIWX later
def STIWX : PseudoXFormMemOp<(outs), (ins vsfrc:$XT, memrr:$dst),
"#STIWX",
@@ -2453,6 +2453,7 @@ def DblwdCmp {
// [HasVSX, IsLittleEndian]
// [HasVSX, NoP9Vector]
// [HasVSX, NoP9Vector, IsLittleEndian]
+// [HasVSX, NoP9Vector, IsBigEndian]
// [HasVSX, HasOnlySwappingMemOps]
// [HasVSX, HasOnlySwappingMemOps, IsBigEndian]
// [HasVSX, HasP8Vector]
@@ -3136,14 +3137,19 @@ defm : ScalToVecWPermute<
(SUBREG_TO_REG (i64 1), (XFLOADf64 ForceXForm:$src), sub_64)>;
} // HasVSX, NoP9Vector, IsLittleEndian
+let Predicates = [HasVSX, NoP9Vector, IsBigEndian] in {
+ def : Pat<(v2f64 (int_ppc_vsx_lxvd2x ForceXForm:$src)),
+ (LXVD2X ForceXForm:$src)>;
+ def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, ForceXForm:$dst),
+ (STXVD2X $rS, ForceXForm:$dst)>;
+} // HasVSX, NoP9Vector, IsBigEndian
+
// Any VSX subtarget that only has loads and stores that load in big endian
// order regardless of endianness. This is really pre-Power9 subtargets.
let Predicates = [HasVSX, HasOnlySwappingMemOps] in {
def : Pat<(v2f64 (PPClxvd2x ForceXForm:$src)), (LXVD2X ForceXForm:$src)>;
// Stores.
- def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, ForceXForm:$dst),
- (STXVD2X $rS, ForceXForm:$dst)>;
def : Pat<(PPCstxvd2x v2f64:$rS, ForceXForm:$dst), (STXVD2X $rS, ForceXForm:$dst)>;
} // HasVSX, HasOnlySwappingMemOps
@@ -3167,8 +3173,8 @@ let Predicates = [HasVSX, HasOnlySwappingMemOps, IsBigEndian] in {
let Predicates = [HasVSX, HasP8Vector] in {
def : Pat<(int_ppc_vsx_xxleqv v4i32:$A, v4i32:$B),
(XXLEQV $A, $B)>;
-def : Pat<(f64 (extloadf32 ForceXForm:$src)),
- (COPY_TO_REGCLASS (XFLOADf32 ForceXForm:$src), VSFRC)>;
+def : Pat<(f64 (extloadf32 XForm:$src)),
+ (COPY_TO_REGCLASS (XFLOADf32 XForm:$src), VSFRC)>;
def : Pat<(f32 (fpround (f64 (extloadf32 ForceXForm:$src)))),
(f32 (XFLOADf32 ForceXForm:$src))>;
def : Pat<(f64 (any_fpextend f32:$src)),
@@ -3803,48 +3809,34 @@ def : Pat<(v1i128 (bswap v1i128 :$A)),
(v1i128 (COPY_TO_REGCLASS (XXBRQ (COPY_TO_REGCLASS $A, VSRC)), VRRC))>;
// D-Form Load/Store
-def : Pat<(v4i32 (quadwOffsetLoad DQForm:$src)), (LXV memrix16:$src)>;
-def : Pat<(v4f32 (quadwOffsetLoad DQForm:$src)), (LXV memrix16:$src)>;
-def : Pat<(v2i64 (quadwOffsetLoad DQForm:$src)), (LXV memrix16:$src)>;
-def : Pat<(v2f64 (quadwOffsetLoad DQForm:$src)), (LXV memrix16:$src)>;
-def : Pat<(f128 (quadwOffsetLoad DQForm:$src)),
+foreach Ty = [v4i32, v4f32, v2i64, v2f64] in {
+ def : Pat<(Ty (load DQForm:$src)), (LXV memrix16:$src)>;
+ def : Pat<(Ty (load XForm:$src)), (LXVX XForm:$src)>;
+ def : Pat<(store Ty:$rS, DQForm:$dst), (STXV $rS, memrix16:$dst)>;
+ def : Pat<(store Ty:$rS, XForm:$dst), (STXVX $rS, XForm:$dst)>;
+}
+
+def : Pat<(f128 (load DQForm:$src)),
(COPY_TO_REGCLASS (LXV memrix16:$src), VRRC)>;
+def : Pat<(f128 (load XForm:$src)),
+ (COPY_TO_REGCLASS (LXVX XForm:$src), VRRC)>;
def : Pat<(v4i32 (int_ppc_vsx_lxvw4x DQForm:$src)), (LXV memrix16:$src)>;
def : Pat<(v2f64 (int_ppc_vsx_lxvd2x DQForm:$src)), (LXV memrix16:$src)>;
+def : Pat<(v4i32 (int_ppc_vsx_lxvw4x XForm:$src)), (LXVX XForm:$src)>;
+def : Pat<(v2f64 (int_ppc_vsx_lxvd2x XForm:$src)), (LXVX XForm:$src)>;
-def : Pat<(quadwOffsetStore v4f32:$rS, DQForm:$dst), (STXV $rS, memrix16:$dst)>;
-def : Pat<(quadwOffsetStore v4i32:$rS, DQForm:$dst), (STXV $rS, memrix16:$dst)>;
-def : Pat<(quadwOffsetStore v2f64:$rS, DQForm:$dst), (STXV $rS, memrix16:$dst)>;
-def : Pat<(quadwOffsetStore f128:$rS, DQForm:$dst),
+def : Pat<(store f128:$rS, DQForm:$dst),
(STXV (COPY_TO_REGCLASS $rS, VSRC), memrix16:$dst)>;
-def : Pat<(quadwOffsetStore v2i64:$rS, DQForm:$dst), (STXV $rS, memrix16:$dst)>;
+def : Pat<(store f128:$rS, XForm:$dst),
+ (STXVX (COPY_TO_REGCLASS $rS, VSRC), XForm:$dst)>;
def : Pat<(int_ppc_vsx_stxvw4x v4i32:$rS, DQForm:$dst),
(STXV $rS, memrix16:$dst)>;
def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, DQForm:$dst),
(STXV $rS, memrix16:$dst)>;
-
-def : Pat<(v2f64 (nonQuadwOffsetLoad ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(v2i64 (nonQuadwOffsetLoad ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(v4f32 (nonQuadwOffsetLoad ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(v4i32 (nonQuadwOffsetLoad ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(v4i32 (int_ppc_vsx_lxvw4x ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(v2f64 (int_ppc_vsx_lxvd2x ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(f128 (nonQuadwOffsetLoad ForceXForm:$src)),
- (COPY_TO_REGCLASS (LXVX ForceXForm:$src), VRRC)>;
-def : Pat<(nonQuadwOffsetStore f128:$rS, ForceXForm:$dst),
- (STXVX (COPY_TO_REGCLASS $rS, VSRC), ForceXForm:$dst)>;
-def : Pat<(nonQuadwOffsetStore v2f64:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
-def : Pat<(nonQuadwOffsetStore v2i64:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
-def : Pat<(nonQuadwOffsetStore v4f32:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
-def : Pat<(nonQuadwOffsetStore v4i32:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
-def : Pat<(int_ppc_vsx_stxvw4x v4i32:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
-def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
+def : Pat<(int_ppc_vsx_stxvw4x v4i32:$rS, XForm:$dst),
+ (STXVX $rS, XForm:$dst)>;
+def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, XForm:$dst),
+ (STXVX $rS, XForm:$dst)>;
// Build vectors from i8 loads
defm : ScalToVecWPermute<v8i16, ScalarLoads.ZELi8,
diff --git a/llvm/test/CodeGen/PowerPC/PR33671.ll b/llvm/test/CodeGen/PowerPC/PR33671.ll
index 9890cc7a20f4..9fbb8f0b6aca 100644
--- a/llvm/test/CodeGen/PowerPC/PR33671.ll
+++ b/llvm/test/CodeGen/PowerPC/PR33671.ll
@@ -25,8 +25,8 @@ entry:
store <4 x i32> %2, <4 x i32>* %0, align 16
ret void
; CHECK-LABEL: test2
-; CHECK: addi 3, 3, 8
-; CHECK: addi [[REG:[0-9]+]], 4, 4
-; CHECK: lxvx [[LD:[0-9]+]], 0, 3
-; CHECK: stxvx [[LD]], 0, [[REG]]
+; CHECK: li [[REG:[0-9]+]], 8
+; CHECK: lxvx [[LD:[0-9]+]], 3, [[REG]]
+; CHECK: li [[REG2:[0-9]+]], 4
+; CHECK: stxvx [[LD]], 4, [[REG2]]
}
diff --git a/llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll b/llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
index 4d06571d0ec7..45ca1fbe9e29 100644
--- a/llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
+++ b/llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
@@ -29,7 +29,7 @@ define void @testExpandPostRAPseudo(i32* nocapture readonly %ptr) {
; CHECK-P9: addis r4, r2, .LC0 at toc@ha
; CHECK-P9: lxvwsx vs0, 0, r3
; CHECK-P9: ld r4, .LC0 at toc@l(r4)
-; CHECK-P9: stxvx vs0, 0, r4
+; CHECK-P9: stxv vs0, 0(r4)
; CHECK-P9: lis r4, 1024
; CHECK-P9: lfiwax f0, 0, r3
; CHECK-P9: addis r3, r2, .LC1 at toc@ha
diff --git a/llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll b/llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll
index 8a07feb5f6be..80c0c48fdf6f 100644
--- a/llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll
@@ -85,15 +85,15 @@ entry:
; EXTABI: body: |
; EXTABI: bb.0.entry:
; EXTABI: liveins: $f1, $x4
-; EXTABI-DAG: renamable $f0 = XFLOADf64 $zero8, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
+; EXTABI-DAG: renamable $f0 = LFD 0, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $f0, renamable $f1, implicit $rm
; EXTABI-DAG: renamable $vf31 = nofpexcept XSMULDP killed renamable $f1, renamable $f1, implicit $rm
-; EXTABI: XFSTOREf64 killed renamable $f0, $zero8, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
+; EXTABI: STFD killed renamable $f0, 0, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
; EXTABI-LABEL: INLINEASM
-; EXTABI-DAG: renamable $f0 = XFLOADf64 $zero8, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
+; EXTABI-DAG: renamable $f0 = LFD 0, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $vf31, killed renamable $f0, implicit $rm
-; EXTABI-DAG: XFSTOREf64 killed renamable $f0, $zero8, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
-; EXTABI: renamable $f1 = XFLOADf64 $zero8, killed renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
+; EXTABI-DAG: STFD killed renamable $f0, 0, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
+; EXTABI: renamable $f1 = LFD 0, killed renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
; DFLABI-LABEL: vec_test
diff --git a/llvm/test/CodeGen/PowerPC/aix-p9-insert-extract.ll b/llvm/test/CodeGen/PowerPC/aix-p9-insert-extract.ll
index 1890549c5ec7..40b2fc2e08f1 100644
--- a/llvm/test/CodeGen/PowerPC/aix-p9-insert-extract.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-p9-insert-extract.ll
@@ -455,14 +455,14 @@ define <8 x i16> @shuffle_vector_halfword_0_4(<8 x i16> %a) {
; CHECK-64-LABEL: shuffle_vector_halfword_0_4:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C0(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_halfword_0_4:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C0(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -534,14 +534,14 @@ define <8 x i16> @shuffle_vector_halfword_3_4(<8 x i16> %a) {
; CHECK-64-LABEL: shuffle_vector_halfword_3_4:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C1(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_halfword_3_4:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C1(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -613,14 +613,14 @@ define <8 x i16> @shuffle_vector_halfword_6_4(<8 x i16> %a) {
; CHECK-64-LABEL: shuffle_vector_halfword_6_4:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C2(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_halfword_6_4:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C2(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -642,14 +642,14 @@ define <8 x i16> @shuffle_vector_halfword_7_4(<8 x i16> %a) {
; CHECK-64-LABEL: shuffle_vector_halfword_7_4:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C3(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_halfword_7_4:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C3(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -1703,14 +1703,14 @@ define <16 x i8> @shuffle_vector_byte_1_8(<16 x i8> %a) {
; CHECK-64-LABEL: shuffle_vector_byte_1_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C4(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_1_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C4(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -1732,14 +1732,14 @@ define <16 x i8> @shuffle_vector_byte_2_8(<16 x i8> %a) {
; CHECK-64-LABEL: shuffle_vector_byte_2_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C5(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_2_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C5(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -1811,14 +1811,14 @@ define <16 x i8> @shuffle_vector_byte_5_8(<16 x i8> %a) {
; CHECK-64-LABEL: shuffle_vector_byte_5_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C6(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_5_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C6(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -1840,14 +1840,14 @@ define <16 x i8> @shuffle_vector_byte_6_8(<16 x i8> %a) {
; CHECK-64-LABEL: shuffle_vector_byte_6_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C7(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_6_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C7(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -1869,14 +1869,14 @@ define <16 x i8> @shuffle_vector_byte_7_8(<16 x i8> %a) {
; CHECK-64-LABEL: shuffle_vector_byte_7_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C8(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_7_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C8(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -1973,14 +1973,14 @@ define <16 x i8> @shuffle_vector_byte_11_8(<16 x i8> %a) {
; CHECK-64-LABEL: shuffle_vector_byte_11_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C9(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_11_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C9(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -2002,14 +2002,14 @@ define <16 x i8> @shuffle_vector_byte_12_8(<16 x i8> %a) {
; CHECK-64-LABEL: shuffle_vector_byte_12_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C10(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_12_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C10(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
@@ -2081,14 +2081,14 @@ define <16 x i8> @shuffle_vector_byte_15_8(<16 x i8> %a) {
; CHECK-64-LABEL: shuffle_vector_byte_15_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C11(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_15_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C11(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
diff --git a/llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-callee.ll b/llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-callee.ll
index 468da5c30d95..ae2ee16e9d49 100644
--- a/llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-callee.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-callee.ll
@@ -41,10 +41,8 @@ entry:
; MIR32: isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
; MIR32: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-; MIR32: renamable $[[GPR1:r[0-9]+]] = ADDI %fixed-stack.2, 0
-; MIR32: renamable $[[GPR2:r[0-9]+]] = ADDI %fixed-stack.0, 0
-; MIR32: renamable $f{{[0-9]+}} = XFLOADf64 $zero, killed renamable $[[GPR1]]
-; MIR32: renamable $f{{[0-9]+}} = XFLOADf64 $zero, killed renamable $[[GPR2]]
+; MIR32: renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.2
+; MIR32: renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.0
; 64BIT-LABEL: .test:
; 64BIT-DAG: lfd {{[0-9]+}}, 80(1)
@@ -62,7 +60,5 @@ entry:
; MIR64: isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
; MIR64: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-; MIR64: renamable $[[GPR1:x[0-9]+]] = ADDI8 %fixed-stack.2, 0
-; MIR64: renamable $[[GPR2:x[0-9]+]] = ADDI8 %fixed-stack.0, 0
-; MIR64: renamable $f{{[0-9]+}} = XFLOADf64 $zero8, killed renamable $[[GPR1]]
-; MIR64: renamable $f{{[0-9]+}} = XFLOADf64 $zero8, killed renamable $[[GPR2]]
+; MIR64: renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.2
+; MIR64: renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.0
diff --git a/llvm/test/CodeGen/PowerPC/aix-vector-vararg-fixed-caller.ll b/llvm/test/CodeGen/PowerPC/aix-vector-vararg-fixed-caller.ll
index d958c6453315..f3e58b789794 100644
--- a/llvm/test/CodeGen/PowerPC/aix-vector-vararg-fixed-caller.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-vector-vararg-fixed-caller.ll
@@ -8,6 +8,8 @@
; RUN: FileCheck --check-prefix=64BIT %s
define void @caller() {
+
+
; 32BIT-LABEL: name: caller
; 32BIT: bb.0.entry:
; 32BIT: ADJCALLSTACKDOWN 88, 0, implicit-def dead $r1, implicit $r1
@@ -23,26 +25,25 @@ define void @caller() {
; 32BIT: STW killed [[ORI1]], 80, $r1 :: (store (s32), align 8)
; 32BIT: [[LWZtoc1:%[0-9]+]]:gprc = LWZtoc %const.1, $r2 :: (load (s32) from got)
; 32BIT: [[LXVW4X1:%[0-9]+]]:vsrc = LXVW4X $zero, killed [[LWZtoc1]] :: (load (s128) from constant-pool)
- ; 32BIT: [[LWZtoc2:%[0-9]+]]:gprc = LWZtoc %const.2, $r2 :: (load (s32) from got)
- ; 32BIT: [[XFLOADf64_:%[0-9]+]]:vsfrc = XFLOADf64 $zero, killed [[LWZtoc2]] :: (load (s64) from constant-pool)
+ ; 32BIT: [[LWZtoc2:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.2, $r2 :: (load (s32) from got)
+ ; 32BIT: [[LFD:%[0-9]+]]:f8rc = LFD 0, killed [[LWZtoc2]] :: (load (s64) from constant-pool)
; 32BIT: [[LIS2:%[0-9]+]]:gprc = LIS 16393
; 32BIT: [[ORI2:%[0-9]+]]:gprc = ORI killed [[LIS2]], 8697
; 32BIT: [[LIS3:%[0-9]+]]:gprc = LIS 61467
; 32BIT: [[ORI3:%[0-9]+]]:gprc = ORI killed [[LIS3]], 34414
- ; 32BIT: [[LWZtoc3:%[0-9]+]]:gprc = LWZtoc %const.3, $r2 :: (load (s32) from got)
- ; 32BIT: [[XFLOADf64_1:%[0-9]+]]:vsfrc = XFLOADf64 $zero, killed [[LWZtoc3]] :: (load (s64) from constant-pool)
+ ; 32BIT: [[LWZtoc3:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.3, $r2 :: (load (s32) from got)
+ ; 32BIT: [[LFD1:%[0-9]+]]:f8rc = LFD 0, killed [[LWZtoc3]] :: (load (s64) from constant-pool)
; 32BIT: [[LI1:%[0-9]+]]:gprc = LI 55
; 32BIT: $r3 = COPY [[LI1]]
; 32BIT: $v2 = COPY [[LXVW4X1]]
- ; 32BIT: $f1 = COPY [[XFLOADf64_]]
+ ; 32BIT: $f1 = COPY [[LFD]]
; 32BIT: $r9 = COPY [[ORI2]]
; 32BIT: $r10 = COPY [[ORI3]]
- ; 32BIT: $f2 = COPY [[XFLOADf64_1]]
+ ; 32BIT: $f2 = COPY [[LFD1]]
; 32BIT: BL_NOP <mcsymbol .callee[PR]>, csr_aix32_altivec, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $v2, implicit $f1, implicit $r9, implicit $r10, implicit $f2, implicit $r2, implicit-def $r1, implicit-def $v2
; 32BIT: ADJCALLSTACKUP 88, 0, implicit-def dead $r1, implicit $r1
; 32BIT: [[COPY:%[0-9]+]]:vsrc = COPY $v2
; 32BIT: BLR implicit $lr, implicit $rm
-
; 64BIT-LABEL: name: caller
; 64BIT: bb.0.entry:
; 64BIT: ADJCALLSTACKDOWN 120, 0, implicit-def dead $r1, implicit $r1
@@ -60,10 +61,10 @@ define void @caller() {
; 64BIT: [[LXVW4X1:%[0-9]+]]:vsrc = LXVW4X $zero8, killed [[LDtocCPT1]] :: (load (s128) from constant-pool)
; 64BIT: [[LD:%[0-9]+]]:g8rc = LD 104, $x1 :: (load (s64))
; 64BIT: [[LD1:%[0-9]+]]:g8rc = LD 96, $x1 :: (load (s64))
- ; 64BIT: [[LDtocCPT2:%[0-9]+]]:g8rc = LDtocCPT %const.2, $x2 :: (load (s64) from got)
- ; 64BIT: [[XFLOADf64_:%[0-9]+]]:vsfrc = XFLOADf64 $zero8, killed [[LDtocCPT2]] :: (load (s64) from constant-pool)
- ; 64BIT: [[LDtocCPT3:%[0-9]+]]:g8rc = LDtocCPT %const.3, $x2 :: (load (s64) from got)
- ; 64BIT: [[XFLOADf64_1:%[0-9]+]]:vsfrc = XFLOADf64 $zero8, killed [[LDtocCPT3]] :: (load (s64) from constant-pool)
+ ; 64BIT: [[LDtocCPT2:%[0-9]+]]:g8rc_and_g8rc_nox0 = LDtocCPT %const.2, $x2 :: (load (s64) from got)
+ ; 64BIT: [[LFD:%[0-9]+]]:f8rc = LFD 0, killed [[LDtocCPT2]] :: (load (s64) from constant-pool)
+ ; 64BIT: [[LDtocCPT3:%[0-9]+]]:g8rc_and_g8rc_nox0 = LDtocCPT %const.3, $x2 :: (load (s64) from got)
+ ; 64BIT: [[LFD1:%[0-9]+]]:f8rc = LFD 0, killed [[LDtocCPT3]] :: (load (s64) from constant-pool)
; 64BIT: [[LIS8_1:%[0-9]+]]:g8rc = LIS8 16393
; 64BIT: [[ORI8_2:%[0-9]+]]:g8rc = ORI8 killed [[LIS8_1]], 8697
; 64BIT: [[RLDIC1:%[0-9]+]]:g8rc = RLDIC killed [[ORI8_2]], 32, 1
@@ -72,11 +73,11 @@ define void @caller() {
; 64BIT: [[LI8_1:%[0-9]+]]:g8rc = LI8 55
; 64BIT: $x3 = COPY [[LI8_1]]
; 64BIT: $v2 = COPY [[LXVW4X1]]
- ; 64BIT: $f1 = COPY [[XFLOADf64_]]
+ ; 64BIT: $f1 = COPY [[LFD]]
; 64BIT: $x7 = COPY [[ORI8_3]]
; 64BIT: $x9 = COPY [[LD1]]
; 64BIT: $x10 = COPY [[LD]]
- ; 64BIT: $f2 = COPY [[XFLOADf64_1]]
+ ; 64BIT: $f2 = COPY [[LFD1]]
; 64BIT: BL8_NOP <mcsymbol .callee[PR]>, csr_ppc64_altivec, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $v2, implicit $f1, implicit $x7, implicit $x9, implicit $x10, implicit $f2, implicit $x2, implicit-def $r1, implicit-def $v2
; 64BIT: ADJCALLSTACKUP 120, 0, implicit-def dead $r1, implicit $r1
; 64BIT: [[COPY:%[0-9]+]]:vsrc = COPY $v2
diff --git a/llvm/test/CodeGen/PowerPC/aix32-vector-vararg-fixed-callee.ll b/llvm/test/CodeGen/PowerPC/aix32-vector-vararg-fixed-callee.ll
index dcf5f6b5e82b..5d6fa0eb3e01 100644
--- a/llvm/test/CodeGen/PowerPC/aix32-vector-vararg-fixed-callee.ll
+++ b/llvm/test/CodeGen/PowerPC/aix32-vector-vararg-fixed-callee.ll
@@ -14,10 +14,9 @@ define double @callee(i32 %count, <4 x i32> %vsi, double %next, ...) {
; CHECK: STW killed [[ADDI]], 0, %stack.0.arg_list :: (store (s32) into %ir.0)
; CHECK: [[ADDI1:%[0-9]+]]:gprc = ADDI %fixed-stack.0, 15
; CHECK: [[RLWINM:%[0-9]+]]:gprc_and_gprc_nor0 = RLWINM killed [[ADDI1]], 0, 0, 27
- ; CHECK: [[ADDI2:%[0-9]+]]:gprc = nuw ADDI killed [[RLWINM]], 16
- ; CHECK: [[XFLOADf64_:%[0-9]+]]:vsfrc = XFLOADf64 $zero, killed [[ADDI2]] :: (load (s64) from %ir.4, align 16)
+ ; CHECK: [[LFD:%[0-9]+]]:f8rc = LFD 16, killed [[RLWINM]] :: (load (s64) from %ir.4, align 16)
; CHECK: LIFETIME_END %stack.0.arg_list
- ; CHECK: $f1 = COPY [[XFLOADf64_]]
+ ; CHECK: $f1 = COPY [[LFD]]
; CHECK: BLR implicit $lr, implicit $rm, implicit $f1
entry:
%arg_list = alloca i8*, align 4
diff --git a/llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll b/llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll
index 98eafff6068a..fa879b947a4f 100644
--- a/llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll
+++ b/llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll
@@ -21,10 +21,9 @@ define double @callee(i32 signext %count, <4 x i32> %vsi, double %next, ...) {
; CHECK: STD killed [[ADDI8_]], 0, %stack.0.arg_list :: (store (s64) into %ir.0)
; CHECK: [[ADDI8_1:%[0-9]+]]:g8rc = ADDI8 %fixed-stack.0, 15
; CHECK: [[RLDICR:%[0-9]+]]:g8rc_and_g8rc_nox0 = RLDICR killed [[ADDI8_1]], 0, 59
- ; CHECK: [[LI8_:%[0-9]+]]:g8rc = LI8 16
- ; CHECK: [[XFLOADf64_:%[0-9]+]]:vsfrc = XFLOADf64 killed [[RLDICR]], killed [[LI8_]] :: (load (s64) from %ir.4, align 16)
+ ; CHECK: [[LFD:%[0-9]+]]:f8rc = LFD 16, killed [[RLDICR]] :: (load (s64) from %ir.4, align 16)
; CHECK: LIFETIME_END %stack.0.arg_list
- ; CHECK: $f1 = COPY [[XFLOADf64_]]
+ ; CHECK: $f1 = COPY [[LFD]]
; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $f1
entry:
%arg_list = alloca i8*, align 8
diff --git a/llvm/test/CodeGen/PowerPC/build-vector-tests.ll b/llvm/test/CodeGen/PowerPC/build-vector-tests.ll
index b1820494a039..4bc1a9461d25 100644
--- a/llvm/test/CodeGen/PowerPC/build-vector-tests.ll
+++ b/llvm/test/CodeGen/PowerPC/build-vector-tests.ll
@@ -858,14 +858,14 @@ define <4 x i32> @fromDiffConstsi() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI5_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsi:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI5_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsi:
@@ -927,7 +927,7 @@ define <4 x i32> @fromDiffMemConsDi(i32* nocapture readonly %arr) {
; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: addis r3, r2, .LCPI7_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI7_0 at toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: blr
;
@@ -1022,11 +1022,11 @@ define <4 x i32> @fromDiffMemVarDi(i32* nocapture readonly %arr, i32 signext %el
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: sldi r4, r4, 2
; P9BE-NEXT: add r3, r3, r4
-; P9BE-NEXT: addi r3, r3, -12
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: li r4, -12
+; P9BE-NEXT: lxvx v2, r3, r4
; P9BE-NEXT: addis r3, r2, .LCPI9_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI9_0 at toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: blr
;
@@ -1034,11 +1034,11 @@ define <4 x i32> @fromDiffMemVarDi(i32* nocapture readonly %arr, i32 signext %el
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: sldi r4, r4, 2
; P9LE-NEXT: add r3, r3, r4
-; P9LE-NEXT: addi r3, r3, -12
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: li r4, -12
+; P9LE-NEXT: lxvx v2, r3, r4
; P9LE-NEXT: addis r3, r2, .LCPI9_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI9_0 at toc@l
-; P9LE-NEXT: lxvx v3, 0, r3
+; P9LE-NEXT: lxv v3, 0(r3)
; P9LE-NEXT: vperm v2, v2, v2, v3
; P9LE-NEXT: blr
;
@@ -1383,14 +1383,14 @@ define <4 x i32> @fromDiffConstsConvftoi() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI16_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI16_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvftoi:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI16_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI16_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvftoi:
@@ -1448,7 +1448,7 @@ define <4 x i32> @fromDiffMemConsDConvftoi(float* nocapture readonly %ptr) {
; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: addis r3, r2, .LCPI18_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI18_0 at toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: xvcvspsxws v2, v2
; P9BE-NEXT: blr
@@ -1458,7 +1458,7 @@ define <4 x i32> @fromDiffMemConsDConvftoi(float* nocapture readonly %ptr) {
; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: addis r3, r2, .LCPI18_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI18_0 at toc@l
-; P9LE-NEXT: lxvx v3, 0, r3
+; P9LE-NEXT: lxv v3, 0(r3)
; P9LE-NEXT: vperm v2, v2, v2, v3
; P9LE-NEXT: xvcvspsxws v2, v2
; P9LE-NEXT: blr
@@ -1837,14 +1837,14 @@ define <4 x i32> @fromDiffConstsConvdtoi() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI25_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI25_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvdtoi:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI25_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI25_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvdtoi:
@@ -1953,23 +1953,23 @@ define <4 x i32> @fromDiffMemConsDConvdtoi(double* nocapture readonly %ptr) {
;
; P8BE-LABEL: fromDiffMemConsDConvdtoi:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfdx f3, 0, r3
-; P8BE-NEXT: lfd f0, 24(r3)
-; P8BE-NEXT: lfd f1, 8(r3)
-; P8BE-NEXT: lfd f2, 16(r3)
+; P8BE-NEXT: lfd f0, 16(r3)
+; P8BE-NEXT: lfd f1, 0(r3)
+; P8BE-NEXT: lfd f2, 24(r3)
+; P8BE-NEXT: lfd f3, 8(r3)
; P8BE-NEXT: xxmrghd vs0, vs0, vs1
; P8BE-NEXT: xxmrghd vs1, vs2, vs3
; P8BE-NEXT: xvcvdpsxws v2, vs0
; P8BE-NEXT: xvcvdpsxws v3, vs1
-; P8BE-NEXT: vmrgew v2, v2, v3
+; P8BE-NEXT: vmrgew v2, v3, v2
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemConsDConvdtoi:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfdx f3, 0, r3
; P8LE-NEXT: lfd f0, 24(r3)
; P8LE-NEXT: lfd f1, 8(r3)
; P8LE-NEXT: lfd f2, 16(r3)
+; P8LE-NEXT: lfd f3, 0(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: xvcvdpsxws v2, vs0
@@ -2377,14 +2377,14 @@ define <4 x i32> @fromDiffConstsui() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI37_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI37_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsui:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI37_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI37_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsui:
@@ -2446,7 +2446,7 @@ define <4 x i32> @fromDiffMemConsDui(i32* nocapture readonly %arr) {
; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: addis r3, r2, .LCPI39_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI39_0 at toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: blr
;
@@ -2541,11 +2541,11 @@ define <4 x i32> @fromDiffMemVarDui(i32* nocapture readonly %arr, i32 signext %e
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: sldi r4, r4, 2
; P9BE-NEXT: add r3, r3, r4
-; P9BE-NEXT: addi r3, r3, -12
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: li r4, -12
+; P9BE-NEXT: lxvx v2, r3, r4
; P9BE-NEXT: addis r3, r2, .LCPI41_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI41_0 at toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: blr
;
@@ -2553,11 +2553,11 @@ define <4 x i32> @fromDiffMemVarDui(i32* nocapture readonly %arr, i32 signext %e
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: sldi r4, r4, 2
; P9LE-NEXT: add r3, r3, r4
-; P9LE-NEXT: addi r3, r3, -12
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: li r4, -12
+; P9LE-NEXT: lxvx v2, r3, r4
; P9LE-NEXT: addis r3, r2, .LCPI41_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI41_0 at toc@l
-; P9LE-NEXT: lxvx v3, 0, r3
+; P9LE-NEXT: lxv v3, 0(r3)
; P9LE-NEXT: vperm v2, v2, v2, v3
; P9LE-NEXT: blr
;
@@ -2902,14 +2902,14 @@ define <4 x i32> @fromDiffConstsConvftoui() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI48_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI48_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvftoui:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI48_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI48_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvftoui:
@@ -2967,7 +2967,7 @@ define <4 x i32> @fromDiffMemConsDConvftoui(float* nocapture readonly %ptr) {
; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: addis r3, r2, .LCPI50_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI50_0 at toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: xvcvspuxws v2, v2
; P9BE-NEXT: blr
@@ -2977,7 +2977,7 @@ define <4 x i32> @fromDiffMemConsDConvftoui(float* nocapture readonly %ptr) {
; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: addis r3, r2, .LCPI50_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI50_0 at toc@l
-; P9LE-NEXT: lxvx v3, 0, r3
+; P9LE-NEXT: lxv v3, 0(r3)
; P9LE-NEXT: vperm v2, v2, v2, v3
; P9LE-NEXT: xvcvspuxws v2, v2
; P9LE-NEXT: blr
@@ -3357,14 +3357,14 @@ define <4 x i32> @fromDiffConstsConvdtoui() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI57_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI57_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvdtoui:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI57_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI57_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvdtoui:
@@ -3473,23 +3473,23 @@ define <4 x i32> @fromDiffMemConsDConvdtoui(double* nocapture readonly %ptr) {
;
; P8BE-LABEL: fromDiffMemConsDConvdtoui:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfdx f3, 0, r3
-; P8BE-NEXT: lfd f0, 24(r3)
-; P8BE-NEXT: lfd f1, 8(r3)
-; P8BE-NEXT: lfd f2, 16(r3)
+; P8BE-NEXT: lfd f0, 16(r3)
+; P8BE-NEXT: lfd f1, 0(r3)
+; P8BE-NEXT: lfd f2, 24(r3)
+; P8BE-NEXT: lfd f3, 8(r3)
; P8BE-NEXT: xxmrghd vs0, vs0, vs1
; P8BE-NEXT: xxmrghd vs1, vs2, vs3
; P8BE-NEXT: xvcvdpuxws v2, vs0
; P8BE-NEXT: xvcvdpuxws v3, vs1
-; P8BE-NEXT: vmrgew v2, v2, v3
+; P8BE-NEXT: vmrgew v2, v3, v2
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemConsDConvdtoui:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfdx f3, 0, r3
; P8LE-NEXT: lfd f0, 24(r3)
; P8LE-NEXT: lfd f1, 8(r3)
; P8LE-NEXT: lfd f2, 16(r3)
+; P8LE-NEXT: lfd f3, 0(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: xvcvdpuxws v2, vs0
@@ -3777,14 +3777,14 @@ define <2 x i64> @spltConst1ll() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI65_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI65_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst1ll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI65_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI65_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst1ll:
@@ -3810,14 +3810,14 @@ define <2 x i64> @spltConst16kll() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI66_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI66_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst16kll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI66_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI66_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst16kll:
@@ -3843,14 +3843,14 @@ define <2 x i64> @spltConst32kll() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI67_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI67_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst32kll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI67_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI67_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst32kll:
@@ -3906,14 +3906,14 @@ define <2 x i64> @fromDiffConstsll() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI69_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI69_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI69_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI69_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsll:
@@ -4240,14 +4240,14 @@ define <2 x i64> @spltCnstConvftoll() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI78_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI78_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltCnstConvftoll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI78_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI78_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltCnstConvftoll:
@@ -4313,14 +4313,14 @@ define <2 x i64> @fromDiffConstsConvftoll() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI80_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI80_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvftoll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI80_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI80_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvftoll:
@@ -4360,7 +4360,7 @@ define <2 x i64> @fromDiffMemConsAConvftoll(float* nocapture readonly %ptr) {
;
; P8BE-LABEL: fromDiffMemConsAConvftoll:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfsx f0, 0, r3
+; P8BE-NEXT: lfs f0, 0(r3)
; P8BE-NEXT: lfs f1, 4(r3)
; P8BE-NEXT: xxmrghd vs0, vs0, vs1
; P8BE-NEXT: xvcvdpsxds v2, vs0
@@ -4368,7 +4368,7 @@ define <2 x i64> @fromDiffMemConsAConvftoll(float* nocapture readonly %ptr) {
;
; P8LE-LABEL: fromDiffMemConsAConvftoll:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfsx f0, 0, r3
+; P8LE-NEXT: lfs f0, 0(r3)
; P8LE-NEXT: lfs f1, 4(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xvcvdpsxds v2, vs0
@@ -4602,14 +4602,14 @@ define <2 x i64> @spltCnstConvdtoll() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI87_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI87_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltCnstConvdtoll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI87_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI87_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltCnstConvdtoll:
@@ -4675,14 +4675,14 @@ define <2 x i64> @fromDiffConstsConvdtoll() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI89_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI89_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvdtoll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI89_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI89_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvdtoll:
@@ -4965,14 +4965,14 @@ define <2 x i64> @spltConst1ull() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI97_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI97_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst1ull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI97_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI97_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst1ull:
@@ -4998,14 +4998,14 @@ define <2 x i64> @spltConst16kull() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI98_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI98_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst16kull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI98_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI98_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst16kull:
@@ -5031,14 +5031,14 @@ define <2 x i64> @spltConst32kull() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI99_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI99_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst32kull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI99_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI99_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst32kull:
@@ -5094,14 +5094,14 @@ define <2 x i64> @fromDiffConstsull() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI101_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI101_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI101_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI101_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsull:
@@ -5428,14 +5428,14 @@ define <2 x i64> @spltCnstConvftoull() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI110_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI110_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltCnstConvftoull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI110_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI110_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltCnstConvftoull:
@@ -5501,14 +5501,14 @@ define <2 x i64> @fromDiffConstsConvftoull() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI112_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI112_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvftoull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI112_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI112_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvftoull:
@@ -5548,7 +5548,7 @@ define <2 x i64> @fromDiffMemConsAConvftoull(float* nocapture readonly %ptr) {
;
; P8BE-LABEL: fromDiffMemConsAConvftoull:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfsx f0, 0, r3
+; P8BE-NEXT: lfs f0, 0(r3)
; P8BE-NEXT: lfs f1, 4(r3)
; P8BE-NEXT: xxmrghd vs0, vs0, vs1
; P8BE-NEXT: xvcvdpuxds v2, vs0
@@ -5556,7 +5556,7 @@ define <2 x i64> @fromDiffMemConsAConvftoull(float* nocapture readonly %ptr) {
;
; P8LE-LABEL: fromDiffMemConsAConvftoull:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfsx f0, 0, r3
+; P8LE-NEXT: lfs f0, 0(r3)
; P8LE-NEXT: lfs f1, 4(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xvcvdpuxds v2, vs0
@@ -5790,14 +5790,14 @@ define <2 x i64> @spltCnstConvdtoull() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI119_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI119_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltCnstConvdtoull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI119_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI119_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltCnstConvdtoull:
@@ -5863,14 +5863,14 @@ define <2 x i64> @fromDiffConstsConvdtoull() {
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI121_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI121_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvdtoull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI121_0 at toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI121_0 at toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvdtoull:
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
index bd8d6099c40f..6bb1d2d23ab8 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
@@ -112,7 +112,7 @@ entry:
ret fp128 %2
; CHECK-LABEL: insert_exp_qp
; CHECK-DAG: mtfprd [[FPREG:f[0-9]+]], r3
-; CHECK-DAG: lxvx [[VECREG:v[0-9]+]]
+; CHECK-DAG: lxv [[VECREG:v[0-9]+]]
; CHECK: xsiexpqp v2, [[VECREG]], [[FPREG]]
; CHECK: blr
}
@@ -127,7 +127,7 @@ entry:
%1 = call i64 @llvm.ppc.scalar.extract.expq(fp128 %0)
ret i64 %1
; CHECK-LABEL: extract_exp
-; CHECK: lxvx [[VECIN:v[0-9]+]]
+; CHECK: lxv [[VECIN:v[0-9]+]]
; CHECK: xsxexpqp [[VECOUT:v[0-9]+]], [[VECIN]]
; CHECK: mfvsrd r3, [[VECOUT]]
; CHECK: blr
diff --git a/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll b/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
index f2ca4d2c8c2d..0d5bb96e57fd 100644
--- a/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
+++ b/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
@@ -421,7 +421,7 @@ define dso_local <8 x i16> @testmrglb3(<8 x i8>* nocapture readonly %a) local_un
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI12_0 at toc@ha
; CHECK-P9-BE-NEXT: xxlxor v4, v4, v4
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI12_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-BE-NEXT: blr
;
@@ -596,7 +596,7 @@ define dso_local <4 x i32> @replace_undefs_in_splat(<4 x i32> %a) local_unnamed_
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI15_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI15_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vmrgow v2, v3, v2
; CHECK-P9-NEXT: blr
;
@@ -604,10 +604,10 @@ define dso_local <4 x i32> @replace_undefs_in_splat(<4 x i32> %a) local_unnamed_
; CHECK-P9-BE: # %bb.0: # %entry
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI15_0 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI15_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI15_1 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI15_1 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v4, 0, r3
+; CHECK-P9-BE-NEXT: lxv v4, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v4, v3
; CHECK-P9-BE-NEXT: blr
;
@@ -656,7 +656,7 @@ define dso_local <16 x i8> @no_RAUW_in_combine_during_legalize(i32* nocapture re
; CHECK-P9-NEXT: lxsiwzx v2, r3, r4
; CHECK-P9-NEXT: addis r3, r2, .LCPI16_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI16_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: blr
;
@@ -841,14 +841,14 @@ define dso_local void @testByteSplat() #0 {
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lxsibzx v2, 0, r3
; CHECK-P9-NEXT: vspltb v2, v2, 7
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P9-BE-LABEL: testByteSplat:
; CHECK-P9-BE: # %bb.0: # %entry
; CHECK-P9-BE-NEXT: lxsibzx v2, 0, r3
; CHECK-P9-BE-NEXT: vspltb v2, v2, 7
-; CHECK-P9-BE-NEXT: stxvx v2, 0, r3
+; CHECK-P9-BE-NEXT: stxv v2, 0(r3)
; CHECK-P9-BE-NEXT: blr
;
; CHECK-NOVSX-LABEL: testByteSplat:
diff --git a/llvm/test/CodeGen/PowerPC/constant-pool.ll b/llvm/test/CodeGen/PowerPC/constant-pool.ll
index d8a833c4be1e..3444281df445 100644
--- a/llvm/test/CodeGen/PowerPC/constant-pool.ll
+++ b/llvm/test/CodeGen/PowerPC/constant-pool.ll
@@ -72,7 +72,7 @@ entry:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI3_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI3_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret fp128 0xL00000000000000003C00FFFFC5D02B3A
@@ -88,7 +88,7 @@ entry:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <16 x i8> <i8 -128, i8 -127, i8 -126, i8 -125, i8 -124, i8 -123, i8 -122, i8 -121, i8 -120, i8 -119, i8 -118, i8 -117, i8 -116, i8 -115, i8 -114, i8 -113>
@@ -104,7 +104,7 @@ entry:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI5_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <8 x i16> <i16 -32768, i16 -32767, i16 -32766, i16 -32765, i16 -32764, i16 -32763, i16 -32762, i16 -32761>
@@ -120,7 +120,7 @@ entry:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI6_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI6_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <4 x i32> <i32 -2147483648, i32 -2147483647, i32 -2147483646, i32 -2147483645>
@@ -136,7 +136,7 @@ entry:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI7_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI7_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <2 x i64> <i64 -9223372036854775808, i64 -9223372036854775807>
@@ -152,7 +152,7 @@ entry:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI8_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI8_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <1 x i128> <i128 -27670116110564327424>
@@ -168,7 +168,7 @@ entry:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI9_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI9_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <4 x float> <float 0x380FFFF840000000, float 0x380FFF57C0000000, float 0x3843FFFB20000000, float 0x3843FF96C0000000>
@@ -184,7 +184,7 @@ entry:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI10_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI10_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <2 x double> <double 2.225070e-308, double 2.225000e-308>
@@ -337,15 +337,15 @@ define fp128 @three_constants_f128(fp128 %a, fp128 %c) {
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI15_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI15_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs35, 0, r3
+; CHECK-P9-NEXT: lxv vs35, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LCPI15_1 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI15_1 at toc@l
; CHECK-P9-NEXT: xsaddqp v2, v2, v3
-; CHECK-P9-NEXT: lxvx vs35, 0, r3
+; CHECK-P9-NEXT: lxv vs35, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LCPI15_2 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI15_2 at toc@l
; CHECK-P9-NEXT: xsaddqp v2, v2, v3
-; CHECK-P9-NEXT: lxvx vs35, 0, r3
+; CHECK-P9-NEXT: lxv vs35, 0(r3)
; CHECK-P9-NEXT: xsaddqp v2, v2, v3
; CHECK-P9-NEXT: blr
entry:
@@ -433,10 +433,10 @@ define <2 x double> @three_constants_vector(<2 x double> %a, <2 x double> %c) {
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI17_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI17_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs0, 0, r3
+; CHECK-P9-NEXT: lxv vs0, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LCPI17_1 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI17_1 at toc@l
-; CHECK-P9-NEXT: lxvx vs2, 0, r3
+; CHECK-P9-NEXT: lxv vs2, 0(r3)
; CHECK-P9-NEXT: xvadddp vs1, vs34, vs0
; CHECK-P9-NEXT: xvadddp vs1, vs1, vs2
; CHECK-P9-NEXT: xvadddp vs34, vs1, vs0
diff --git a/llvm/test/CodeGen/PowerPC/ctrloop-constrained-fp.ll b/llvm/test/CodeGen/PowerPC/ctrloop-constrained-fp.ll
index 8e4dd3515f3d..e36c3109f73b 100644
--- a/llvm/test/CodeGen/PowerPC/ctrloop-constrained-fp.ll
+++ b/llvm/test/CodeGen/PowerPC/ctrloop-constrained-fp.ll
@@ -23,7 +23,7 @@ define void @test(double* %cast) {
; CHECK-NEXT: bl cos
; CHECK-NEXT: nop
; CHECK-NEXT: addi 30, 30, 8
-; CHECK-NEXT: stfdx 1, 0, 29
+; CHECK-NEXT: stfd 1, 0(29)
; CHECK-NEXT: cmpldi 30, 2040
; CHECK-NEXT: bne 0, .LBB0_1
; CHECK-NEXT: # %bb.2: # %exit
@@ -62,7 +62,7 @@ define void @test2(double* %cast) {
; CHECK-NEXT: #
; CHECK-NEXT: lfdu 0, 8(3)
; CHECK-NEXT: xssqrtdp 0, 0
-; CHECK-NEXT: stfdx 0, 0, 3
+; CHECK-NEXT: stfd 0, 0(3)
; CHECK-NEXT: bdnz .LBB1_1
; CHECK-NEXT: # %bb.2: # %exit
; CHECK-NEXT: blr
diff --git a/llvm/test/CodeGen/PowerPC/extract-and-store.ll b/llvm/test/CodeGen/PowerPC/extract-and-store.ll
index 86c9930b1f55..d03a35fd7280 100644
--- a/llvm/test/CodeGen/PowerPC/extract-and-store.ll
+++ b/llvm/test/CodeGen/PowerPC/extract-and-store.ll
@@ -599,7 +599,7 @@ define dso_local void @test_stores_exceed_vec_size(<4 x i32> %a, i32* nocapture
; CHECK-P9-NEXT: addis r3, r2, .LCPI16_0 at toc@ha
; CHECK-P9-NEXT: xxsldwi vs0, vs34, vs34, 1
; CHECK-P9-NEXT: addi r3, r3, .LCPI16_0 at toc@l
-; CHECK-P9-NEXT: lxvx vs35, 0, r3
+; CHECK-P9-NEXT: lxv vs35, 0(r3)
; CHECK-P9-NEXT: li r3, 16
; CHECK-P9-NEXT: stfiwx f0, r5, r3
; CHECK-P9-NEXT: li r3, 20
diff --git a/llvm/test/CodeGen/PowerPC/f128-aggregates.ll b/llvm/test/CodeGen/PowerPC/f128-aggregates.ll
index 0172042a044c..bac79e2639c0 100644
--- a/llvm/test/CodeGen/PowerPC/f128-aggregates.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-aggregates.ll
@@ -541,7 +541,7 @@ define fp128 @sum_float128(i32 signext %count, ...) {
; CHECK-NEXT: std r6, 56(r1)
; CHECK-NEXT: std r7, 64(r1)
; CHECK-NEXT: std r8, 72(r1)
-; CHECK-NEXT: lxvx v2, 0, r4
+; CHECK-NEXT: lxv v2, 0(r4)
; CHECK-NEXT: std r9, 80(r1)
; CHECK-NEXT: std r10, 88(r1)
; CHECK-NEXT: bltlr cr0
@@ -565,7 +565,7 @@ define fp128 @sum_float128(i32 signext %count, ...) {
; CHECK-BE-NEXT: std r6, 72(r1)
; CHECK-BE-NEXT: std r7, 80(r1)
; CHECK-BE-NEXT: std r8, 88(r1)
-; CHECK-BE-NEXT: lxvx v2, 0, r4
+; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: std r9, 96(r1)
; CHECK-BE-NEXT: std r10, 104(r1)
; CHECK-BE-NEXT: bltlr cr0
diff --git a/llvm/test/CodeGen/PowerPC/f128-arith.ll b/llvm/test/CodeGen/PowerPC/f128-arith.ll
index 95922dab0cc2..dc67d48e871a 100644
--- a/llvm/test/CodeGen/PowerPC/f128-arith.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-arith.ll
@@ -152,10 +152,10 @@ entry:
define dso_local void @testLdNSt(i8* nocapture readonly %PtrC, fp128* nocapture %PtrF) {
; CHECK-LABEL: testLdNSt:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 4
-; CHECK-NEXT: addi r4, r4, 8
-; CHECK-NEXT: lxvx vs0, 0, r3
-; CHECK-NEXT: stxvx vs0, 0, r4
+; CHECK-NEXT: li r5, 4
+; CHECK-NEXT: lxvx vs0, r3, r5
+; CHECK-NEXT: li r3, 8
+; CHECK-NEXT: stxvx vs0, r4, r3
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: testLdNSt:
@@ -784,10 +784,10 @@ define fp128 @qp_frem() #0 {
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis r3, r2, a at toc@ha
; CHECK-NEXT: addi r3, r3, a at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b at toc@ha
; CHECK-NEXT: addi r3, r3, b at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: bl fmodf128
; CHECK-NEXT: nop
; CHECK-NEXT: addi r1, r1, 32
diff --git a/llvm/test/CodeGen/PowerPC/f128-compare.ll b/llvm/test/CodeGen/PowerPC/f128-compare.ll
index f27a4dacfdec..d57ee87ea919 100644
--- a/llvm/test/CodeGen/PowerPC/f128-compare.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-compare.ll
@@ -15,10 +15,10 @@ define dso_local signext i32 @greater_qp() {
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: li r4, 1
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: iselgt r3, r4, r3
@@ -61,10 +61,10 @@ define dso_local signext i32 @less_qp() {
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: li r4, 1
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: isellt r3, r4, r3
@@ -104,10 +104,10 @@ define dso_local signext i32 @greater_eq_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: cror 4*cr5+lt, un, lt
@@ -149,10 +149,10 @@ define dso_local signext i32 @less_eq_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: cror 4*cr5+lt, un, gt
@@ -197,10 +197,10 @@ define dso_local signext i32 @equal_qp() {
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: li r4, 1
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: iseleq r3, r4, r3
@@ -241,10 +241,10 @@ define dso_local signext i32 @not_greater_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: iselgt r3, 0, r3
@@ -288,10 +288,10 @@ define dso_local signext i32 @not_less_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: isellt r3, 0, r3
@@ -333,10 +333,10 @@ define dso_local signext i32 @not_greater_eq_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: crnor 4*cr5+lt, lt, un
@@ -378,10 +378,10 @@ define dso_local signext i32 @not_less_eq_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: crnor 4*cr5+lt, gt, un
@@ -425,10 +425,10 @@ define dso_local signext i32 @not_equal_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: iseleq r3, 0, r3
@@ -470,10 +470,10 @@ define fp128 @greater_sel_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: bgtlr cr0
; CHECK-NEXT: # %bb.1: # %entry
@@ -531,10 +531,10 @@ define fp128 @less_sel_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: bltlr cr0
; CHECK-NEXT: # %bb.1: # %entry
@@ -592,10 +592,10 @@ define fp128 @greater_eq_sel_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: crnor 4*cr5+lt, un, lt
; CHECK-NEXT: bclr 12, 4*cr5+lt, 0
@@ -654,10 +654,10 @@ define fp128 @less_eq_sel_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: crnor 4*cr5+lt, un, gt
; CHECK-NEXT: bclr 12, 4*cr5+lt, 0
@@ -716,10 +716,10 @@ define fp128 @equal_sel_qp() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp at toc@ha
; CHECK-NEXT: addi r3, r3, a_qp at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp at toc@ha
; CHECK-NEXT: addi r3, r3, b_qp at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: beqlr cr0
; CHECK-NEXT: # %bb.1: # %entry
diff --git a/llvm/test/CodeGen/PowerPC/f128-conv.ll b/llvm/test/CodeGen/PowerPC/f128-conv.ll
index 2e34bb606dda..047993bf1ca9 100644
--- a/llvm/test/CodeGen/PowerPC/f128-conv.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-conv.ll
@@ -1144,7 +1144,7 @@ define void @qpConv2dp_02(double* nocapture %res) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC6 at toc@ha
; CHECK-NEXT: ld r4, .LC6 at toc@l(r4)
-; CHECK-NEXT: lxvx v2, 0, r4
+; CHECK-NEXT: lxv v2, 0(r4)
; CHECK-NEXT: xscvqpdp v2, v2
; CHECK-NEXT: stxsd v2, 0(r3)
; CHECK-NEXT: blr
@@ -1164,7 +1164,7 @@ define void @qpConv2dp_02(double* nocapture %res) {
; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop
-; CHECK-P8-NEXT: stfdx f1, 0, r30
+; CHECK-P8-NEXT: stfd f1, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
@@ -1184,7 +1184,7 @@ define void @qpConv2dp_03(double* nocapture %res, i32 signext %idx) {
; CHECK-NEXT: addis r5, r2, .LC7 at toc@ha
; CHECK-NEXT: sldi r4, r4, 3
; CHECK-NEXT: ld r5, .LC7 at toc@l(r5)
-; CHECK-NEXT: lxvx v2, 0, r5
+; CHECK-NEXT: lxv v2, 0(r5)
; CHECK-NEXT: xscvqpdp v2, v2
; CHECK-NEXT: stxsdx v2, r3, r4
; CHECK-NEXT: blr
@@ -1251,7 +1251,7 @@ define void @qpConv2dp_04(fp128* nocapture readonly %a, fp128* nocapture readonl
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop
-; CHECK-P8-NEXT: stfdx f1, 0, r30
+; CHECK-P8-NEXT: stfd f1, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
@@ -1303,7 +1303,7 @@ define void @qpConv2sp_02(float* nocapture %res) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC6 at toc@ha
; CHECK-NEXT: ld r4, .LC6 at toc@l(r4)
-; CHECK-NEXT: lxvx v2, 0, r4
+; CHECK-NEXT: lxv v2, 0(r4)
; CHECK-NEXT: xscvqpdpo v2, v2
; CHECK-NEXT: xsrsp f0, v2
; CHECK-NEXT: stfs f0, 0(r3)
@@ -1324,7 +1324,7 @@ define void @qpConv2sp_02(float* nocapture %res) {
; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: bl __trunckfsf2
; CHECK-P8-NEXT: nop
-; CHECK-P8-NEXT: stfsx f1, 0, r30
+; CHECK-P8-NEXT: stfs f1, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
@@ -1414,7 +1414,7 @@ define void @qpConv2sp_04(fp128* nocapture readonly %a, fp128* nocapture readonl
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __trunckfsf2
; CHECK-P8-NEXT: nop
-; CHECK-P8-NEXT: stfsx f1, 0, r30
+; CHECK-P8-NEXT: stfs f1, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
@@ -1465,7 +1465,7 @@ define void @dpConv2qp_02(double* nocapture readonly %a) {
; CHECK-NEXT: addis r3, r2, .LC8 at toc@ha
; CHECK-NEXT: ld r3, .LC8 at toc@l(r3)
; CHECK-NEXT: xscvdpqp v2, v2
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: dpConv2qp_02:
@@ -1475,7 +1475,7 @@ define void @dpConv2qp_02(double* nocapture readonly %a) {
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: lfdx f1, 0, r3
+; CHECK-P8-NEXT: lfd f1, 0(r3)
; CHECK-P8-NEXT: bl __extenddfkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addis r3, r2, .LC8 at toc@ha
@@ -1501,7 +1501,7 @@ define void @dpConv2qp_02b(double* nocapture readonly %a, i32 signext %idx) {
; CHECK-NEXT: addis r3, r2, .LC8 at toc@ha
; CHECK-NEXT: ld r3, .LC8 at toc@l(r3)
; CHECK-NEXT: xscvdpqp v2, v2
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: dpConv2qp_02b:
@@ -1639,7 +1639,7 @@ define void @spConv2qp_02(float* nocapture readonly %a) {
; CHECK-NEXT: addis r3, r2, .LC8 at toc@ha
; CHECK-NEXT: ld r3, .LC8 at toc@l(r3)
; CHECK-NEXT: xscvdpqp v2, v2
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: spConv2qp_02:
@@ -1649,7 +1649,7 @@ define void @spConv2qp_02(float* nocapture readonly %a) {
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: lfsx f1, 0, r3
+; CHECK-P8-NEXT: lfs f1, 0(r3)
; CHECK-P8-NEXT: bl __extendsfkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addis r3, r2, .LC8 at toc@ha
@@ -1675,7 +1675,7 @@ define void @spConv2qp_02b(float* nocapture readonly %a, i32 signext %idx) {
; CHECK-NEXT: addis r3, r2, .LC8 at toc@ha
; CHECK-NEXT: ld r3, .LC8 at toc@l(r3)
; CHECK-NEXT: xscvdpqp v2, v2
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: spConv2qp_02b:
diff --git a/llvm/test/CodeGen/PowerPC/f128-passByValue.ll b/llvm/test/CodeGen/PowerPC/f128-passByValue.ll
index 5c17dda209e9..c4783e8f2c12 100644
--- a/llvm/test/CodeGen/PowerPC/f128-passByValue.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-passByValue.ll
@@ -11,7 +11,7 @@ define fp128 @loadConstant() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, .LCPI0_0 at toc@ha
; CHECK-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: loadConstant:
@@ -31,7 +31,7 @@ define fp128 @loadConstant2(fp128 %a, fp128 %b) {
; CHECK-NEXT: xsaddqp v2, v2, v3
; CHECK-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; CHECK-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xsaddqp v2, v2, v3
; CHECK-NEXT: blr
;
@@ -554,7 +554,7 @@ define void @mixParam_03(fp128 %f1, double* nocapture %d1, <4 x i32> %vec1,
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld r3, 104(r1)
; CHECK-NEXT: stxv v2, 0(r9)
-; CHECK-NEXT: stxvx v3, 0, r3
+; CHECK-NEXT: stxv v3, 0(r3)
; CHECK-NEXT: mtvsrwa v3, r10
; CHECK-NEXT: lxv v2, 0(r9)
; CHECK-NEXT: xscvsdqp v3, v3
@@ -590,7 +590,7 @@ define void @mixParam_03(fp128 %f1, double* nocapture %d1, <4 x i32> %vec1,
; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: li r3, 48
-; CHECK-P8-NEXT: stfdx f1, 0, r30
+; CHECK-P8-NEXT: stfd f1, 0(r30)
; CHECK-P8-NEXT: ld r30, 64(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: lvx v31, r1, r3 # 16-byte Folded Reload
; CHECK-P8-NEXT: addi r1, r1, 80
@@ -650,7 +650,7 @@ define fastcc void @mixParam_03f(fp128 %f1, double* nocapture %d1, <4 x i32> %ve
; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: li r3, 48
-; CHECK-P8-NEXT: stfdx f1, 0, r30
+; CHECK-P8-NEXT: stfd f1, 0(r30)
; CHECK-P8-NEXT: ld r30, 64(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: lvx v31, r1, r3 # 16-byte Folded Reload
; CHECK-P8-NEXT: addi r1, r1, 80
diff --git a/llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll b/llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll
index 32b0f10def29..0fcf5c81c4bf 100644
--- a/llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll
@@ -392,7 +392,7 @@ define void @qpConv2udw_testXForm(i64* nocapture %res, i32 signext %idx) {
; CHECK-NEXT: addis r5, r2, .LC0 at toc@ha
; CHECK-NEXT: sldi r4, r4, 3
; CHECK-NEXT: ld r5, .LC0 at toc@l(r5)
-; CHECK-NEXT: lxvx v2, 0, r5
+; CHECK-NEXT: lxv v2, 0(r5)
; CHECK-NEXT: xscvqpudz v2, v2
; CHECK-NEXT: stxsdx v2, r3, r4
; CHECK-NEXT: blr
diff --git a/llvm/test/CodeGen/PowerPC/f128_ldst.ll b/llvm/test/CodeGen/PowerPC/f128_ldst.ll
index 641f9658895b..acea5a40bcfd 100644
--- a/llvm/test/CodeGen/PowerPC/f128_ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/f128_ldst.ll
@@ -31,8 +31,8 @@ entry:
define dso_local fp128 @ld_unalign16___float128___float128(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 1
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 1
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
@@ -45,8 +45,8 @@ entry:
define dso_local fp128 @ld_align16___float128___float128(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_align16___float128___float128:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 8
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 8
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@@ -163,7 +163,7 @@ define dso_local fp128 @ld_or___float128___float128(i64 %ptr, i8 zeroext %off) {
; CHECK-LABEL: ld_or___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@@ -194,7 +194,7 @@ define dso_local fp128 @ld_not_disjoint16___float128___float128(i64 %ptr) {
; CHECK-LABEL: ld_not_disjoint16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@@ -208,8 +208,8 @@ define dso_local fp128 @ld_disjoint_unalign16___float128___float128(i64 %ptr) {
; CHECK-LABEL: ld_disjoint_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 6
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@@ -224,8 +224,8 @@ define dso_local fp128 @ld_disjoint_align16___float128___float128(i64 %ptr) {
; CHECK-LABEL: ld_disjoint_align16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 24
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 24
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@@ -241,7 +241,7 @@ define dso_local fp128 @ld_not_disjoint32___float128___float128(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@@ -308,7 +308,7 @@ define dso_local fp128 @ld_not_disjoint64___float128___float128(i64 %ptr) {
; CHECK-P10-NEXT: pli r5, 3567587329
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64___float128___float128:
@@ -318,7 +318,7 @@ define dso_local fp128 @ld_not_disjoint64___float128___float128(i64 %ptr) {
; CHECK-PREP10-NEXT: oris r4, r4, 54437
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
-; CHECK-PREP10-NEXT: lxvx v2, 0, r3
+; CHECK-PREP10-NEXT: lxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@@ -386,7 +386,7 @@ define dso_local fp128 @ld_cst_unalign16___float128___float128() {
; CHECK-LABEL: ld_cst_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 255
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%0 = load fp128, fp128* inttoptr (i64 255 to fp128*), align 16
@@ -409,14 +409,14 @@ define dso_local fp128 @ld_cst_unalign32___float128___float128() {
; CHECK-P10-LABEL: ld_cst_unalign32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 99999
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_unalign32___float128___float128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r3, 1
; CHECK-PREP10-NEXT: ori r3, r3, 34463
-; CHECK-PREP10-NEXT: lxvx v2, 0, r3
+; CHECK-PREP10-NEXT: lxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load fp128, fp128* inttoptr (i64 99999 to fp128*), align 16
@@ -428,14 +428,14 @@ define dso_local fp128 @ld_cst_align32___float128___float128() {
; CHECK-P10-LABEL: ld_cst_align32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 9999900
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align32___float128___float128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r3, 152
; CHECK-PREP10-NEXT: ori r3, r3, 38428
-; CHECK-PREP10-NEXT: lxvx v2, 0, r3
+; CHECK-PREP10-NEXT: lxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load fp128, fp128* inttoptr (i64 9999900 to fp128*), align 16
@@ -449,7 +449,7 @@ define dso_local fp128 @ld_cst_unalign64___float128___float128() {
; CHECK-P10-NEXT: pli r3, 232
; CHECK-P10-NEXT: pli r4, 3567587329
; CHECK-P10-NEXT: rldimi r4, r3, 32, 0
-; CHECK-P10-NEXT: lxvx v2, 0, r4
+; CHECK-P10-NEXT: lxv v2, 0(r4)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_unalign64___float128___float128:
@@ -458,7 +458,7 @@ define dso_local fp128 @ld_cst_unalign64___float128___float128() {
; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
; CHECK-PREP10-NEXT: oris r3, r3, 54437
; CHECK-PREP10-NEXT: ori r3, r3, 4097
-; CHECK-PREP10-NEXT: lxvx v2, 0, r3
+; CHECK-PREP10-NEXT: lxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load fp128, fp128* inttoptr (i64 1000000000001 to fp128*), align 16
@@ -471,7 +471,7 @@ define dso_local fp128 @ld_cst_align64___float128___float128() {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64___float128___float128:
@@ -479,7 +479,7 @@ define dso_local fp128 @ld_cst_align64___float128___float128() {
; CHECK-PREP10-NEXT: lis r3, 3725
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
-; CHECK-PREP10-NEXT: lxvx v2, 0, r3
+; CHECK-PREP10-NEXT: lxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load fp128, fp128* inttoptr (i64 1000000000000 to fp128*), align 4096
@@ -502,8 +502,8 @@ entry:
define dso_local void @st_unalign16___float128___float128(i8* nocapture %ptr, fp128 %str) {
; CHECK-LABEL: st_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 1
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 1
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
@@ -516,8 +516,8 @@ entry:
define dso_local void @st_align16___float128___float128(i8* nocapture %ptr, fp128 %str) {
; CHECK-LABEL: st_align16___float128___float128:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 8
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 8
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
@@ -634,7 +634,7 @@ define dso_local void @st_or1___float128___float128(i64 %ptr, i8 zeroext %off, f
; CHECK-LABEL: st_or1___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
@@ -665,7 +665,7 @@ define dso_local void @st_not_disjoint16___float128___float128(i64 %ptr, fp128 %
; CHECK-LABEL: st_not_disjoint16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
@@ -679,8 +679,8 @@ define dso_local void @st_disjoint_unalign16___float128___float128(i64 %ptr, fp1
; CHECK-LABEL: st_disjoint_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 6
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@@ -695,8 +695,8 @@ define dso_local void @st_disjoint_align16___float128___float128(i64 %ptr, fp128
; CHECK-LABEL: st_disjoint_align16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 24
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 24
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
@@ -712,7 +712,7 @@ define dso_local void @st_not_disjoint32___float128___float128(i64 %ptr, fp128 %
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
@@ -779,7 +779,7 @@ define dso_local void @st_not_disjoint64___float128___float128(i64 %ptr, fp128 %
; CHECK-P10-NEXT: pli r5, 3567587329
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_not_disjoint64___float128___float128:
@@ -789,7 +789,7 @@ define dso_local void @st_not_disjoint64___float128___float128(i64 %ptr, fp128 %
; CHECK-PREP10-NEXT: oris r4, r4, 54437
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
-; CHECK-PREP10-NEXT: stxvx v2, 0, r3
+; CHECK-PREP10-NEXT: stxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
@@ -857,7 +857,7 @@ define dso_local void @st_cst_unalign16___float128___float128(fp128 %str) {
; CHECK-LABEL: st_cst_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 255
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
store fp128 %str, fp128* inttoptr (i64 255 to fp128*), align 16
@@ -880,14 +880,14 @@ define dso_local void @st_cst_unalign32___float128___float128(fp128 %str) {
; CHECK-P10-LABEL: st_cst_unalign32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 99999
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_cst_unalign32___float128___float128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r3, 1
; CHECK-PREP10-NEXT: ori r3, r3, 34463
-; CHECK-PREP10-NEXT: stxvx v2, 0, r3
+; CHECK-PREP10-NEXT: stxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
store fp128 %str, fp128* inttoptr (i64 99999 to fp128*), align 16
@@ -899,14 +899,14 @@ define dso_local void @st_cst_align32___float128___float128(fp128 %str) {
; CHECK-P10-LABEL: st_cst_align32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 9999900
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_cst_align32___float128___float128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r3, 152
; CHECK-PREP10-NEXT: ori r3, r3, 38428
-; CHECK-PREP10-NEXT: stxvx v2, 0, r3
+; CHECK-PREP10-NEXT: stxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
store fp128 %str, fp128* inttoptr (i64 9999900 to fp128*), align 16
@@ -920,7 +920,7 @@ define dso_local void @st_cst_unalign64___float128___float128(fp128 %str) {
; CHECK-P10-NEXT: pli r3, 232
; CHECK-P10-NEXT: pli r4, 3567587329
; CHECK-P10-NEXT: rldimi r4, r3, 32, 0
-; CHECK-P10-NEXT: stxvx v2, 0, r4
+; CHECK-P10-NEXT: stxv v2, 0(r4)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_cst_unalign64___float128___float128:
@@ -929,7 +929,7 @@ define dso_local void @st_cst_unalign64___float128___float128(fp128 %str) {
; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
; CHECK-PREP10-NEXT: oris r3, r3, 54437
; CHECK-PREP10-NEXT: ori r3, r3, 4097
-; CHECK-PREP10-NEXT: stxvx v2, 0, r3
+; CHECK-PREP10-NEXT: stxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
store fp128 %str, fp128* inttoptr (i64 1000000000001 to fp128*), align 16
@@ -942,7 +942,7 @@ define dso_local void @st_cst_align64___float128___float128(fp128 %str) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_cst_align64___float128___float128:
@@ -950,7 +950,7 @@ define dso_local void @st_cst_align64___float128___float128(fp128 %str) {
; CHECK-PREP10-NEXT: lis r3, 3725
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
-; CHECK-PREP10-NEXT: stxvx v2, 0, r3
+; CHECK-PREP10-NEXT: stxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
store fp128 %str, fp128* inttoptr (i64 1000000000000 to fp128*), align 4096
@@ -969,20 +969,20 @@ define dso_local void @testGlob128PtrPlus0() {
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd128 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd128 at toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: lxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt128 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt128 at toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: stxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: blr
;
; CHECK-PREP10-LABEL: testGlob128PtrPlus0:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: addis r3, r2, GlobLd128 at toc@ha
; CHECK-PREP10-NEXT: addi r3, r3, GlobLd128 at toc@l
-; CHECK-PREP10-NEXT: lxvx vs0, 0, r3
+; CHECK-PREP10-NEXT: lxv vs0, 0(r3)
; CHECK-PREP10-NEXT: addis r3, r2, GlobSt128 at toc@ha
; CHECK-PREP10-NEXT: addi r3, r3, GlobSt128 at toc@l
-; CHECK-PREP10-NEXT: stxvx vs0, 0, r3
+; CHECK-PREP10-NEXT: stxv vs0, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load fp128, fp128* getelementptr inbounds ([20 x fp128], [20 x fp128]* @GlobLd128, i64 0, i64 0), align 16
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll b/llvm/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll
index e3d528241e07..b3b4463b5f7f 100644
--- a/llvm/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll
+++ b/llvm/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll
@@ -17,7 +17,7 @@ entry:
%this.addr = alloca %SomeStruct*, align 8
%V.addr = alloca double, align 8
store %SomeStruct* %this, %SomeStruct** %this.addr, align 8
-; ELF64VSX: stfdx {{[0-9][0-9]?}}, 0, {{[1-9][0-9]?}}
+; ELF64VSX: stfd {{[0-9][0-9]?}}, -{{[1-9][0-9]?}}({{[1-9][0-9]?}})
store double %V, double* %V.addr, align 8
%this1 = load %SomeStruct*, %SomeStruct** %this.addr
%Val = getelementptr inbounds %SomeStruct, %SomeStruct* %this1, i32 0, i32 0
diff --git a/llvm/test/CodeGen/PowerPC/float-load-store-pair.ll b/llvm/test/CodeGen/PowerPC/float-load-store-pair.ll
index 351f13ce85d5..099a5284937d 100644
--- a/llvm/test/CodeGen/PowerPC/float-load-store-pair.ll
+++ b/llvm/test/CodeGen/PowerPC/float-load-store-pair.ll
@@ -42,8 +42,8 @@ define dso_local signext i32 @test() nounwind {
; CHECK-NEXT: ld 4, a15 at toc@l(4)
; CHECK-NEXT: lfd 2, a2 at toc@l(3)
; CHECK-NEXT: addis 3, 2, a3 at toc@ha
-; CHECK-NEXT: lxvx 34, 0, 6
-; CHECK-NEXT: lxvx 0, 0, 5
+; CHECK-NEXT: lxv 34, 0(6)
+; CHECK-NEXT: lxv 0, 0(5)
; CHECK-NEXT: li 5, 152
; CHECK-NEXT: lfd 3, a3 at toc@l(3)
; CHECK-NEXT: addis 3, 2, a4 at toc@ha
diff --git a/llvm/test/CodeGen/PowerPC/fma-combine.ll b/llvm/test/CodeGen/PowerPC/fma-combine.ll
index fa34c89a59fe..7fa9d2ba75a0 100644
--- a/llvm/test/CodeGen/PowerPC/fma-combine.ll
+++ b/llvm/test/CodeGen/PowerPC/fma-combine.ll
@@ -142,11 +142,11 @@ define dso_local float @fma_combine_no_ice() {
; CHECK-FAST-LABEL: fma_combine_no_ice:
; CHECK-FAST: # %bb.0:
; CHECK-FAST-NEXT: addis 3, 2, .LCPI4_0 at toc@ha
-; CHECK-FAST-NEXT: addis 4, 2, .LCPI4_1 at toc@ha
; CHECK-FAST-NEXT: lfs 0, .LCPI4_0 at toc@l(3)
-; CHECK-FAST-NEXT: lfsx 2, 0, 3
+; CHECK-FAST-NEXT: addis 3, 2, .LCPI4_1 at toc@ha
+; CHECK-FAST-NEXT: lfs 2, 0(3)
+; CHECK-FAST-NEXT: lfs 3, .LCPI4_1 at toc@l(3)
; CHECK-FAST-NEXT: addis 3, 2, .LCPI4_2 at toc@ha
-; CHECK-FAST-NEXT: lfs 3, .LCPI4_1 at toc@l(4)
; CHECK-FAST-NEXT: lfs 1, .LCPI4_2 at toc@l(3)
; CHECK-FAST-NEXT: xsmaddasp 3, 2, 0
; CHECK-FAST-NEXT: xsmaddasp 1, 2, 3
@@ -170,11 +170,11 @@ define dso_local float @fma_combine_no_ice() {
; CHECK-LABEL: fma_combine_no_ice:
; CHECK: # %bb.0:
; CHECK-NEXT: addis 3, 2, .LCPI4_0 at toc@ha
-; CHECK-NEXT: addis 4, 2, .LCPI4_1 at toc@ha
; CHECK-NEXT: lfs 0, .LCPI4_0 at toc@l(3)
-; CHECK-NEXT: lfsx 2, 0, 3
+; CHECK-NEXT: addis 3, 2, .LCPI4_1 at toc@ha
+; CHECK-NEXT: lfs 2, 0(3)
+; CHECK-NEXT: lfs 3, .LCPI4_1 at toc@l(3)
; CHECK-NEXT: addis 3, 2, .LCPI4_2 at toc@ha
-; CHECK-NEXT: lfs 3, .LCPI4_1 at toc@l(4)
; CHECK-NEXT: lfs 1, .LCPI4_2 at toc@l(3)
; CHECK-NEXT: fmr 4, 3
; CHECK-NEXT: xsmaddasp 3, 2, 0
@@ -202,9 +202,9 @@ define dso_local double @getNegatedExpression_crash(double %x, double %y) {
; CHECK-FAST-LABEL: getNegatedExpression_crash:
; CHECK-FAST: # %bb.0:
; CHECK-FAST-NEXT: addis 3, 2, .LCPI5_1 at toc@ha
-; CHECK-FAST-NEXT: addis 4, 2, .LCPI5_0 at toc@ha
; CHECK-FAST-NEXT: lfs 3, .LCPI5_1 at toc@l(3)
-; CHECK-FAST-NEXT: lfs 4, .LCPI5_0 at toc@l(4)
+; CHECK-FAST-NEXT: addis 3, 2, .LCPI5_0 at toc@ha
+; CHECK-FAST-NEXT: lfs 4, .LCPI5_0 at toc@l(3)
; CHECK-FAST-NEXT: xssubdp 0, 1, 3
; CHECK-FAST-NEXT: xsmaddadp 3, 1, 4
; CHECK-FAST-NEXT: xsmaddadp 0, 3, 2
@@ -225,9 +225,9 @@ define dso_local double @getNegatedExpression_crash(double %x, double %y) {
; CHECK-LABEL: getNegatedExpression_crash:
; CHECK: # %bb.0:
; CHECK-NEXT: addis 3, 2, .LCPI5_1 at toc@ha
-; CHECK-NEXT: addis 4, 2, .LCPI5_0 at toc@ha
; CHECK-NEXT: lfs 3, .LCPI5_1 at toc@l(3)
-; CHECK-NEXT: lfs 4, .LCPI5_0 at toc@l(4)
+; CHECK-NEXT: addis 3, 2, .LCPI5_0 at toc@ha
+; CHECK-NEXT: lfs 4, .LCPI5_0 at toc@l(3)
; CHECK-NEXT: xssubdp 0, 1, 3
; CHECK-NEXT: xsmaddadp 3, 1, 4
; CHECK-NEXT: xsmaddadp 0, 3, 2
diff --git a/llvm/test/CodeGen/PowerPC/fmf-propagation.ll b/llvm/test/CodeGen/PowerPC/fmf-propagation.ll
index 09cac791cca3..5052d3a93e45 100644
--- a/llvm/test/CodeGen/PowerPC/fmf-propagation.ll
+++ b/llvm/test/CodeGen/PowerPC/fmf-propagation.ll
@@ -311,9 +311,9 @@ define float @sqrt_afn_ieee(float %x) #0 {
; FMF-NEXT: # %bb.1:
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: addis 3, 2, .LCPI11_0 at toc@ha
-; FMF-NEXT: addis 4, 2, .LCPI11_1 at toc@ha
; FMF-NEXT: lfs 2, .LCPI11_0 at toc@l(3)
-; FMF-NEXT: lfs 3, .LCPI11_1 at toc@l(4)
+; FMF-NEXT: addis 3, 2, .LCPI11_1 at toc@ha
+; FMF-NEXT: lfs 3, .LCPI11_1 at toc@l(3)
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xsmulsp 1, 1, 2
@@ -334,9 +334,9 @@ define float @sqrt_afn_ieee(float %x) #0 {
; GLOBAL-NEXT: # %bb.1:
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: addis 3, 2, .LCPI11_0 at toc@ha
-; GLOBAL-NEXT: addis 4, 2, .LCPI11_1 at toc@ha
; GLOBAL-NEXT: lfs 2, .LCPI11_0 at toc@l(3)
-; GLOBAL-NEXT: lfs 3, .LCPI11_1 at toc@l(4)
+; GLOBAL-NEXT: addis 3, 2, .LCPI11_1 at toc@ha
+; GLOBAL-NEXT: lfs 3, .LCPI11_1 at toc@l(3)
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
@@ -379,9 +379,9 @@ define float @sqrt_afn_preserve_sign(float %x) #1 {
; FMF-NEXT: # %bb.1:
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: addis 3, 2, .LCPI13_0 at toc@ha
-; FMF-NEXT: addis 4, 2, .LCPI13_1 at toc@ha
; FMF-NEXT: lfs 2, .LCPI13_0 at toc@l(3)
-; FMF-NEXT: lfs 3, .LCPI13_1 at toc@l(4)
+; FMF-NEXT: addis 3, 2, .LCPI13_1 at toc@ha
+; FMF-NEXT: lfs 3, .LCPI13_1 at toc@l(3)
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xsmulsp 1, 1, 2
@@ -399,9 +399,9 @@ define float @sqrt_afn_preserve_sign(float %x) #1 {
; GLOBAL-NEXT: # %bb.1:
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: addis 3, 2, .LCPI13_0 at toc@ha
-; GLOBAL-NEXT: addis 4, 2, .LCPI13_1 at toc@ha
; GLOBAL-NEXT: lfs 2, .LCPI13_0 at toc@l(3)
-; GLOBAL-NEXT: lfs 3, .LCPI13_1 at toc@l(4)
+; GLOBAL-NEXT: addis 3, 2, .LCPI13_1 at toc@ha
+; GLOBAL-NEXT: lfs 3, .LCPI13_1 at toc@l(3)
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
@@ -449,9 +449,9 @@ define float @sqrt_fast_ieee(float %x) #0 {
; FMF-NEXT: # %bb.1:
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: addis 3, 2, .LCPI15_0 at toc@ha
-; FMF-NEXT: addis 4, 2, .LCPI15_1 at toc@ha
; FMF-NEXT: lfs 2, .LCPI15_0 at toc@l(3)
-; FMF-NEXT: lfs 3, .LCPI15_1 at toc@l(4)
+; FMF-NEXT: addis 3, 2, .LCPI15_1 at toc@ha
+; FMF-NEXT: lfs 3, .LCPI15_1 at toc@l(3)
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmaddasp 2, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 3
@@ -471,9 +471,9 @@ define float @sqrt_fast_ieee(float %x) #0 {
; GLOBAL-NEXT: # %bb.1:
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: addis 3, 2, .LCPI15_0 at toc@ha
-; GLOBAL-NEXT: addis 4, 2, .LCPI15_1 at toc@ha
; GLOBAL-NEXT: lfs 2, .LCPI15_0 at toc@l(3)
-; GLOBAL-NEXT: lfs 3, .LCPI15_1 at toc@l(4)
+; GLOBAL-NEXT: addis 3, 2, .LCPI15_1 at toc@ha
+; GLOBAL-NEXT: lfs 3, .LCPI15_1 at toc@l(3)
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
@@ -504,9 +504,9 @@ define float @sqrt_fast_preserve_sign(float %x) #1 {
; FMF-NEXT: # %bb.1:
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: addis 3, 2, .LCPI16_0 at toc@ha
-; FMF-NEXT: addis 4, 2, .LCPI16_1 at toc@ha
; FMF-NEXT: lfs 2, .LCPI16_0 at toc@l(3)
-; FMF-NEXT: lfs 3, .LCPI16_1 at toc@l(4)
+; FMF-NEXT: addis 3, 2, .LCPI16_1 at toc@ha
+; FMF-NEXT: lfs 3, .LCPI16_1 at toc@l(3)
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmaddasp 2, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 3
@@ -523,9 +523,9 @@ define float @sqrt_fast_preserve_sign(float %x) #1 {
; GLOBAL-NEXT: # %bb.1:
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: addis 3, 2, .LCPI16_0 at toc@ha
-; GLOBAL-NEXT: addis 4, 2, .LCPI16_1 at toc@ha
; GLOBAL-NEXT: lfs 2, .LCPI16_0 at toc@l(3)
-; GLOBAL-NEXT: lfs 3, .LCPI16_1 at toc@l(4)
+; GLOBAL-NEXT: addis 3, 2, .LCPI16_1 at toc@ha
+; GLOBAL-NEXT: lfs 3, .LCPI16_1 at toc@l(3)
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
diff --git a/llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll b/llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
index 0e7ec05ffedb..dcc077ef0d70 100644
--- a/llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
+++ b/llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
@@ -617,8 +617,8 @@ define zeroext i32 @ppcq_to_u32(ppc_fp128 %m) #0 {
; P8-NEXT: xxlxor f3, f3, f3
; P8-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; P8-NEXT: lfs f0, .LCPI13_0 at toc@l(r3)
-; P8-NEXT: fcmpo cr0, f2, f3
; P8-NEXT: lis r3, -32768
+; P8-NEXT: fcmpo cr0, f2, f3
; P8-NEXT: xxlxor f3, f3, f3
; P8-NEXT: fcmpo cr1, f1, f0
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, lt
diff --git a/llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll b/llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
index e0f54792a563..fe510ec09170 100644
--- a/llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
+++ b/llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
@@ -45,12 +45,12 @@ entry:
; PPC64-DAG: stfd 2, [[OFFSET_HI:-?[0-9]+]]([[SP:[0-9]+]])
; PPC64-DAG: stfd 1, [[OFFSET_LO:-?[0-9]+]]([[SP]])
; PPC64-DAG: li [[FLIP_BIT:[0-9]+]], 1
-; PPC64-DAG: rldic [[FLIP_BIT]], [[FLIP_BIT]], 63, 0
+; PPC64-DAG: rldic [[RES:[0-9]+]], [[FLIP_BIT]], 63, 0
; PPC64-DAG: ld [[HI:[0-9]+]], [[OFFSET_LO]]([[SP]])
; PPC64-DAG: ld [[LO:[0-9]+]], [[OFFSET_HI]]([[SP]])
; PPC64-NOT: BARRIER
-; PPC64-DAG: xor 3, [[HI]], [[FLIP_BIT]]
-; PPC64-DAG: xor 4, [[LO]], [[FLIP_BIT]]
+; PPC64-DAG: xor 3, [[HI]], [[RES]]
+; PPC64-DAG: xor 4, [[LO]], [[RES]]
; PPC64: blr
; PPC64-P8-LABEL: test_neg:
diff --git a/llvm/test/CodeGen/PowerPC/instr-properties.ll b/llvm/test/CodeGen/PowerPC/instr-properties.ll
index 8d7115288306..cbe9013b8909 100644
--- a/llvm/test/CodeGen/PowerPC/instr-properties.ll
+++ b/llvm/test/CodeGen/PowerPC/instr-properties.ll
@@ -3,7 +3,7 @@
; Verify XFLOADf64 didn't implict def 'rm'.
define double @rm() {
; CHECK-P8-LABEL: bb.0.entry
-; CHECK-P8: %{{[0-9]+}}:vsfrc = XFLOADf64 $zero8, %{{[0-9]+}} ::
+; CHECK-P8: %{{[0-9]+}}:f8rc = LFD target-flags(ppc-toc-lo) %const.0, %{{[0-9]+}}, implicit $x2 ::
entry:
ret double 2.300000e+00
}
diff --git a/llvm/test/CodeGen/PowerPC/load-shuffle-and-shuffle-store.ll b/llvm/test/CodeGen/PowerPC/load-shuffle-and-shuffle-store.ll
index 6b57ab1507dd..9838550bf06a 100644
--- a/llvm/test/CodeGen/PowerPC/load-shuffle-and-shuffle-store.ll
+++ b/llvm/test/CodeGen/PowerPC/load-shuffle-and-shuffle-store.ll
@@ -96,7 +96,7 @@ define <4 x i32> @load_swap10(<4 x i32>* %vp1, <4 x i32>* %vp2) {
; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <4 x i32>, <4 x i32>* %vp1
@@ -134,7 +134,7 @@ define <4 x i32> @load_swap11(<4 x i32>* %vp1, <4 x i32>* %vp2) {
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI3_0 at toc@ha
; CHECK-P9-BE-NEXT: lxv v2, 0(r4)
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI3_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <4 x i32>, <4 x i32>* %vp1
@@ -172,7 +172,7 @@ define <8 x i16> @load_swap20(<8 x i16>* %vp1, <8 x i16>* %vp2){
; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <8 x i16>, <8 x i16>* %vp1
@@ -210,7 +210,7 @@ define <8 x i16> @load_swap21(<8 x i16>* %vp1, <8 x i16>* %vp2){
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; CHECK-P9-BE-NEXT: lxv v2, 0(r4)
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI5_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <8 x i16>, <8 x i16>* %vp1
@@ -346,7 +346,7 @@ define <4 x float> @load_swap50(<4 x float>* %vp1, <4 x float>* %vp2) {
; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI9_0 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI9_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <4 x float>, <4 x float>* %vp1
@@ -384,7 +384,7 @@ define <4 x float> @load_swap51(<4 x float>* %vp1, <4 x float>* %vp2) {
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI10_0 at toc@ha
; CHECK-P9-BE-NEXT: lxv v2, 0(r4)
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI10_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <4 x float>, <4 x float>* %vp1
@@ -475,7 +475,7 @@ define void @swap_store10(<4 x i32> %v1, <4 x i32> %v2, <4 x i32>* %vp) {
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI13_0 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI13_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
@@ -512,7 +512,7 @@ define void @swap_store11(<4 x i32> %v1, <4 x i32> %v2, <4 x i32>* %vp) {
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI14_0 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI14_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v2, 0, r3
+; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v3, v3, v2
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
@@ -549,7 +549,7 @@ define void @swap_store20(<8 x i16> %v1, <8 x i16> %v2, <8 x i16>* %vp) {
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI15_0 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI15_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
@@ -586,7 +586,7 @@ define void @swap_store21(<8 x i16> %v1, <8 x i16> %v2, <8 x i16>* %vp) {
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI16_0 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI16_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v2, 0, r3
+; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v3, v3, v2
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
@@ -745,7 +745,7 @@ define void @swap_store50(<4 x float> %v1, <4 x float> %v2, <4 x float>* %vp) {
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI21_0 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI21_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
@@ -782,7 +782,7 @@ define void @swap_store51(<4 x float> %v1, <4 x float> %v2, <4 x float>* %vp) {
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI22_0 at toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI22_0 at toc@l
-; CHECK-P9-BE-NEXT: lxvx v2, 0, r3
+; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v3, v3, v2
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
diff --git a/llvm/test/CodeGen/PowerPC/lxv-aligned-stack-slots.ll b/llvm/test/CodeGen/PowerPC/lxv-aligned-stack-slots.ll
index aa618d2b732c..d1d6d626c4c9 100644
--- a/llvm/test/CodeGen/PowerPC/lxv-aligned-stack-slots.ll
+++ b/llvm/test/CodeGen/PowerPC/lxv-aligned-stack-slots.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O3 -ppc-late-peephole=false -o - %s | FileCheck %s
+; RUN: llc -O3 -ppc-late-peephole=false -ppc-convert-rr-to-ri=false -o - %s | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/PowerPC/mcm-4.ll b/llvm/test/CodeGen/PowerPC/mcm-4.ll
index 96e90e0e4ff3..c48ccd24a9de 100644
--- a/llvm/test/CodeGen/PowerPC/mcm-4.ll
+++ b/llvm/test/CodeGen/PowerPC/mcm-4.ll
@@ -33,7 +33,7 @@ entry:
; MEDIUM-VSX: .quad 0x3f4fd4920b498cf0
; MEDIUM-VSX-LABEL: test_double_const:
; MEDIUM-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc at ha
-; MEDIUM-VSX: lfd {{[0-9]+}}, [[VAR]]@toc at l([[REG1]])
+; MEDIUM-VSX: lfd {{[0-9]+}}, 0({{[0-9]+}})
; LARGE: [[VAR:[a-z0-9A-Z_.]+]]:
; LARGE: .quad 0x3f4fd4920b498cf0
@@ -47,7 +47,7 @@ entry:
; LARGE-VSX-LABEL: test_double_const:
; LARGE-VSX: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc at ha
; LARGE-VSX: ld [[REG2:[0-9]+]], [[VAR2]]@toc at l([[REG1]])
-; LARGE-VSX: lfdx {{[0-9]+}}, 0, [[REG2]]
+; LARGE-VSX: lfd {{[0-9]+}}, 0({{[0-9]+}})
; MEDIUM-P9: [[VAR:[a-z0-9A-Z_.]+]]:
; MEDIUM-P9: .quad 0x3f4fd4920b498cf0
diff --git a/llvm/test/CodeGen/PowerPC/mma-acc-spill.ll b/llvm/test/CodeGen/PowerPC/mma-acc-spill.ll
index c269061556f4..ae6b146b0254 100644
--- a/llvm/test/CodeGen/PowerPC/mma-acc-spill.ll
+++ b/llvm/test/CodeGen/PowerPC/mma-acc-spill.ll
@@ -46,7 +46,7 @@ define void @intrinsics1(<16 x i8> %vc1, <16 x i8> %vc2, <16 x i8> %vc3, <16 x i
; CHECK-NEXT: stxv vs0, 48(r30)
; CHECK-NEXT: stxv vs1, 32(r30)
; CHECK-NEXT: stxv vs2, 16(r30)
-; CHECK-NEXT: stxvx vs3, 0, r30
+; CHECK-NEXT: stxv vs3, 0(r30)
; CHECK-NEXT: addi r1, r1, 176
; CHECK-NEXT: ld r0, 16(r1)
; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
@@ -88,7 +88,7 @@ define void @intrinsics1(<16 x i8> %vc1, <16 x i8> %vc2, <16 x i8> %vc3, <16 x i
; CHECK-BE-NEXT: xvf16ger2pp acc0, v2, v4
; CHECK-BE-NEXT: xxmfacc acc0
; CHECK-BE-NEXT: stxv vs1, 16(r30)
-; CHECK-BE-NEXT: stxvx vs0, 0, r30
+; CHECK-BE-NEXT: stxv vs0, 0(r30)
; CHECK-BE-NEXT: stxv vs3, 48(r30)
; CHECK-BE-NEXT: stxv vs2, 32(r30)
; CHECK-BE-NEXT: ld r30, 240(r1) # 8-byte Folded Reload
diff --git a/llvm/test/CodeGen/PowerPC/mma-outer-product.ll b/llvm/test/CodeGen/PowerPC/mma-outer-product.ll
index 9c27323fafdc..a6e175631709 100644
--- a/llvm/test/CodeGen/PowerPC/mma-outer-product.ll
+++ b/llvm/test/CodeGen/PowerPC/mma-outer-product.ll
@@ -31,7 +31,7 @@ define void @intrinsics1(<16 x i8> %vc1, <16 x i8> %vc2, <16 x i8> %vc3, <16 x i
; CHECK-NEXT: stxv vs0, 48(r3)
; CHECK-NEXT: stxv vs1, 32(r3)
; CHECK-NEXT: stxv vs2, 16(r3)
-; CHECK-NEXT: stxvx vs3, 0, r3
+; CHECK-NEXT: stxv vs3, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-BE-LABEL: intrinsics1:
@@ -54,7 +54,7 @@ define void @intrinsics1(<16 x i8> %vc1, <16 x i8> %vc2, <16 x i8> %vc3, <16 x i
; CHECK-BE-NEXT: pmxvf64gernp acc0, vsp34, v0, 0, 0
; CHECK-BE-NEXT: xxmfacc acc0
; CHECK-BE-NEXT: stxv vs1, 16(r3)
-; CHECK-BE-NEXT: stxvx vs0, 0, r3
+; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: stxv vs3, 48(r3)
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: blr
diff --git a/llvm/test/CodeGen/PowerPC/mul-const-vector.ll b/llvm/test/CodeGen/PowerPC/mul-const-vector.ll
index 08b069c073b9..3b1f46382192 100644
--- a/llvm/test/CodeGen/PowerPC/mul-const-vector.ll
+++ b/llvm/test/CodeGen/PowerPC/mul-const-vector.ll
@@ -277,7 +277,7 @@ define <2 x i64> @test1_v2i64(<2 x i64> %a) {
; CHECK-LABEL: test1_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v{{[0-9]+}}, v2, v[[REG2]]
@@ -289,7 +289,7 @@ define <2 x i64> @test2_v2i64(<2 x i64> %a) {
; CHECK-LABEL: test2_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-NEXT: vaddudm v{{[0-9]+}}, v2, v[[REG3]]
@@ -302,7 +302,7 @@ define <2 x i64> @test3_v2i64(<2 x i64> %a) {
; CHECK-LABEL: test3_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-NEXT: vsubudm v{{[0-9]+}}, v[[REG3]], v2
@@ -317,7 +317,7 @@ define <2 x i64> @test4_v2i64(<2 x i64> %a) {
; CHECK-LABEL: test4_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-P8-NEXT: xxlxor v[[REG4:[0-9]+]],
@@ -332,7 +332,7 @@ define <2 x i64> @test5_v2i64(<2 x i64> %a) {
; CHECK-LABEL: test5_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-NEXT: vaddudm v[[REG4:[0-9]+]], v2, v[[REG3]]
@@ -348,7 +348,7 @@ define <2 x i64> @test6_v2i64(<2 x i64> %a) {
; CHECK-LABEL: test6_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-NEXT: vsubudm v{{[0-9]+}}, v2, v[[REG3]]
@@ -364,7 +364,7 @@ define <2 x i64> @test7_v2i64(<2 x i64> %a) {
; CHECK-LABEL: test7_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG4:[0-9]+]], v2, v[[REG2]]
@@ -376,7 +376,7 @@ define <2 x i64> @test8_v2i64(<2 x i64> %a) {
; CHECK-LABEL: test8_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-NEXT: vsubudm v{{[0-9]+}}, v[[REG3]], v2
diff --git a/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll b/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll
index f87b3f945d13..bcb35e751cfa 100644
--- a/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll
+++ b/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll
@@ -9,7 +9,7 @@ define dso_local void @test(float* nocapture readonly %Fptr, <4 x float>* nocapt
; CHECK-NEXT: addis 5, 2, .LCPI0_0 at toc@ha
; CHECK-NEXT: .Ltmp0:
; CHECK-NEXT: .loc 1 2 38 prologue_end
-; CHECK-NEXT: lfsx 0, 0, 3
+; CHECK-NEXT: lfs 0, 0(3)
; CHECK-NEXT: addis 3, 2, .LCPI0_1 at toc@ha
; CHECK-NEXT: .Ltmp1:
; CHECK-NEXT: .loc 1 0 38 is_stmt 0
diff --git a/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll b/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
index b75539c59918..6ad82264e1dc 100644
--- a/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
+++ b/llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
@@ -37,7 +37,7 @@ define dso_local <2 x double> @testDoubleToDoubleFail() local_unnamed_addr {
; CHECK-NOPREFIX: # %bb.0: # %entry
; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI0_0 at toc@ha
; CHECK-NOPREFIX-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; CHECK-NOPREFIX-NEXT: lxvx vs34, 0, r3
+; CHECK-NOPREFIX-NEXT: lxv vs34, 0(r3)
; CHECK-NOPREFIX-NEXT: blr
;
; CHECK-BE-LABEL: testDoubleToDoubleFail:
@@ -72,7 +72,7 @@ define dso_local <2 x double> @testFloatDenormToDouble() local_unnamed_addr {
; CHECK-NOPREFIX: # %bb.0: # %entry
; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; CHECK-NOPREFIX-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; CHECK-NOPREFIX-NEXT: lxvx vs34, 0, r3
+; CHECK-NOPREFIX-NEXT: lxv vs34, 0(r3)
; CHECK-NOPREFIX-NEXT: blr
;
; CHECK-BE-LABEL: testFloatDenormToDouble:
@@ -107,7 +107,7 @@ define dso_local <2 x double> @testDoubleToDoubleNaNFail() local_unnamed_addr {
; CHECK-NOPREFIX: # %bb.0: # %entry
; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; CHECK-NOPREFIX-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; CHECK-NOPREFIX-NEXT: lxvx vs34, 0, r3
+; CHECK-NOPREFIX-NEXT: lxv vs34, 0(r3)
; CHECK-NOPREFIX-NEXT: blr
;
; CHECK-BE-LABEL: testDoubleToDoubleNaNFail:
diff --git a/llvm/test/CodeGen/PowerPC/p10-vector-rotate.ll b/llvm/test/CodeGen/PowerPC/p10-vector-rotate.ll
index 56b32e2c73fa..2b65ed648356 100644
--- a/llvm/test/CodeGen/PowerPC/p10-vector-rotate.ll
+++ b/llvm/test/CodeGen/PowerPC/p10-vector-rotate.ll
@@ -34,7 +34,7 @@ define <1 x i128> @test_vrlq_cost_mult8(<1 x i128> %x) {
; CHECK-BE: # %bb.0:
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vrlq v2, v3, v2
; CHECK-BE-NEXT: blr
%shl.i = shl <1 x i128> <i128 16>, %x
@@ -55,7 +55,7 @@ define <1 x i128> @test_vrlq_cost_non_mult8(<1 x i128> %x) {
; CHECK-BE: # %bb.0:
; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vrlq v2, v3, v2
; CHECK-BE-NEXT: blr
%shl.i = shl <1 x i128> <i128 4>, %x
@@ -90,7 +90,7 @@ define <1 x i128> @test_vrlqnm(<1 x i128> %a, <1 x i128> %b, <1 x i128> %c) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-BE-NEXT: lxvx v5, 0, r3
+; CHECK-BE-NEXT: lxv v5, 0(r3)
; CHECK-BE-NEXT: vperm v3, v3, v4, v5
; CHECK-BE-NEXT: vrlqnm v2, v2, v3
; CHECK-BE-NEXT: blr
diff --git a/llvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll b/llvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll
index 59311dbb2f5f..12a83da66a83 100644
--- a/llvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll
+++ b/llvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll
@@ -451,7 +451,7 @@ define <8 x i16> @shuffle_vector_halfword_0_4(<8 x i16> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI16_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI16_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -464,7 +464,7 @@ define <8 x i16> @shuffle_vector_halfword_1_3(<8 x i16> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI17_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI17_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -482,7 +482,7 @@ define <8 x i16> @shuffle_vector_halfword_2_3(<8 x i16> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI18_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI18_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -505,7 +505,7 @@ define <8 x i16> @shuffle_vector_halfword_3_4(<8 x i16> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI19_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI19_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -518,7 +518,7 @@ define <8 x i16> @shuffle_vector_halfword_4_3(<8 x i16> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI20_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI20_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -536,7 +536,7 @@ define <8 x i16> @shuffle_vector_halfword_5_3(<8 x i16> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI21_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI21_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -559,7 +559,7 @@ define <8 x i16> @shuffle_vector_halfword_6_4(<8 x i16> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI22_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI22_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -577,7 +577,7 @@ define <8 x i16> @shuffle_vector_halfword_7_4(<8 x i16> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI23_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI23_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -1455,7 +1455,7 @@ define <16 x i8> @shuffle_vector_byte_0_7(<16 x i8> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI56_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI56_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -1478,7 +1478,7 @@ define <16 x i8> @shuffle_vector_byte_1_8(<16 x i8> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI57_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI57_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -1496,7 +1496,7 @@ define <16 x i8> @shuffle_vector_byte_2_8(<16 x i8> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI58_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI58_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -1509,7 +1509,7 @@ define <16 x i8> @shuffle_vector_byte_3_7(<16 x i8> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI59_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI59_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -1527,7 +1527,7 @@ define <16 x i8> @shuffle_vector_byte_4_7(<16 x i8> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI60_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI60_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -1550,7 +1550,7 @@ define <16 x i8> @shuffle_vector_byte_5_8(<16 x i8> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI61_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI61_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -1568,7 +1568,7 @@ define <16 x i8> @shuffle_vector_byte_6_8(<16 x i8> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI62_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI62_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -1586,7 +1586,7 @@ define <16 x i8> @shuffle_vector_byte_7_8(<16 x i8> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI63_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI63_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -1599,7 +1599,7 @@ define <16 x i8> @shuffle_vector_byte_8_7(<16 x i8> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI64_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI64_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -1617,7 +1617,7 @@ define <16 x i8> @shuffle_vector_byte_9_7(<16 x i8> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI65_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI65_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -1635,7 +1635,7 @@ define <16 x i8> @shuffle_vector_byte_10_7(<16 x i8> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI66_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI66_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -1658,7 +1658,7 @@ define <16 x i8> @shuffle_vector_byte_11_8(<16 x i8> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI67_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI67_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -1676,7 +1676,7 @@ define <16 x i8> @shuffle_vector_byte_12_8(<16 x i8> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI68_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI68_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
@@ -1689,7 +1689,7 @@ define <16 x i8> @shuffle_vector_byte_13_7(<16 x i8> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI69_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI69_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -1707,7 +1707,7 @@ define <16 x i8> @shuffle_vector_byte_14_7(<16 x i8> %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI70_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI70_0 at toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
@@ -1730,7 +1730,7 @@ define <16 x i8> @shuffle_vector_byte_15_8(<16 x i8> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI71_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI71_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
diff --git a/llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll b/llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll
index 1e42c695c585..aefa07e8bd38 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll
@@ -110,9 +110,13 @@ define dso_local void @ReadWrite128() local_unnamed_addr #0 {
; CHECK-LABEL: ReadWrite128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, input128 at got@pcrel(0), 1
-; CHECK-NEXT: lxvx vs0, 0, r3
+; CHECK-NEXT: .Lpcrel4:
+; CHECK-NEXT: .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8)
+; CHECK-NEXT: lxv vs0, 0(r3)
; CHECK-NEXT: pld r3, output128 at got@pcrel(0), 1
-; CHECK-NEXT: stxvx vs0, 0, r3
+; CHECK-NEXT: .Lpcrel5:
+; CHECK-NEXT: .reloc .Lpcrel5-8,R_PPC64_PCREL_OPT,.-(.Lpcrel5-8)
+; CHECK-NEXT: stxv vs0, 0(r3)
; CHECK-NEXT: blr
entry:
%0 = load i128, i128* @input128, align 16
@@ -124,9 +128,9 @@ define dso_local void @ReadWritef32() local_unnamed_addr #0 {
; CHECK-LABEL: ReadWritef32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, inputf32 at got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel4:
+; CHECK-NEXT: .Lpcrel6:
; CHECK-NEXT: xxspltidp vs1, 1078103900
-; CHECK-NEXT: .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8)
+; CHECK-NEXT: .reloc .Lpcrel6-8,R_PPC64_PCREL_OPT,.-(.Lpcrel6-8)
; CHECK-NEXT: lfs f0, 0(r3)
; CHECK-NEXT: pld r3, outputf32 at got@pcrel(0), 1
; CHECK-NEXT: xsaddsp f0, f0, f1
@@ -143,10 +147,10 @@ define dso_local void @ReadWritef64() local_unnamed_addr #0 {
; CHECK-LABEL: ReadWritef64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, inputf64 at got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel5:
+; CHECK-NEXT: .Lpcrel7:
; CHECK-NEXT: xxsplti32dx vs1, 0, 1075524403
; CHECK-NEXT: xxsplti32dx vs1, 1, 858993459
-; CHECK-NEXT: .reloc .Lpcrel5-8,R_PPC64_PCREL_OPT,.-(.Lpcrel5-8)
+; CHECK-NEXT: .reloc .Lpcrel7-8,R_PPC64_PCREL_OPT,.-(.Lpcrel7-8)
; CHECK-NEXT: lfd f0, 0(r3)
; CHECK-NEXT: pld r3, outputf64 at got@pcrel(0), 1
; CHECK-NEXT: xsadddp f0, f0, f1
@@ -165,11 +169,13 @@ define dso_local void @ReadWriteVi32() local_unnamed_addr #0 {
; CHECK-LABEL: ReadWriteVi32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, inputVi32 at got@pcrel(0), 1
+; CHECK-NEXT: .Lpcrel8:
; CHECK-NEXT: li r4, 45
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: .reloc .Lpcrel8-8,R_PPC64_PCREL_OPT,.-(.Lpcrel8-8)
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: pld r3, outputVi32 at got@pcrel(0), 1
; CHECK-NEXT: vinsw v2, r4, 8
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%0 = load <4 x i32>, <4 x i32>* @inputVi32, align 16
@@ -182,9 +188,13 @@ define dso_local void @ReadWriteVi64() local_unnamed_addr #0 {
; CHECK-LABEL: ReadWriteVi64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, inputVi64 at got@pcrel(0), 1
-; CHECK-NEXT: lxvx vs0, 0, r3
+; CHECK-NEXT: .Lpcrel9:
+; CHECK-NEXT: .reloc .Lpcrel9-8,R_PPC64_PCREL_OPT,.-(.Lpcrel9-8)
+; CHECK-NEXT: lxv vs0, 0(r3)
; CHECK-NEXT: pld r3, outputVi64 at got@pcrel(0), 1
-; CHECK-NEXT: stxvx vs0, 0, r3
+; CHECK-NEXT: .Lpcrel10:
+; CHECK-NEXT: .reloc .Lpcrel10-8,R_PPC64_PCREL_OPT,.-(.Lpcrel10-8)
+; CHECK-NEXT: stxv vs0, 0(r3)
; CHECK-NEXT: blr
entry:
%0 = load <2 x i64>, <2 x i64>* @inputVi64, align 16
@@ -196,9 +206,9 @@ define dso_local void @ReadWriteArray() local_unnamed_addr #0 {
; CHECK-LABEL: ReadWriteArray:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, ArrayIn at got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel6:
+; CHECK-NEXT: .Lpcrel11:
; CHECK-NEXT: pld r4, ArrayOut at got@pcrel(0), 1
-; CHECK-NEXT: .reloc .Lpcrel6-8,R_PPC64_PCREL_OPT,.-(.Lpcrel6-8)
+; CHECK-NEXT: .reloc .Lpcrel11-8,R_PPC64_PCREL_OPT,.-(.Lpcrel11-8)
; CHECK-NEXT: lwz r3, 28(r3)
; CHECK-NEXT: addi r3, r3, 42
; CHECK-NEXT: stw r3, 8(r4)
@@ -229,12 +239,12 @@ define dso_local void @ReadWriteIntPtr() local_unnamed_addr #0 {
; CHECK-LABEL: ReadWriteIntPtr:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, IntPtrIn at got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel7:
+; CHECK-NEXT: .Lpcrel12:
; CHECK-NEXT: pld r4, IntPtrOut at got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel8:
-; CHECK-NEXT: .reloc .Lpcrel7-8,R_PPC64_PCREL_OPT,.-(.Lpcrel7-8)
+; CHECK-NEXT: .Lpcrel13:
+; CHECK-NEXT: .reloc .Lpcrel12-8,R_PPC64_PCREL_OPT,.-(.Lpcrel12-8)
; CHECK-NEXT: ld r3, 0(r3)
-; CHECK-NEXT: .reloc .Lpcrel8-8,R_PPC64_PCREL_OPT,.-(.Lpcrel8-8)
+; CHECK-NEXT: .reloc .Lpcrel13-8,R_PPC64_PCREL_OPT,.-(.Lpcrel13-8)
; CHECK-NEXT: ld r4, 0(r4)
; CHECK-NEXT: lwz r5, 216(r3)
; CHECK-NEXT: lwz r3, 48(r3)
@@ -258,9 +268,9 @@ define dso_local void @ReadWriteFuncPtr() local_unnamed_addr #0 {
; CHECK-LABEL: ReadWriteFuncPtr:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, FuncPtrIn at got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel9:
+; CHECK-NEXT: .Lpcrel14:
; CHECK-NEXT: pld r4, FuncPtrOut at got@pcrel(0), 1
-; CHECK-NEXT: .reloc .Lpcrel9-8,R_PPC64_PCREL_OPT,.-(.Lpcrel9-8)
+; CHECK-NEXT: .reloc .Lpcrel14-8,R_PPC64_PCREL_OPT,.-(.Lpcrel14-8)
; CHECK-NEXT: ld r3, 0(r3)
; CHECK-NEXT: std r3, 0(r4)
; CHECK-NEXT: blr
@@ -288,8 +298,8 @@ define dso_local void @FuncPtrCall() local_unnamed_addr #0 {
; CHECK-LABEL: FuncPtrCall:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, FuncPtrIn at got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel10:
-; CHECK-NEXT: .reloc .Lpcrel10-8,R_PPC64_PCREL_OPT,.-(.Lpcrel10-8)
+; CHECK-NEXT: .Lpcrel15:
+; CHECK-NEXT: .reloc .Lpcrel15-8,R_PPC64_PCREL_OPT,.-(.Lpcrel15-8)
; CHECK-NEXT: ld r12, 0(r3)
; CHECK-NEXT: mtctr r12
; CHECK-NEXT: bctr
@@ -304,8 +314,8 @@ define dso_local signext i32 @ReadVecElement() local_unnamed_addr #0 {
; CHECK-LABEL: ReadVecElement:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, inputVi32 at got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel11:
-; CHECK-NEXT: .reloc .Lpcrel11-8,R_PPC64_PCREL_OPT,.-(.Lpcrel11-8)
+; CHECK-NEXT: .Lpcrel16:
+; CHECK-NEXT: .reloc .Lpcrel16-8,R_PPC64_PCREL_OPT,.-(.Lpcrel16-8)
; CHECK-NEXT: lwa r3, 4(r3)
; CHECK-NEXT: blr
entry:
diff --git a/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll b/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll
index d5ebb69fce49..c34c451525bb 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll
@@ -1715,20 +1715,20 @@ define dso_local void @testGlob11PtrPlus0() {
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd11 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd11 at toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: lxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt11 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt11 at toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: stxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LABEL: testGlob11PtrPlus0:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, GlobLd11 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, GlobLd11 at toc@l
-; CHECK-P9-NEXT: lxvx vs0, 0, r3
+; CHECK-P9-NEXT: lxv vs0, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, GlobSt11 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, GlobSt11 at toc@l
-; CHECK-P9-NEXT: stxvx vs0, 0, r3
+; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: testGlob11PtrPlus0:
@@ -1999,20 +1999,20 @@ define dso_local void @testGlob12PtrPlus0() {
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd12 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd12 at toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: lxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt12 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt12 at toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: stxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LABEL: testGlob12PtrPlus0:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, GlobLd12 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, GlobLd12 at toc@l
-; CHECK-P9-NEXT: lxvx vs0, 0, r3
+; CHECK-P9-NEXT: lxv vs0, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, GlobSt12 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, GlobSt12 at toc@l
-; CHECK-P9-NEXT: stxvx vs0, 0, r3
+; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: testGlob12PtrPlus0:
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll b/llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll
index 72fb997c0594..3d5fef656eb9 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll
@@ -33,14 +33,14 @@ define ppc_fp128 @test(%struct.S* byval(%struct.S) %x) nounwind {
;
; CHECK-VSX-LABEL: test:
; CHECK-VSX: # %bb.0: # %entry
-; CHECK-VSX-NEXT: std 3, 48(1)
-; CHECK-VSX-NEXT: std 6, 72(1)
-; CHECK-VSX-NEXT: std 5, 64(1)
-; CHECK-VSX-NEXT: std 4, 56(1)
; CHECK-VSX-NEXT: std 5, -16(1)
; CHECK-VSX-NEXT: std 6, -8(1)
; CHECK-VSX-NEXT: lfd 1, -16(1)
; CHECK-VSX-NEXT: lfd 2, -8(1)
+; CHECK-VSX-NEXT: std 6, 72(1)
+; CHECK-VSX-NEXT: std 5, 64(1)
+; CHECK-VSX-NEXT: std 3, 48(1)
+; CHECK-VSX-NEXT: std 4, 56(1)
; CHECK-VSX-NEXT: blr
;
; CHECK-P9-LABEL: test:
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll b/llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll
index ec76d59c1176..1b4e8e4e8c71 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll
@@ -63,7 +63,7 @@ define <1 x i128> @v1i128_increment_by_one(<1 x i128> %a) nounwind {
; FIXME: li [[R1:r[0-9]+]], 1
; FIXME: li [[R2:r[0-9]+]], 0
; FIXME: mtvsrdd [[V1:v[0-9]+]], [[R2]], [[R1]]
-; CHECK-P9: lxvx [[V1:v[0-9]+]]
+; CHECK-P9: lxv [[V1:v[0-9]+]]
; CHECK-P9: vadduqm v2, v2, [[V1]]
; CHECK-P9: blr
@@ -237,8 +237,8 @@ define <1 x i128> @call_v1i128_increment_by_val() nounwind {
; CHECK-LE: blr
; CHECK-P9-LABEL: @call_v1i128_increment_by_val
-; CHECK-P9-DAG: lxvx v2
-; CHECK-P9-DAG: lxvx v3
+; CHECK-P9-DAG: lxv v2
+; CHECK-P9-DAG: lxv v3
; CHECK-P9: bl v1i128_increment_by_val
; CHECK-P9: blr
diff --git a/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
index 44676c7a827b..f32a3c504af6 100644
--- a/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
@@ -1293,8 +1293,8 @@ define i32 @test_fptoui_ppc_i32_ppc_fp128(ppc_fp128 %first) #0 {
; PC64LE-NEXT: addis 3, 2, .LCPI31_0 at toc@ha
; PC64LE-NEXT: xxlxor 3, 3, 3
; PC64LE-NEXT: lfs 0, .LCPI31_0 at toc@l(3)
-; PC64LE-NEXT: fcmpo 0, 2, 3
; PC64LE-NEXT: lis 3, -32768
+; PC64LE-NEXT: fcmpo 0, 2, 3
; PC64LE-NEXT: xxlxor 3, 3, 3
; PC64LE-NEXT: fcmpo 1, 1, 0
; PC64LE-NEXT: crand 20, 6, 0
@@ -1428,12 +1428,12 @@ define void @test_constrained_libcall_multichain(float* %firstptr, ppc_fp128* %r
; PC64LE-NEXT: xxlxor 2, 2, 2
; PC64LE-NEXT: li 3, 0
; PC64LE-NEXT: mr 30, 4
-; PC64LE-NEXT: lfsx 31, 0, 29
+; PC64LE-NEXT: lfs 31, 0(29)
; PC64LE-NEXT: xxlxor 4, 4, 4
; PC64LE-NEXT: std 3, 8(4)
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: fmr 3, 31
-; PC64LE-NEXT: stfdx 31, 0, 4
+; PC64LE-NEXT: stfd 31, 0(4)
; PC64LE-NEXT: bl __gcc_qadd
; PC64LE-NEXT: nop
; PC64LE-NEXT: fmr 3, 1
@@ -1452,7 +1452,7 @@ define void @test_constrained_libcall_multichain(float* %firstptr, ppc_fp128* %r
; PC64LE-NEXT: bl __powitf2
; PC64LE-NEXT: nop
; PC64LE-NEXT: xsrsp 0, 1
-; PC64LE-NEXT: stfsx 0, 0, 29
+; PC64LE-NEXT: stfs 0, 0(29)
; PC64LE-NEXT: stfd 1, -16(30)
; PC64LE-NEXT: stfd 2, -8(30)
; PC64LE-NEXT: addi 1, 1, 80
@@ -1727,8 +1727,8 @@ define ppc_fp128 @u64_to_ppcq(i64 %m) #0 {
; PC64LE-NEXT: addis 3, 2, .LCPI36_0 at toc@ha
; PC64LE-NEXT: xxlxor 4, 4, 4
; PC64LE-NEXT: fmr 30, 1
-; PC64LE-NEXT: fmr 31, 2
; PC64LE-NEXT: lfs 3, .LCPI36_0 at toc@l(3)
+; PC64LE-NEXT: fmr 31, 2
; PC64LE-NEXT: bl __gcc_qadd
; PC64LE-NEXT: nop
; PC64LE-NEXT: cmpdi 30, 0
@@ -1879,8 +1879,8 @@ define ppc_fp128 @u128_to_ppcq(i128 %m) #0 {
; PC64LE-NEXT: addis 3, 2, .LCPI38_0 at toc@ha
; PC64LE-NEXT: xxlxor 4, 4, 4
; PC64LE-NEXT: fmr 30, 1
-; PC64LE-NEXT: fmr 31, 2
; PC64LE-NEXT: lfd 3, .LCPI38_0 at toc@l(3)
+; PC64LE-NEXT: fmr 31, 2
; PC64LE-NEXT: bl __gcc_qadd
; PC64LE-NEXT: nop
; PC64LE-NEXT: cmpdi 30, 0
diff --git a/llvm/test/CodeGen/PowerPC/pr30715.ll b/llvm/test/CodeGen/PowerPC/pr30715.ll
index 96fb7865a96f..51086c6279d3 100644
--- a/llvm/test/CodeGen/PowerPC/pr30715.ll
+++ b/llvm/test/CodeGen/PowerPC/pr30715.ll
@@ -67,7 +67,7 @@ for.body: ; preds = %for.body.preheader,
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
-; CHECK: stfdx
+; CHECK: stfd
; CHECK: lxvd2x
}
diff --git a/llvm/test/CodeGen/PowerPC/pr36292.ll b/llvm/test/CodeGen/PowerPC/pr36292.ll
index 883d26b66908..5ee1a28bf125 100644
--- a/llvm/test/CodeGen/PowerPC/pr36292.ll
+++ b/llvm/test/CodeGen/PowerPC/pr36292.ll
@@ -19,12 +19,12 @@ define void @test() nounwind comdat {
; CHECK-NEXT: .p2align 5
; CHECK-NEXT: .LBB0_1: # %bounds.ok
; CHECK-NEXT: #
-; CHECK-NEXT: lfsx 2, 0, 3
+; CHECK-NEXT: lfs 2, 0(3)
; CHECK-NEXT: xxlxor 1, 1, 1
; CHECK-NEXT: bl fmodf
; CHECK-NEXT: nop
; CHECK-NEXT: addi 30, 30, 1
-; CHECK-NEXT: stfsx 1, 0, 3
+; CHECK-NEXT: stfs 1, 0(3)
; CHECK-NEXT: cmpld 30, 29
; CHECK-NEXT: blt+ 0, .LBB0_1
; CHECK-NEXT: .LBB0_2: # %bounds.fail
diff --git a/llvm/test/CodeGen/PowerPC/pr38087.ll b/llvm/test/CodeGen/PowerPC/pr38087.ll
index 49b3d39bc18c..95bb3ec62106 100644
--- a/llvm/test/CodeGen/PowerPC/pr38087.ll
+++ b/llvm/test/CodeGen/PowerPC/pr38087.ll
@@ -17,7 +17,7 @@ define void @draw_llvm_vs_variant0(<4 x float> %x) {
; CHECK-NEXT: xvcvsxwsp vs0, v3
; CHECK-NEXT: xxspltw vs0, vs0, 2
; CHECK-NEXT: xvmaddasp vs0, v2, v2
-; CHECK-NEXT: stxvx vs0, 0, r3
+; CHECK-NEXT: stxv vs0, 0(r3)
; CHECK-NEXT: blr
entry:
%.size = load i32, i32* undef
diff --git a/llvm/test/CodeGen/PowerPC/pr45628.ll b/llvm/test/CodeGen/PowerPC/pr45628.ll
index 5ea3d05db5b5..ceda941d8ab3 100644
--- a/llvm/test/CodeGen/PowerPC/pr45628.ll
+++ b/llvm/test/CodeGen/PowerPC/pr45628.ll
@@ -270,13 +270,13 @@ define <1 x i128> @NO_rotl(<1 x i128> %num) {
; P9-VSX: # %bb.0: # %entry
; P9-VSX-NEXT: addis r3, r2, .LCPI8_0 at toc@ha
; P9-VSX-NEXT: addi r3, r3, .LCPI8_0 at toc@l
-; P9-VSX-NEXT: lxvx v3, 0, r3
+; P9-VSX-NEXT: lxv v3, 0(r3)
; P9-VSX-NEXT: addis r3, r2, .LCPI8_1 at toc@ha
; P9-VSX-NEXT: addi r3, r3, .LCPI8_1 at toc@l
; P9-VSX-NEXT: vslo v4, v2, v3
; P9-VSX-NEXT: vspltb v3, v3, 15
; P9-VSX-NEXT: vsl v3, v4, v3
-; P9-VSX-NEXT: lxvx v4, 0, r3
+; P9-VSX-NEXT: lxv v4, 0(r3)
; P9-VSX-NEXT: vsro v2, v2, v4
; P9-VSX-NEXT: vspltb v4, v4, 15
; P9-VSX-NEXT: vsr v2, v2, v4
diff --git a/llvm/test/CodeGen/PowerPC/pre-inc-disable.ll b/llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
index c92809ea6830..f6472d356006 100644
--- a/llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
+++ b/llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
@@ -16,10 +16,10 @@ define signext i32 @test_pre_inc_disable_1(i8* nocapture readonly %pix1, i32 sig
; CHECK-NEXT: xxlxor v3, v3, v3
; CHECK-NEXT: li r6, 0
; CHECK-NEXT: addi r5, r5, .LCPI0_0 at toc@l
-; CHECK-NEXT: lxvx v2, 0, r5
+; CHECK-NEXT: lxv v2, 0(r5)
; CHECK-NEXT: addis r5, r2, .LCPI0_1 at toc@ha
; CHECK-NEXT: addi r5, r5, .LCPI0_1 at toc@l
-; CHECK-NEXT: lxvx v4, 0, r5
+; CHECK-NEXT: lxv v4, 0(r5)
; CHECK-NEXT: li r5, 4
; CHECK-NEXT: vperm v0, v3, v5, v2
; CHECK-NEXT: mtctr r5
@@ -72,10 +72,10 @@ define signext i32 @test_pre_inc_disable_1(i8* nocapture readonly %pix1, i32 sig
; P9BE-NEXT: xxlxor v3, v3, v3
; P9BE-NEXT: li r6, 0
; P9BE-NEXT: addi r5, r5, .LCPI0_0 at toc@l
-; P9BE-NEXT: lxvx v2, 0, r5
+; P9BE-NEXT: lxv v2, 0(r5)
; P9BE-NEXT: addis r5, r2, .LCPI0_1 at toc@ha
; P9BE-NEXT: addi r5, r5, .LCPI0_1 at toc@l
-; P9BE-NEXT: lxvx v4, 0, r5
+; P9BE-NEXT: lxv v4, 0(r5)
; P9BE-NEXT: li r5, 4
; P9BE-NEXT: vperm v0, v3, v5, v2
; P9BE-NEXT: mtctr r5
@@ -180,10 +180,10 @@ define signext i32 @test_pre_inc_disable_2(i8* nocapture readonly %pix1, i8* noc
; CHECK-NEXT: lxsd v1, 0(r4)
; CHECK-NEXT: xxlxor v3, v3, v3
; CHECK-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; CHECK-NEXT: lxvx v4, 0, r3
+; CHECK-NEXT: lxv v4, 0(r3)
; CHECK-NEXT: addis r3, r2, .LCPI1_1 at toc@ha
; CHECK-NEXT: addi r3, r3, .LCPI1_1 at toc@l
-; CHECK-NEXT: lxvx v0, 0, r3
+; CHECK-NEXT: lxv v0, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: vperm v5, v3, v2, v4
; CHECK-NEXT: vperm v2, v3, v2, v0
@@ -207,10 +207,10 @@ define signext i32 @test_pre_inc_disable_2(i8* nocapture readonly %pix1, i8* noc
; P9BE-NEXT: lxsd v1, 0(r4)
; P9BE-NEXT: xxlxor v3, v3, v3
; P9BE-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; P9BE-NEXT: lxvx v4, 0, r3
+; P9BE-NEXT: lxv v4, 0(r3)
; P9BE-NEXT: addis r3, r2, .LCPI1_1 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI1_1 at toc@l
-; P9BE-NEXT: lxvx v0, 0, r3
+; P9BE-NEXT: lxv v0, 0(r3)
; P9BE-NEXT: li r3, 0
; P9BE-NEXT: vperm v5, v3, v2, v4
; P9BE-NEXT: vperm v2, v3, v2, v0
@@ -280,7 +280,7 @@ define void @test32(i8* nocapture readonly %pix2, i32 signext %i_pix2) {
; CHECK-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; CHECK-NEXT: xxlxor v3, v3, v3
; CHECK-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; CHECK-NEXT: lxvx v4, 0, r3
+; CHECK-NEXT: lxv v4, 0(r3)
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: lxsiwzx v5, r5, r3
; CHECK-NEXT: vperm v2, v2, v3, v4
@@ -291,7 +291,7 @@ define void @test32(i8* nocapture readonly %pix2, i32 signext %i_pix2) {
; CHECK-NEXT: vslw v3, v3, v4
; CHECK-NEXT: vsubuwm v2, v3, v2
; CHECK-NEXT: xxswapd vs0, v2
-; CHECK-NEXT: stxvx vs0, 0, r3
+; CHECK-NEXT: stxv vs0, 0(r3)
; CHECK-NEXT: blr
;
; P9BE-LABEL: test32:
@@ -301,7 +301,7 @@ define void @test32(i8* nocapture readonly %pix2, i32 signext %i_pix2) {
; P9BE-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; P9BE-NEXT: xxlxor v3, v3, v3
; P9BE-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; P9BE-NEXT: lxvx v4, 0, r3
+; P9BE-NEXT: lxv v4, 0(r3)
; P9BE-NEXT: li r3, 4
; P9BE-NEXT: lxsiwzx v5, r5, r3
; P9BE-NEXT: vperm v2, v3, v2, v4
@@ -312,7 +312,7 @@ define void @test32(i8* nocapture readonly %pix2, i32 signext %i_pix2) {
; P9BE-NEXT: vslw v3, v3, v4
; P9BE-NEXT: vsubuwm v2, v3, v2
; P9BE-NEXT: xxswapd vs0, v2
-; P9BE-NEXT: stxvx vs0, 0, r3
+; P9BE-NEXT: stxv vs0, 0(r3)
; P9BE-NEXT: blr
entry:
%idx.ext63 = sext i32 %i_pix2 to i64
@@ -354,7 +354,7 @@ define void @test16(i16* nocapture readonly %sums, i32 signext %delta, i32 signe
; CHECK-NEXT: vmrghh v2, v3, v2
; CHECK-NEXT: vsplth v3, v3, 3
; CHECK-NEXT: vmrglw v3, v4, v3
-; CHECK-NEXT: lxvx v4, 0, r3
+; CHECK-NEXT: lxv v4, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: vperm v2, v2, v3, v4
; CHECK-NEXT: xxspltw v3, v2, 2
@@ -375,14 +375,14 @@ define void @test16(i16* nocapture readonly %sums, i32 signext %delta, i32 signe
; P9BE-NEXT: addis r6, r2, .LCPI3_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI3_1 at toc@l
; P9BE-NEXT: addi r6, r6, .LCPI3_0 at toc@l
-; P9BE-NEXT: lxvx v3, 0, r6
+; P9BE-NEXT: lxv v3, 0(r6)
; P9BE-NEXT: li r6, 0
; P9BE-NEXT: mtvsrwz v4, r6
; P9BE-NEXT: vperm v2, v4, v2, v3
; P9BE-NEXT: vperm v3, v4, v5, v3
; P9BE-NEXT: vsplth v4, v4, 3
; P9BE-NEXT: vmrghw v3, v4, v3
-; P9BE-NEXT: lxvx v4, 0, r3
+; P9BE-NEXT: lxv v4, 0(r3)
; P9BE-NEXT: li r3, 0
; P9BE-NEXT: vperm v2, v3, v2, v4
; P9BE-NEXT: xxspltw v3, v2, 1
@@ -441,7 +441,7 @@ define void @test8(i8* nocapture readonly %sums, i32 signext %delta, i32 signext
; CHECK-NEXT: vmrglw v2, v2, v4
; CHECK-NEXT: vmrglh v3, v3, v4
; CHECK-NEXT: vmrglw v3, v4, v3
-; CHECK-NEXT: lxvx v4, 0, r3
+; CHECK-NEXT: lxv v4, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: vperm v2, v3, v2, v4
; CHECK-NEXT: xxspltw v3, v2, 2
@@ -461,7 +461,7 @@ define void @test8(i8* nocapture readonly %sums, i32 signext %delta, i32 signext
; P9BE-NEXT: addis r6, r2, .LCPI4_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI4_1 at toc@l
; P9BE-NEXT: addi r6, r6, .LCPI4_0 at toc@l
-; P9BE-NEXT: lxvx v3, 0, r6
+; P9BE-NEXT: lxv v3, 0(r6)
; P9BE-NEXT: li r6, 0
; P9BE-NEXT: mtvsrwz v4, r6
; P9BE-NEXT: vperm v2, v4, v2, v3
@@ -470,7 +470,7 @@ define void @test8(i8* nocapture readonly %sums, i32 signext %delta, i32 signext
; P9BE-NEXT: vmrghh v3, v3, v4
; P9BE-NEXT: xxspltw v4, v4, 0
; P9BE-NEXT: vmrghw v2, v3, v2
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: li r3, 0
; P9BE-NEXT: vperm v2, v4, v2, v3
; P9BE-NEXT: xxspltw v3, v2, 1
diff --git a/llvm/test/CodeGen/PowerPC/recipest.ll b/llvm/test/CodeGen/PowerPC/recipest.ll
index c641e1b10b73..2aef0e7e6d20 100644
--- a/llvm/test/CodeGen/PowerPC/recipest.ll
+++ b/llvm/test/CodeGen/PowerPC/recipest.ll
@@ -136,14 +136,14 @@ define double @foof_fmf(double %a, float %b) nounwind {
; CHECK-P8-LABEL: foof_fmf:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: xsrsqrtesp 0, 2
+; CHECK-P8-NEXT: addis 3, 2, .LCPI3_1 at toc@ha
+; CHECK-P8-NEXT: lfs 3, .LCPI3_1 at toc@l(3)
; CHECK-P8-NEXT: addis 3, 2, .LCPI3_0 at toc@ha
-; CHECK-P8-NEXT: addis 4, 2, .LCPI3_1 at toc@ha
-; CHECK-P8-NEXT: lfs 3, .LCPI3_0 at toc@l(3)
-; CHECK-P8-NEXT: lfs 4, .LCPI3_1 at toc@l(4)
+; CHECK-P8-NEXT: lfs 4, .LCPI3_0 at toc@l(3)
; CHECK-P8-NEXT: xsmulsp 2, 2, 0
-; CHECK-P8-NEXT: xsmaddasp 3, 2, 0
-; CHECK-P8-NEXT: xsmulsp 0, 0, 4
-; CHECK-P8-NEXT: xsmulsp 0, 0, 3
+; CHECK-P8-NEXT: xsmulsp 3, 0, 3
+; CHECK-P8-NEXT: xsmaddasp 4, 2, 0
+; CHECK-P8-NEXT: xsmulsp 0, 3, 4
; CHECK-P8-NEXT: xsmuldp 1, 1, 0
; CHECK-P8-NEXT: blr
;
@@ -300,14 +300,14 @@ define float @goo_fmf(float %a, float %b) nounwind {
; CHECK-P8-LABEL: goo_fmf:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: xsrsqrtesp 0, 2
+; CHECK-P8-NEXT: addis 3, 2, .LCPI7_1 at toc@ha
+; CHECK-P8-NEXT: lfs 3, .LCPI7_1 at toc@l(3)
; CHECK-P8-NEXT: addis 3, 2, .LCPI7_0 at toc@ha
-; CHECK-P8-NEXT: addis 4, 2, .LCPI7_1 at toc@ha
-; CHECK-P8-NEXT: lfs 3, .LCPI7_0 at toc@l(3)
-; CHECK-P8-NEXT: lfs 4, .LCPI7_1 at toc@l(4)
+; CHECK-P8-NEXT: lfs 4, .LCPI7_0 at toc@l(3)
; CHECK-P8-NEXT: xsmulsp 2, 2, 0
-; CHECK-P8-NEXT: xsmaddasp 3, 2, 0
-; CHECK-P8-NEXT: xsmulsp 0, 0, 4
-; CHECK-P8-NEXT: xsmulsp 0, 0, 3
+; CHECK-P8-NEXT: xsmulsp 3, 0, 3
+; CHECK-P8-NEXT: xsmaddasp 4, 2, 0
+; CHECK-P8-NEXT: xsmulsp 0, 3, 4
; CHECK-P8-NEXT: xsmulsp 1, 1, 0
; CHECK-P8-NEXT: blr
;
@@ -398,9 +398,9 @@ define float @rsqrt_fmul_fmf(float %a, float %b, float %c) {
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: xsrsqrtesp 0, 1
; CHECK-P8-NEXT: addis 3, 2, .LCPI10_0 at toc@ha
-; CHECK-P8-NEXT: addis 4, 2, .LCPI10_1 at toc@ha
; CHECK-P8-NEXT: lfs 4, .LCPI10_0 at toc@l(3)
-; CHECK-P8-NEXT: lfs 5, .LCPI10_1 at toc@l(4)
+; CHECK-P8-NEXT: addis 3, 2, .LCPI10_1 at toc@ha
+; CHECK-P8-NEXT: lfs 5, .LCPI10_1 at toc@l(3)
; CHECK-P8-NEXT: xsmulsp 1, 1, 0
; CHECK-P8-NEXT: xsmaddasp 4, 1, 0
; CHECK-P8-NEXT: xsmulsp 0, 0, 5
@@ -502,12 +502,12 @@ define <4 x float> @hoo_fmf(<4 x float> %a, <4 x float> %b) nounwind {
; CHECK-P9-NEXT: xvrsqrtesp 0, 35
; CHECK-P9-NEXT: addis 3, 2, .LCPI12_0 at toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI12_0 at toc@l
-; CHECK-P9-NEXT: lxvx 2, 0, 3
+; CHECK-P9-NEXT: lxv 2, 0(3)
; CHECK-P9-NEXT: addis 3, 2, .LCPI12_1 at toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI12_1 at toc@l
; CHECK-P9-NEXT: xvmulsp 1, 35, 0
; CHECK-P9-NEXT: xvmaddasp 2, 1, 0
-; CHECK-P9-NEXT: lxvx 1, 0, 3
+; CHECK-P9-NEXT: lxv 1, 0(3)
; CHECK-P9-NEXT: xvmulsp 0, 0, 1
; CHECK-P9-NEXT: xvmulsp 0, 0, 2
; CHECK-P9-NEXT: xvmulsp 34, 34, 0
@@ -959,9 +959,9 @@ define float @goo3_fmf(float %a) nounwind {
; CHECK-P8-NEXT: # %bb.1:
; CHECK-P8-NEXT: xsrsqrtesp 0, 1
; CHECK-P8-NEXT: addis 3, 2, .LCPI23_0 at toc@ha
-; CHECK-P8-NEXT: addis 4, 2, .LCPI23_1 at toc@ha
; CHECK-P8-NEXT: lfs 2, .LCPI23_0 at toc@l(3)
-; CHECK-P8-NEXT: lfs 3, .LCPI23_1 at toc@l(4)
+; CHECK-P8-NEXT: addis 3, 2, .LCPI23_1 at toc@ha
+; CHECK-P8-NEXT: lfs 3, .LCPI23_1 at toc@l(3)
; CHECK-P8-NEXT: xsmulsp 1, 1, 0
; CHECK-P8-NEXT: xsmaddasp 2, 1, 0
; CHECK-P8-NEXT: xsmulsp 0, 1, 3
@@ -1064,12 +1064,12 @@ define <4 x float> @hoo3_fmf(<4 x float> %a) #1 {
; CHECK-P9-NEXT: xvrsqrtesp 0, 34
; CHECK-P9-NEXT: addis 3, 2, .LCPI25_0 at toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI25_0 at toc@l
-; CHECK-P9-NEXT: lxvx 2, 0, 3
+; CHECK-P9-NEXT: lxv 2, 0(3)
; CHECK-P9-NEXT: addis 3, 2, .LCPI25_1 at toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI25_1 at toc@l
; CHECK-P9-NEXT: xvmulsp 1, 34, 0
; CHECK-P9-NEXT: xvmaddasp 2, 1, 0
-; CHECK-P9-NEXT: lxvx 0, 0, 3
+; CHECK-P9-NEXT: lxv 0, 0(3)
; CHECK-P9-NEXT: xvmulsp 0, 1, 0
; CHECK-P9-NEXT: xvmulsp 34, 0, 2
; CHECK-P9-NEXT: blr
@@ -1190,13 +1190,13 @@ define <2 x double> @hoo4_fmf(<2 x double> %a) #1 {
; CHECK-P9-NEXT: xvrsqrtedp 0, 34
; CHECK-P9-NEXT: addis 3, 2, .LCPI27_0 at toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI27_0 at toc@l
-; CHECK-P9-NEXT: lxvx 2, 0, 3
+; CHECK-P9-NEXT: lxv 2, 0(3)
; CHECK-P9-NEXT: addis 3, 2, .LCPI27_1 at toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI27_1 at toc@l
; CHECK-P9-NEXT: xvmuldp 1, 34, 0
; CHECK-P9-NEXT: xxlor 3, 2, 2
; CHECK-P9-NEXT: xvmaddadp 3, 1, 0
-; CHECK-P9-NEXT: lxvx 1, 0, 3
+; CHECK-P9-NEXT: lxv 1, 0(3)
; CHECK-P9-NEXT: xvmuldp 0, 0, 1
; CHECK-P9-NEXT: xvmuldp 0, 0, 3
; CHECK-P9-NEXT: xvmuldp 3, 34, 0
diff --git a/llvm/test/CodeGen/PowerPC/register-pressure-reduction.ll b/llvm/test/CodeGen/PowerPC/register-pressure-reduction.ll
index fce483836f08..e26e3772632f 100644
--- a/llvm/test/CodeGen/PowerPC/register-pressure-reduction.ll
+++ b/llvm/test/CodeGen/PowerPC/register-pressure-reduction.ll
@@ -100,15 +100,15 @@ define float @foo_float_reuse_const(float %0, float %1, float %2, float %3) {
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: xsmulsp f1, f2, f1
; CHECK-P8-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
-; CHECK-P8-NEXT: addis r4, r2, .LCPI2_1 at toc@ha
; CHECK-P8-NEXT: xssubsp f0, f3, f4
; CHECK-P8-NEXT: lfs f3, .LCPI2_0 at toc@l(r3)
-; CHECK-P8-NEXT: lfs f4, .LCPI2_1 at toc@l(r4)
+; CHECK-P8-NEXT: addis r3, r2, .LCPI2_1 at toc@ha
+; CHECK-P8-NEXT: lfs f4, .LCPI2_1 at toc@l(r3)
; CHECK-P8-NEXT: addis r3, r2, .LC0 at toc@ha
; CHECK-P8-NEXT: ld r3, .LC0 at toc@l(r3)
; CHECK-P8-NEXT: xsmaddasp f1, f0, f3
; CHECK-P8-NEXT: xsmulsp f0, f2, f4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
;
; CHECK-FMA-LABEL: foo_float_reuse_const:
diff --git a/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll
index 6066c7ad875e..1b8eff65b02b 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll
@@ -2485,17 +2485,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_0_double_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i64*
%1 = load i64, i64* %0, align 8
@@ -2585,19 +2579,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_or_double_uint64_t(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -2609,19 +2596,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint16_double_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to i64*
@@ -2632,20 +2612,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_disjoint_align16_double_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f0, 24(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -2657,21 +2629,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint32_double_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to i64*
@@ -2731,27 +2695,16 @@ define dso_local double @ld_not_disjoint64_double_uint64_t(i64 %ptr) {
; CHECK-P10-NEXT: xscvuxddp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_double_uint64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvuxddp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_double_uint64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvuxddp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to i64*
@@ -2804,20 +2757,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_cst_align32_double_uint64_t() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f0, -27108(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 9999900 to i64*), align 8
%conv = uitofp i64 %0 to double
@@ -2834,23 +2779,14 @@ define dso_local double @ld_cst_align64_double_uint64_t() {
; CHECK-P10-NEXT: xscvuxddp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_double_uint64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvuxddp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_double_uint64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvuxddp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 1000000000000 to i64*), align 4096
%conv = uitofp i64 %0 to double
@@ -2859,17 +2795,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_0_double_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i64*
%1 = load i64, i64* %0, align 8
@@ -2959,19 +2889,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_or_double_int64_t(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -2983,19 +2906,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint16_double_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to i64*
@@ -3006,20 +2922,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_disjoint_align16_double_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f0, 24(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -3031,21 +2939,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint32_double_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to i64*
@@ -3105,27 +3005,16 @@ define dso_local double @ld_not_disjoint64_double_int64_t(i64 %ptr) {
; CHECK-P10-NEXT: xscvsxddp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_double_int64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvsxddp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_double_int64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvsxddp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to i64*
@@ -3178,20 +3067,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_cst_align32_double_int64_t() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f0, -27108(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 9999900 to i64*), align 8
%conv = sitofp i64 %0 to double
@@ -3208,23 +3089,14 @@ define dso_local double @ld_cst_align64_double_int64_t() {
; CHECK-P10-NEXT: xscvsxddp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_double_int64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvsxddp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_double_int64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvsxddp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 1000000000000 to i64*), align 4096
%conv = sitofp i64 %0 to double
@@ -3233,15 +3105,10 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_0_double_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
@@ -3325,17 +3192,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_or_double_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -3347,17 +3208,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint16_double_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -3368,18 +3223,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_disjoint_align16_double_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfs f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -3391,19 +3239,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint32_double_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
@@ -3459,25 +3300,15 @@ define dso_local double @ld_not_disjoint64_double_float(i64 %ptr) {
; CHECK-P10-NEXT: lfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_double_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_double_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -3527,18 +3358,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_cst_align32_double_float() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfs f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fpext float %0 to double
@@ -3554,21 +3378,13 @@ define dso_local double @ld_cst_align64_double_float() {
; CHECK-P10-NEXT: lfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_double_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_double_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fpext float %0 to double
@@ -3577,15 +3393,10 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_0_double_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
@@ -3664,17 +3475,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_or_double_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -3685,17 +3490,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint16_double_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -3705,18 +3504,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_disjoint_align16_double_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -3727,19 +3519,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint32_double_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -3793,25 +3578,15 @@ define dso_local double @ld_not_disjoint64_double_double(i64 %ptr) {
; CHECK-P10-NEXT: lfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_double_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_double_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -3858,18 +3633,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_cst_align32_double_double() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
ret double %0
@@ -3884,21 +3652,13 @@ define dso_local double @ld_cst_align64_double_double() {
; CHECK-P10-NEXT: lfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_double_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_double_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
ret double %0
@@ -7110,17 +6870,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_double_float(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_0_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: stfs f0, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fptrunc double %str to float
%0 = inttoptr i64 %ptr to float*
@@ -7210,19 +6964,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_double_float(i64 %ptr, i8 zeroext %off, double %str) {
-; CHECK-POSTP8-LABEL: st_or1_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: stfs f0, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fptrunc double %str to float
%conv1 = zext i8 %off to i64
@@ -7234,19 +6981,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_double_float(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint16_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: stfs f0, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fptrunc double %str to float
%or = or i64 %ptr, 6
@@ -7257,20 +6997,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_double_float(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_disjoint_align16_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: stfs f0, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = fptrunc double %str to float
@@ -7282,21 +7014,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint32_double_float(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint32_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: stfs f0, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint32_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint32_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fptrunc double %str to float
%or = or i64 %ptr, 99999
@@ -7375,7 +7099,7 @@ define dso_local void @st_not_disjoint64_double_float(i64 %ptr, double %str) {
; CHECK-P8-NEXT: oris r4, r4, 54437
; CHECK-P8-NEXT: ori r4, r4, 4097
; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = fptrunc double %str to float
@@ -7429,20 +7153,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_double_float(double %str) {
-; CHECK-POSTP8-LABEL: st_cst_align32_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: stfs f0, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = fptrunc double %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
@@ -7459,23 +7175,14 @@ define dso_local void @st_cst_align64_double_float(double %str) {
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_cst_align64_double_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: xsrsp f0, f1
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align64_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_cst_align64_double_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: xsrsp f0, f1
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = fptrunc double %str to float
store float %conv, float* inttoptr (i64 1000000000000 to float*), align 4096
@@ -7484,15 +7191,10 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_double_double(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_0_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
store double %str, double* %0, align 8
@@ -7571,17 +7273,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_double_double(i64 %ptr, i8 zeroext %off, double %str) {
-; CHECK-POSTP8-LABEL: st_or1_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -7592,17 +7288,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_double_double(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint16_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -7612,18 +7302,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_double_double(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_disjoint_align16_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: stfd f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: stfd f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -7634,19 +7317,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint32_double_double(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint32_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint32_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint32_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -7700,25 +7376,15 @@ define dso_local void @st_not_disjoint64_double_double(i64 %ptr, double %str) {
; CHECK-P10-NEXT: stfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_double_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_double_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -7765,18 +7431,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_double_double(double %str) {
-; CHECK-POSTP8-LABEL: st_cst_align32_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: stfd f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: stfd f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
store double %str, double* inttoptr (i64 9999900 to double*), align 8
ret void
@@ -7791,21 +7450,13 @@ define dso_local void @st_cst_align64_double_double(double %str) {
; CHECK-P10-NEXT: stfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_cst_align64_double_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: stfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align64_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_cst_align64_double_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: stfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
store double %str, double* inttoptr (i64 1000000000000 to double*), align 4096
ret void
diff --git a/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll
index b8f12d54d5d8..e4d3c525e237 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll
@@ -2485,17 +2485,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_0_float_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i64*
%1 = load i64, i64* %0, align 8
@@ -2585,19 +2579,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_or_float_uint64_t(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -2609,19 +2596,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint16_float_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to i64*
@@ -2632,20 +2612,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_disjoint_align16_float_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f0, 24(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -2657,21 +2629,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint32_float_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to i64*
@@ -2731,27 +2695,16 @@ define dso_local float @ld_not_disjoint64_float_uint64_t(i64 %ptr) {
; CHECK-P10-NEXT: xscvuxdsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_float_uint64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvuxdsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_float_uint64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvuxdsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to i64*
@@ -2804,20 +2757,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_cst_align32_float_uint64_t() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f0, -27108(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 9999900 to i64*), align 8
%conv = uitofp i64 %0 to float
@@ -2834,23 +2779,14 @@ define dso_local float @ld_cst_align64_float_uint64_t() {
; CHECK-P10-NEXT: xscvuxdsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_float_uint64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvuxdsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_float_uint64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvuxdsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 1000000000000 to i64*), align 4096
%conv = uitofp i64 %0 to float
@@ -2859,17 +2795,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_0_float_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i64*
%1 = load i64, i64* %0, align 8
@@ -2959,19 +2889,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_or_float_int64_t(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -2983,19 +2906,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint16_float_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to i64*
@@ -3006,20 +2922,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_disjoint_align16_float_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f0, 24(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -3031,21 +2939,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint32_float_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to i64*
@@ -3105,27 +3005,16 @@ define dso_local float @ld_not_disjoint64_float_int64_t(i64 %ptr) {
; CHECK-P10-NEXT: xscvsxdsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_float_int64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvsxdsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_float_int64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvsxdsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to i64*
@@ -3178,20 +3067,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_cst_align32_float_int64_t() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f0, -27108(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 9999900 to i64*), align 8
%conv = sitofp i64 %0 to float
@@ -3208,23 +3089,14 @@ define dso_local float @ld_cst_align64_float_int64_t() {
; CHECK-P10-NEXT: xscvsxdsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_float_int64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvsxdsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_float_int64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvsxdsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 1000000000000 to i64*), align 4096
%conv = sitofp i64 %0 to float
@@ -3233,15 +3105,10 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_0_float_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
@@ -3320,17 +3187,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_or_float_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -3341,17 +3202,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint16_float_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -3361,18 +3216,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_disjoint_align16_float_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfs f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -3383,19 +3231,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint32_float_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
@@ -3449,25 +3290,15 @@ define dso_local float @ld_not_disjoint64_float_float(i64 %ptr) {
; CHECK-P10-NEXT: lfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_float_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_float_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -3514,18 +3345,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_cst_align32_float_float() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfs f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
ret float %0
@@ -3540,21 +3364,13 @@ define dso_local float @ld_cst_align64_float_float() {
; CHECK-P10-NEXT: lfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_float_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_float_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
ret float %0
@@ -3562,17 +3378,11 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_0_float_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
@@ -3662,19 +3472,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_or_float_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -3686,19 +3489,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint16_float_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -3709,20 +3505,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_disjoint_align16_float_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f0, 24(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -3734,21 +3522,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint32_float_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -3808,27 +3588,16 @@ define dso_local float @ld_not_disjoint64_float_double(i64 %ptr) {
; CHECK-P10-NEXT: xsrsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_float_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xsrsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_float_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xsrsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -3881,20 +3650,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_cst_align32_float_double() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f0, -27108(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptrunc double %0 to float
@@ -3911,23 +3672,14 @@ define dso_local float @ld_cst_align64_float_double() {
; CHECK-P10-NEXT: xsrsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_float_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xsrsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_float_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xsrsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptrunc double %0 to float
@@ -7140,15 +6892,10 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_float_float(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_0_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: stfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: stfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
store float %str, float* %0, align 4
@@ -7227,17 +6974,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_float_float(i64 %ptr, i8 zeroext %off, float %str) {
-; CHECK-POSTP8-LABEL: st_or1_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: stfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: stfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -7248,17 +6989,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_float_float(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint16_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: stfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: stfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -7268,18 +7003,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_float_float(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_disjoint_align16_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: stfs f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: stfs f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -7290,19 +7018,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint32_float_float(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint32_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: stfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint32_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint32_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: stfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
@@ -7356,25 +7077,15 @@ define dso_local void @st_not_disjoint64_float_float(i64 %ptr, float %str) {
; CHECK-P10-NEXT: stfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_float_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_float_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -7421,18 +7132,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_float_float(float %str) {
-; CHECK-POSTP8-LABEL: st_cst_align32_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: stfs f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: stfs f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
store float %str, float* inttoptr (i64 9999900 to float*), align 4
ret void
@@ -7447,21 +7151,13 @@ define dso_local void @st_cst_align64_float_float(float %str) {
; CHECK-P10-NEXT: stfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_cst_align64_float_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: stfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align64_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_cst_align64_float_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: stfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
store float %str, float* inttoptr (i64 1000000000000 to float*), align 4096
ret void
@@ -7469,15 +7165,10 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_float_double(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_0_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fpext float %str to double
%0 = inttoptr i64 %ptr to double*
@@ -7561,17 +7252,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_float_double(i64 %ptr, i8 zeroext %off, float %str) {
-; CHECK-POSTP8-LABEL: st_or1_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fpext float %str to double
%conv1 = zext i8 %off to i64
@@ -7583,17 +7268,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_float_double(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint16_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fpext float %str to double
%or = or i64 %ptr, 6
@@ -7604,18 +7283,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_float_double(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_disjoint_align16_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: stfd f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: stfd f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = fpext float %str to double
@@ -7627,19 +7299,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint32_float_double(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint32_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint32_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint32_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fpext float %str to double
%or = or i64 %ptr, 99999
@@ -7695,25 +7360,15 @@ define dso_local void @st_not_disjoint64_float_double(i64 %ptr, float %str) {
; CHECK-P10-NEXT: stfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_float_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_float_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = fpext float %str to double
%or = or i64 %ptr, 1000000000001
@@ -7763,18 +7418,11 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_float_double(float %str) {
-; CHECK-POSTP8-LABEL: st_cst_align32_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: stfd f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: stfd f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = fpext float %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
@@ -7790,21 +7438,13 @@ define dso_local void @st_cst_align64_float_double(float %str) {
; CHECK-P10-NEXT: stfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_cst_align64_float_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: stfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align64_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_cst_align64_float_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: stfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = fpext float %str to double
store double %conv, double* inttoptr (i64 1000000000000 to double*), align 4096
diff --git a/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
index 5babdaa2a54f..bd9e132346b9 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
@@ -1675,29 +1675,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_0_int16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
@@ -1799,32 +1783,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_or_int16_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -1836,32 +1802,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_not_disjoint16_int16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -1872,33 +1820,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_disjoint_align16_int16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -1910,35 +1839,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_not_disjoint32_int16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
@@ -2006,31 +1915,18 @@ define dso_local signext i16 @ld_not_disjoint64_int16_t_float(i64 %ptr) {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -2090,33 +1986,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_cst_align32_int16_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptosi float %0 to i16
@@ -2135,27 +2012,16 @@ define dso_local signext i16 @ld_cst_align64_int16_t_float() {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptosi float %0 to i16
@@ -2164,29 +2030,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_0_int16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
@@ -2288,32 +2138,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_or_int16_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -2325,32 +2157,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_not_disjoint16_int16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -2361,33 +2175,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_disjoint_align16_int16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -2399,35 +2194,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_not_disjoint32_int16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -2495,31 +2270,18 @@ define dso_local signext i16 @ld_not_disjoint64_int16_t_double(i64 %ptr) {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -2578,33 +2340,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_cst_align32_int16_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptosi double %0 to i16
@@ -2623,27 +2366,16 @@ define dso_local signext i16 @ld_cst_align64_int16_t_double() {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptosi double %0 to i16
@@ -4705,32 +4437,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_or_uint16_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -4742,32 +4456,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_not_disjoint16_uint16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -4778,33 +4474,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_disjoint_align16_uint16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -4816,35 +4493,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_not_disjoint32_uint16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
@@ -4912,31 +4569,18 @@ define dso_local zeroext i16 @ld_not_disjoint64_uint16_t_float(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -4995,33 +4639,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_cst_align32_uint16_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptoui float %0 to i16
@@ -5040,27 +4665,16 @@ define dso_local zeroext i16 @ld_cst_align64_uint16_t_float() {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptoui float %0 to i16
@@ -5069,29 +4683,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_0_uint16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
@@ -5193,32 +4791,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_or_uint16_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -5230,32 +4810,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_not_disjoint16_uint16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -5266,33 +4828,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_disjoint_align16_uint16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -5304,35 +4847,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_not_disjoint32_uint16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -5400,31 +4923,18 @@ define dso_local zeroext i16 @ld_not_disjoint64_uint16_t_double(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -5483,33 +4993,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_cst_align32_uint16_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptoui double %0 to i16
@@ -5528,27 +5019,16 @@ define dso_local zeroext i16 @ld_cst_align64_uint16_t_double() {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptoui double %0 to i16
@@ -6690,26 +6170,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint16_t_float(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to float
%0 = inttoptr i64 %ptr to float*
@@ -6824,29 +6290,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint16_t_float(i64 %ptr, i8 zeroext %off, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to float
%conv1 = zext i8 %off to i64
@@ -6858,29 +6308,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint16_t_float(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to float
%or = or i64 %ptr, 6
@@ -6891,30 +6325,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint16_t_float(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i16 %str to float
@@ -6950,7 +6367,7 @@ define dso_local void @st_not_disjoint32_uint16_t_float(i64 %ptr, i16 zeroext %s
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i16 %str to float
@@ -7015,29 +6432,17 @@ define dso_local void @st_not_disjoint64_uint16_t_float(i64 %ptr, i16 zeroext %s
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i16 %str to float
%or = or i64 %ptr, 1000000000001
@@ -7104,30 +6509,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint16_t_float(i16 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
@@ -7162,7 +6550,7 @@ define dso_local void @st_cst_align64_uint16_t_float(i16 zeroext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i16 %str to float
@@ -7172,26 +6560,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint16_t_double(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to double
%0 = inttoptr i64 %ptr to double*
@@ -7306,29 +6680,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint16_t_double(i64 %ptr, i8 zeroext %off, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to double
%conv1 = zext i8 %off to i64
@@ -7340,29 +6698,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint16_t_double(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to double
%or = or i64 %ptr, 6
@@ -7373,30 +6715,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint16_t_double(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i16 %str to double
@@ -7432,7 +6757,7 @@ define dso_local void @st_not_disjoint32_uint16_t_double(i64 %ptr, i16 zeroext %
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i16 %str to double
@@ -7495,31 +6820,19 @@ define dso_local void @st_not_disjoint64_uint16_t_double(i64 %ptr, i16 zeroext %
; CHECK-P10-NEXT: xscvuxddp f0, f0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint64_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i16 %str to double
%or = or i64 %ptr, 1000000000001
@@ -7586,30 +6899,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint16_t_double(i16 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
@@ -7644,7 +6940,7 @@ define dso_local void @st_cst_align64_uint16_t_double(i16 zeroext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i16 %str to double
@@ -8230,26 +7526,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int16_t_float(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_0_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to float
%0 = inttoptr i64 %ptr to float*
@@ -8364,29 +7646,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int16_t_float(i64 %ptr, i8 zeroext %off, i16 signext %str) {
-; CHECK-P10-LABEL: st_or1_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to float
%conv1 = zext i8 %off to i64
@@ -8398,29 +7664,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int16_t_float(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to float
%or = or i64 %ptr, 6
@@ -8431,30 +7681,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int16_t_float(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i16 %str to float
@@ -8490,7 +7723,7 @@ define dso_local void @st_not_disjoint32_int16_t_float(i64 %ptr, i16 signext %st
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i16 %str to float
@@ -8555,29 +7788,17 @@ define dso_local void @st_not_disjoint64_int16_t_float(i64 %ptr, i16 signext %st
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i16 %str to float
%or = or i64 %ptr, 1000000000001
@@ -8645,30 +7866,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int16_t_float(i16 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
@@ -8703,7 +7907,7 @@ define dso_local void @st_cst_align64_int16_t_float(i16 signext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i16 %str to float
@@ -8713,26 +7917,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int16_t_double(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_0_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to double
%0 = inttoptr i64 %ptr to double*
@@ -8847,29 +8037,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int16_t_double(i64 %ptr, i8 zeroext %off, i16 signext %str) {
-; CHECK-P10-LABEL: st_or1_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to double
%conv1 = zext i8 %off to i64
@@ -8881,29 +8055,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int16_t_double(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to double
%or = or i64 %ptr, 6
@@ -8914,30 +8072,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int16_t_double(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i16 %str to double
@@ -8973,7 +8114,7 @@ define dso_local void @st_not_disjoint32_int16_t_double(i64 %ptr, i16 signext %s
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i16 %str to double
@@ -9038,29 +8179,17 @@ define dso_local void @st_not_disjoint64_int16_t_double(i64 %ptr, i16 signext %s
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i16 %str to double
%or = or i64 %ptr, 1000000000001
@@ -9127,30 +8256,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int16_t_double(i16 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
@@ -9185,7 +8297,7 @@ define dso_local void @st_cst_align64_int16_t_double(i16 signext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i16 %str to double
diff --git a/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
index 19a56e88ae11..0ec7db16837a 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
@@ -1603,29 +1603,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_0_int32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
@@ -1727,32 +1711,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_or_int32_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -1784,32 +1750,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_not_disjoint16_int32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -1820,33 +1768,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_disjoint_align16_int32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -1858,35 +1787,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_not_disjoint32_int32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
@@ -1954,31 +1863,18 @@ define dso_local signext i32 @ld_not_disjoint64_int32_t_float(i64 %ptr) {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -2037,33 +1933,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_cst_align32_int32_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptosi float %0 to i32
@@ -2082,27 +1959,16 @@ define dso_local signext i32 @ld_cst_align64_int32_t_float() {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptosi float %0 to i32
@@ -2111,29 +1977,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_0_int32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
@@ -2235,32 +2085,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_or_int32_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -2292,32 +2124,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_not_disjoint16_int32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -2328,33 +2142,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_disjoint_align16_int32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -2366,35 +2161,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_not_disjoint32_int32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -2462,31 +2237,18 @@ define dso_local signext i32 @ld_not_disjoint64_int32_t_double(i64 %ptr) {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -2545,33 +2307,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_cst_align32_int32_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptosi double %0 to i32
@@ -2590,27 +2333,16 @@ define dso_local signext i32 @ld_cst_align64_int32_t_double() {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptosi double %0 to i32
@@ -4640,29 +4372,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_0_uint32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
@@ -4764,32 +4480,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_or_uint32_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -4801,32 +4499,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_not_disjoint16_uint32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -4837,33 +4517,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_disjoint_align16_uint32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -4875,46 +4536,26 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_not_disjoint32_uint32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
-entry:
- %or = or i64 %ptr, 99999
- %0 = inttoptr i64 %or to float*
- %1 = load float, float* %0, align 4
- %conv = fptoui float %1 to i32
- ret i32 %conv
-}
-
-; Function Attrs: norecurse nounwind readonly uwtable willreturn
-define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_float:
+; CHECK-LABEL: ld_not_disjoint32_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
+entry:
+ %or = or i64 %ptr, 99999
+ %0 = inttoptr i64 %or to float*
+ %1 = load float, float* %0, align 4
+ %conv = fptoui float %1 to i32
+ ret i32 %conv
+}
+
+; Function Attrs: norecurse nounwind readonly uwtable willreturn
+define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_float(i64 %ptr) {
+; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
@@ -4971,31 +4612,18 @@ define dso_local zeroext i32 @ld_not_disjoint64_uint32_t_float(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -5054,33 +4682,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_cst_align32_uint32_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptoui float %0 to i32
@@ -5099,27 +4708,16 @@ define dso_local zeroext i32 @ld_cst_align64_uint32_t_float() {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptoui float %0 to i32
@@ -5128,29 +4726,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_0_uint32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
@@ -5252,32 +4834,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_or_uint32_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -5289,32 +4853,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_not_disjoint16_uint32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -5325,33 +4871,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_disjoint_align16_uint32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -5363,35 +4890,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_not_disjoint32_uint32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -5459,31 +4966,18 @@ define dso_local zeroext i32 @ld_not_disjoint64_uint32_t_double(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -5529,46 +5023,27 @@ entry:
define dso_local zeroext i32 @ld_cst_align16_uint32_t_double() {
; CHECK-LABEL: ld_cst_align16_uint32_t_double:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: lfd f0, 4080(0)
-; CHECK-NEXT: xscvdpuxws f0, f0
-; CHECK-NEXT: mffprwz r3, f0
-; CHECK-NEXT: clrldi r3, r3, 32
-; CHECK-NEXT: blr
-entry:
- %0 = load double, double* inttoptr (i64 4080 to double*), align 16
- %conv = fptoui double %0 to i32
- ret i32 %conv
-}
-
-; Function Attrs: norecurse nounwind readonly uwtable willreturn
-define dso_local zeroext i32 @ld_cst_align32_uint32_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-NEXT: lfd f0, 4080(0)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
+entry:
+ %0 = load double, double* inttoptr (i64 4080 to double*), align 16
+ %conv = fptoui double %0 to i32
+ ret i32 %conv
+}
+
+; Function Attrs: norecurse nounwind readonly uwtable willreturn
+define dso_local zeroext i32 @ld_cst_align32_uint32_t_double() {
+; CHECK-LABEL: ld_cst_align32_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptoui double %0 to i32
@@ -5587,27 +5062,16 @@ define dso_local zeroext i32 @ld_cst_align64_uint32_t_double() {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptoui double %0 to i32
@@ -6749,26 +6213,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint32_t_float(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to float
%0 = inttoptr i64 %ptr to float*
@@ -6883,29 +6333,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint32_t_float(i64 %ptr, i8 zeroext %off, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to float
%conv1 = zext i8 %off to i64
@@ -6917,29 +6351,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint32_t_float(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to float
%or = or i64 %ptr, 6
@@ -6950,30 +6368,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint32_t_float(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i32 %str to float
@@ -7009,7 +6410,7 @@ define dso_local void @st_not_disjoint32_uint32_t_float(i64 %ptr, i32 zeroext %s
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i32 %str to float
@@ -7074,29 +6475,17 @@ define dso_local void @st_not_disjoint64_uint32_t_float(i64 %ptr, i32 zeroext %s
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i32 %str to float
%or = or i64 %ptr, 1000000000001
@@ -7163,30 +6552,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint32_t_float(i32 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
@@ -7221,7 +6593,7 @@ define dso_local void @st_cst_align64_uint32_t_float(i32 zeroext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i32 %str to float
@@ -7231,26 +6603,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint32_t_double(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to double
%0 = inttoptr i64 %ptr to double*
@@ -7365,29 +6723,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint32_t_double(i64 %ptr, i8 zeroext %off, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to double
%conv1 = zext i8 %off to i64
@@ -7399,29 +6741,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint32_t_double(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to double
%or = or i64 %ptr, 6
@@ -7432,30 +6758,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint32_t_double(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i32 %str to double
@@ -7491,7 +6800,7 @@ define dso_local void @st_not_disjoint32_uint32_t_double(i64 %ptr, i32 zeroext %
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i32 %str to double
@@ -7556,29 +6865,17 @@ define dso_local void @st_not_disjoint64_uint32_t_double(i64 %ptr, i32 zeroext %
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i32 %str to double
%or = or i64 %ptr, 1000000000001
@@ -7645,30 +6942,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint32_t_double(i32 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
@@ -7703,7 +6983,7 @@ define dso_local void @st_cst_align64_uint32_t_double(i32 zeroext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i32 %str to double
@@ -8001,26 +7281,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int32_t_float(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_0_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to float
%0 = inttoptr i64 %ptr to float*
@@ -8135,29 +7401,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int32_t_float(i64 %ptr, i8 zeroext %off, i32 signext %str) {
-; CHECK-P10-LABEL: st_or1_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to float
%conv1 = zext i8 %off to i64
@@ -8169,29 +7419,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int32_t_float(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to float
%or = or i64 %ptr, 6
@@ -8202,30 +7436,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int32_t_float(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i32 %str to float
@@ -8261,7 +7478,7 @@ define dso_local void @st_not_disjoint32_int32_t_float(i64 %ptr, i32 signext %st
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i32 %str to float
@@ -8326,29 +7543,17 @@ define dso_local void @st_not_disjoint64_int32_t_float(i64 %ptr, i32 signext %st
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i32 %str to float
%or = or i64 %ptr, 1000000000001
@@ -8415,30 +7620,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int32_t_float(i32 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
@@ -8473,7 +7661,7 @@ define dso_local void @st_cst_align64_int32_t_float(i32 signext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i32 %str to float
@@ -8483,26 +7671,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int32_t_double(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_0_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to double
%0 = inttoptr i64 %ptr to double*
@@ -8617,29 +7791,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int32_t_double(i64 %ptr, i8 zeroext %off, i32 signext %str) {
-; CHECK-P10-LABEL: st_or1_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to double
%conv1 = zext i8 %off to i64
@@ -8651,29 +7809,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int32_t_double(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to double
%or = or i64 %ptr, 6
@@ -8684,30 +7826,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int32_t_double(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i32 %str to double
@@ -8743,7 +7868,7 @@ define dso_local void @st_not_disjoint32_int32_t_double(i64 %ptr, i32 signext %s
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i32 %str to double
@@ -8808,29 +7933,17 @@ define dso_local void @st_not_disjoint64_int32_t_double(i64 %ptr, i32 signext %s
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i32 %str to double
%or = or i64 %ptr, 1000000000001
@@ -8897,30 +8010,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int32_t_double(i32 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
@@ -8955,7 +8051,7 @@ define dso_local void @st_cst_align64_int32_t_double(i32 signext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i32 %str to double
diff --git a/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll
index 473e3e644205..e59e78c25146 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll
@@ -20,26 +20,12 @@
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_0_int64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
@@ -135,29 +121,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_or_int64_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -169,29 +139,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint16_int64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -202,30 +156,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_disjoint_align16_int64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -237,32 +174,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint32_int64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
@@ -326,29 +245,17 @@ define dso_local i64 @ld_not_disjoint64_int64_t_float(i64 %ptr) {
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -404,30 +311,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_cst_align32_int64_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptosi float %0 to i64
@@ -445,25 +335,15 @@ define dso_local i64 @ld_cst_align64_int64_t_float() {
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptosi float %0 to i64
@@ -472,26 +352,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_0_int64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
@@ -587,29 +453,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_or_int64_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -621,29 +471,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint16_int64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -654,30 +488,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_disjoint_align16_int64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -689,32 +506,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint32_int64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -778,29 +577,17 @@ define dso_local i64 @ld_not_disjoint64_int64_t_double(i64 %ptr) {
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -856,30 +643,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_cst_align32_int64_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptosi double %0 to i64
@@ -897,25 +667,15 @@ define dso_local i64 @ld_cst_align64_int64_t_double() {
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptosi double %0 to i64
@@ -4372,26 +4132,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_0_uint64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
@@ -4559,29 +4305,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_or_uint64_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -4612,29 +4342,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint16_uint64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -4648,8 +4362,7 @@ define dso_local i64 @ld_disjoint_unalign16_uint64_t_float(i64 %ptr) {
; CHECK-LABEL: ld_disjoint_unalign16_uint64_t_float:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lfsx f0, 0, r3
+; CHECK-NEXT: lfs f0, 6(r3)
; CHECK-NEXT: xscvdpuxds f0, f0
; CHECK-NEXT: mffprd r3, f0
; CHECK-NEXT: blr
@@ -4659,72 +4372,37 @@ entry:
%0 = inttoptr i64 %or to float*
%1 = load float, float* %0, align 4
%conv = fptoui float %1 to i64
- ret i64 %conv
-}
-
-; Function Attrs: norecurse nounwind readonly uwtable willreturn
-define dso_local i64 @ld_disjoint_align16_uint64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
-entry:
- %and = and i64 %ptr, -4096
- %or = or i64 %and, 24
- %0 = inttoptr i64 %or to float*
- %1 = load float, float* %0, align 8
- %conv = fptoui float %1 to i64
- ret i64 %conv
-}
-
-; Function Attrs: norecurse nounwind readonly uwtable willreturn
-define dso_local i64 @ld_not_disjoint32_uint64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+ ret i64 %conv
+}
+
+; Function Attrs: norecurse nounwind readonly uwtable willreturn
+define dso_local i64 @ld_disjoint_align16_uint64_t_float(i64 %ptr) {
+; CHECK-LABEL: ld_disjoint_align16_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
+entry:
+ %and = and i64 %ptr, -4096
+ %or = or i64 %and, 24
+ %0 = inttoptr i64 %or to float*
+ %1 = load float, float* %0, align 8
+ %conv = fptoui float %1 to i64
+ ret i64 %conv
+}
+
+; Function Attrs: norecurse nounwind readonly uwtable willreturn
+define dso_local i64 @ld_not_disjoint32_uint64_t_float(i64 %ptr) {
+; CHECK-LABEL: ld_not_disjoint32_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
@@ -4817,29 +4495,17 @@ define dso_local i64 @ld_not_disjoint64_uint64_t_float(i64 %ptr) {
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -4977,9 +4643,8 @@ define dso_local i64 @ld_cst_unalign32_uint64_t_float() {
;
; CHECK-P8-LABEL: ld_cst_unalign32_uint64_t_float:
; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 1
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: lfsx f0, 0, r3
+; CHECK-P8-NEXT: lis r3, 2
+; CHECK-P8-NEXT: lfs f0, -31073(r3)
; CHECK-P8-NEXT: xscvdpuxds f0, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
@@ -4991,30 +4656,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_cst_align32_uint64_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptoui float %0 to i64
@@ -5033,27 +4681,16 @@ define dso_local i64 @ld_cst_unalign64_uint64_t_float() {
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_unalign64_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r3, 29
-; CHECK-P9-NEXT: rldic r3, r3, 35, 24
-; CHECK-P9-NEXT: oris r3, r3, 54437
-; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_unalign64_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r3, 29
-; CHECK-P8-NEXT: rldic r3, r3, 35, 24
-; CHECK-P8-NEXT: oris r3, r3, 54437
-; CHECK-P8-NEXT: ori r3, r3, 4097
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_unalign64_uint64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r3, 29
+; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
+; CHECK-PREP10-NEXT: oris r3, r3, 54437
+; CHECK-PREP10-NEXT: ori r3, r3, 4097
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000001 to float*), align 4
%conv = fptoui float %0 to i64
@@ -5071,25 +4708,15 @@ define dso_local i64 @ld_cst_align64_uint64_t_float() {
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptoui float %0 to i64
@@ -5098,26 +4725,12 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_0_uint64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
@@ -5285,29 +4898,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_or_uint64_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -5338,29 +4935,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint16_uint64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -5374,8 +4955,7 @@ define dso_local i64 @ld_disjoint_unalign16_uint64_t_double(i64 %ptr) {
; CHECK-LABEL: ld_disjoint_unalign16_uint64_t_double:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lfdx f0, 0, r3
+; CHECK-NEXT: lfd f0, 6(r3)
; CHECK-NEXT: xscvdpuxds f0, f0
; CHECK-NEXT: mffprd r3, f0
; CHECK-NEXT: blr
@@ -5390,30 +4970,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_disjoint_align16_uint64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -5425,32 +4988,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint32_uint64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -5543,29 +5088,17 @@ define dso_local i64 @ld_not_disjoint64_uint64_t_double(i64 %ptr) {
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -5703,9 +5236,8 @@ define dso_local i64 @ld_cst_unalign32_uint64_t_double() {
;
; CHECK-P8-LABEL: ld_cst_unalign32_uint64_t_double:
; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 1
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: lfdx f0, 0, r3
+; CHECK-P8-NEXT: lis r3, 2
+; CHECK-P8-NEXT: lfd f0, -31073(r3)
; CHECK-P8-NEXT: xscvdpuxds f0, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
@@ -5717,30 +5249,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_cst_align32_uint64_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptoui double %0 to i64
@@ -5759,27 +5274,16 @@ define dso_local i64 @ld_cst_unalign64_uint64_t_double() {
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_unalign64_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r3, 29
-; CHECK-P9-NEXT: rldic r3, r3, 35, 24
-; CHECK-P9-NEXT: oris r3, r3, 54437
-; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_unalign64_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r3, 29
-; CHECK-P8-NEXT: rldic r3, r3, 35, 24
-; CHECK-P8-NEXT: oris r3, r3, 54437
-; CHECK-P8-NEXT: ori r3, r3, 4097
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_unalign64_uint64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r3, 29
+; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
+; CHECK-PREP10-NEXT: oris r3, r3, 54437
+; CHECK-PREP10-NEXT: ori r3, r3, 4097
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000001 to double*), align 8
%conv = fptoui double %0 to i64
@@ -5797,25 +5301,15 @@ define dso_local i64 @ld_cst_align64_uint64_t_double() {
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptoui double %0 to i64
@@ -7329,26 +6823,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_0_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to float
%0 = inttoptr i64 %ptr to float*
@@ -7463,29 +6943,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint64_t_float(i64 %ptr, i8 zeroext %off, i64 %str) {
-; CHECK-P10-LABEL: st_or1_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to float
%conv1 = zext i8 %off to i64
@@ -7516,29 +6980,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to float
%or = or i64 %ptr, 6
@@ -7549,30 +6997,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i64 %str to float
@@ -7608,7 +7039,7 @@ define dso_local void @st_not_disjoint32_uint64_t_float(i64 %ptr, i64 %str) {
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i64 %str to float
@@ -7673,29 +7104,17 @@ define dso_local void @st_not_disjoint64_uint64_t_float(i64 %ptr, i64 %str) {
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprd f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i64 %str to float
%or = or i64 %ptr, 1000000000001
@@ -7762,30 +7181,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint64_t_float(i64 %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
@@ -7820,7 +7222,7 @@ define dso_local void @st_cst_align64_uint64_t_float(i64 %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i64 %str to float
@@ -7830,26 +7232,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_0_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to double
%0 = inttoptr i64 %ptr to double*
@@ -7964,29 +7352,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint64_t_double(i64 %ptr, i8 zeroext %off, i64 %str) {
-; CHECK-P10-LABEL: st_or1_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to double
%conv1 = zext i8 %off to i64
@@ -8017,29 +7389,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to double
%or = or i64 %ptr, 6
@@ -8050,30 +7406,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i64 %str to double
@@ -8109,7 +7448,7 @@ define dso_local void @st_not_disjoint32_uint64_t_double(i64 %ptr, i64 %str) {
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i64 %str to double
@@ -8174,29 +7513,17 @@ define dso_local void @st_not_disjoint64_uint64_t_double(i64 %ptr, i64 %str) {
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprd f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i64 %str to double
%or = or i64 %ptr, 1000000000001
@@ -8263,30 +7590,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint64_t_double(i64 %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
@@ -8321,7 +7631,7 @@ define dso_local void @st_cst_align64_uint64_t_double(i64 %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i64 %str to double
@@ -8331,26 +7641,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_0_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to float
%0 = inttoptr i64 %ptr to float*
@@ -8465,29 +7761,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int64_t_float(i64 %ptr, i8 zeroext %off, i64 %str) {
-; CHECK-P10-LABEL: st_or1_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to float
%conv1 = zext i8 %off to i64
@@ -8518,29 +7798,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to float
%or = or i64 %ptr, 6
@@ -8551,30 +7815,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i64 %str to float
@@ -8610,7 +7857,7 @@ define dso_local void @st_not_disjoint32_int64_t_float(i64 %ptr, i64 %str) {
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i64 %str to float
@@ -8675,29 +7922,17 @@ define dso_local void @st_not_disjoint64_int64_t_float(i64 %ptr, i64 %str) {
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprd f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i64 %str to float
%or = or i64 %ptr, 1000000000001
@@ -8764,30 +7999,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int64_t_float(i64 %str) {
-; CHECK-P10-LABEL: st_cst_align32_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
@@ -8822,7 +8040,7 @@ define dso_local void @st_cst_align64_int64_t_float(i64 %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i64 %str to float
@@ -8832,26 +8050,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_0_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to double
%0 = inttoptr i64 %ptr to double*
@@ -8966,29 +8170,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int64_t_double(i64 %ptr, i8 zeroext %off, i64 %str) {
-; CHECK-P10-LABEL: st_or1_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to double
%conv1 = zext i8 %off to i64
@@ -9019,29 +8207,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to double
%or = or i64 %ptr, 6
@@ -9052,30 +8224,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i64 %str to double
@@ -9111,7 +8266,7 @@ define dso_local void @st_not_disjoint32_int64_t_double(i64 %ptr, i64 %str) {
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i64 %str to double
@@ -9176,29 +8331,17 @@ define dso_local void @st_not_disjoint64_int64_t_double(i64 %ptr, i64 %str) {
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprd f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i64 %str to double
%or = or i64 %ptr, 1000000000001
@@ -9265,30 +8408,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int64_t_double(i64 %str) {
-; CHECK-P10-LABEL: st_cst_align32_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
@@ -9323,7 +8449,7 @@ define dso_local void @st_cst_align64_int64_t_double(i64 %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i64 %str to double
diff --git a/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
index 51ea2023e4a8..715d7a5efd83 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
@@ -2087,29 +2087,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_0_int8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
@@ -2211,32 +2195,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_or_int8_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -2248,32 +2214,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_not_disjoint16_int8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -2284,33 +2232,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_disjoint_align16_int8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -2322,35 +2251,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_not_disjoint32_int8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
@@ -2418,31 +2327,18 @@ define dso_local signext i8 @ld_not_disjoint64_int8_t_float(i64 %ptr) {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -2501,33 +2397,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_cst_align32_int8_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptosi float %0 to i8
@@ -2546,27 +2423,16 @@ define dso_local signext i8 @ld_cst_align64_int8_t_float() {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptosi float %0 to i8
@@ -2575,29 +2441,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_0_int8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
@@ -2699,32 +2549,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_or_int8_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -2736,32 +2568,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_not_disjoint16_int8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -2772,33 +2586,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_disjoint_align16_int8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -2810,35 +2605,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_not_disjoint32_int8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -2906,31 +2681,18 @@ define dso_local signext i8 @ld_not_disjoint64_int8_t_double(i64 %ptr) {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -2989,33 +2751,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_cst_align32_int8_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptosi double %0 to i8
@@ -3034,27 +2777,16 @@ define dso_local signext i8 @ld_cst_align64_int8_t_double() {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptosi double %0 to i8
@@ -5585,29 +5317,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_0_uint8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
@@ -5741,32 +5457,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_or_uint8_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -5778,32 +5476,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_not_disjoint16_uint8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
@@ -5814,33 +5494,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_disjoint_align16_uint8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -5852,35 +5513,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_not_disjoint32_uint8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
@@ -5948,31 +5589,18 @@ define dso_local zeroext i8 @ld_not_disjoint64_uint8_t_float(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
@@ -6066,33 +5694,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_cst_align32_uint8_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptoui float %0 to i8
@@ -6112,29 +5721,17 @@ define dso_local zeroext i8 @ld_cst_unalign64_uint8_t_float() {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_unalign64_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r3, 29
-; CHECK-P9-NEXT: rldic r3, r3, 35, 24
-; CHECK-P9-NEXT: oris r3, r3, 54437
-; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_unalign64_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r3, 29
-; CHECK-P8-NEXT: rldic r3, r3, 35, 24
-; CHECK-P8-NEXT: oris r3, r3, 54437
-; CHECK-P8-NEXT: ori r3, r3, 4097
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_unalign64_uint8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r3, 29
+; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
+; CHECK-PREP10-NEXT: oris r3, r3, 54437
+; CHECK-PREP10-NEXT: ori r3, r3, 4097
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000001 to float*), align 4
%conv = fptoui float %0 to i8
@@ -6153,27 +5750,16 @@ define dso_local zeroext i8 @ld_cst_align64_uint8_t_float() {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptoui float %0 to i8
@@ -6182,29 +5768,13 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_0_uint8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
@@ -6338,32 +5908,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_or_uint8_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
@@ -6375,32 +5927,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_not_disjoint16_uint8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
@@ -6411,33 +5945,14 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_disjoint_align16_uint8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -6449,35 +5964,15 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_not_disjoint32_uint8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
@@ -6545,31 +6040,18 @@ define dso_local zeroext i8 @ld_not_disjoint64_uint8_t_double(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
@@ -6662,34 +6144,15 @@ entry:
}
; Function Attrs: norecurse nounwind readonly uwtable willreturn
-define dso_local zeroext i8 @ld_cst_align32_uint8_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+define dso_local zeroext i8 @ld_cst_align32_uint8_t_double() {
+; CHECK-LABEL: ld_cst_align32_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptoui double %0 to i8
@@ -6709,29 +6172,17 @@ define dso_local zeroext i8 @ld_cst_unalign64_uint8_t_double() {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_unalign64_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r3, 29
-; CHECK-P9-NEXT: rldic r3, r3, 35, 24
-; CHECK-P9-NEXT: oris r3, r3, 54437
-; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_unalign64_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r3, 29
-; CHECK-P8-NEXT: rldic r3, r3, 35, 24
-; CHECK-P8-NEXT: oris r3, r3, 54437
-; CHECK-P8-NEXT: ori r3, r3, 4097
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_unalign64_uint8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r3, 29
+; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
+; CHECK-PREP10-NEXT: oris r3, r3, 54437
+; CHECK-PREP10-NEXT: ori r3, r3, 4097
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000001 to double*), align 8
%conv = fptoui double %0 to i8
@@ -6750,27 +6201,16 @@ define dso_local zeroext i8 @ld_cst_align64_uint8_t_double() {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptoui double %0 to i8
@@ -7912,26 +7352,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint8_t_float(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to float
%0 = inttoptr i64 %ptr to float*
@@ -8046,29 +7472,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint8_t_float(i64 %ptr, i8 zeroext %off, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to float
%conv1 = zext i8 %off to i64
@@ -8080,29 +7490,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint8_t_float(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to float
%or = or i64 %ptr, 6
@@ -8113,30 +7507,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint8_t_float(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i8 %str to float
@@ -8172,7 +7549,7 @@ define dso_local void @st_not_disjoint32_uint8_t_float(i64 %ptr, i8 zeroext %str
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i8 %str to float
@@ -8237,29 +7614,17 @@ define dso_local void @st_not_disjoint64_uint8_t_float(i64 %ptr, i8 zeroext %str
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i8 %str to float
%or = or i64 %ptr, 1000000000001
@@ -8326,30 +7691,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint8_t_float(i8 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
@@ -8384,7 +7732,7 @@ define dso_local void @st_cst_align64_uint8_t_float(i8 zeroext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i8 %str to float
@@ -8394,26 +7742,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint8_t_double(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to double
%0 = inttoptr i64 %ptr to double*
@@ -8528,29 +7862,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint8_t_double(i64 %ptr, i8 zeroext %off, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to double
%conv1 = zext i8 %off to i64
@@ -8562,29 +7880,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint8_t_double(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to double
%or = or i64 %ptr, 6
@@ -8595,30 +7897,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint8_t_double(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i8 %str to double
@@ -8654,7 +7939,7 @@ define dso_local void @st_not_disjoint32_uint8_t_double(i64 %ptr, i8 zeroext %st
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i8 %str to double
@@ -8717,31 +8002,19 @@ define dso_local void @st_not_disjoint64_uint8_t_double(i64 %ptr, i8 zeroext %st
; CHECK-P10-NEXT: xscvuxddp f0, f0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint64_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i8 %str to double
%or = or i64 %ptr, 1000000000001
@@ -8808,30 +8081,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint8_t_double(i8 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
@@ -8866,7 +8122,7 @@ define dso_local void @st_cst_align64_uint8_t_double(i8 zeroext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i8 %str to double
@@ -9740,26 +8996,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int8_t_float(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_0_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to float
%0 = inttoptr i64 %ptr to float*
@@ -9874,29 +9116,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int8_t_float(i64 %ptr, i8 zeroext %off, i8 signext %str) {
-; CHECK-P10-LABEL: st_or1_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to float
%conv1 = zext i8 %off to i64
@@ -9908,29 +9134,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int8_t_float(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to float
%or = or i64 %ptr, 6
@@ -9941,30 +9151,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int8_t_float(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i8 %str to float
@@ -10000,7 +9193,7 @@ define dso_local void @st_not_disjoint32_int8_t_float(i64 %ptr, i8 signext %str)
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i8 %str to float
@@ -10065,29 +9258,17 @@ define dso_local void @st_not_disjoint64_int8_t_float(i64 %ptr, i8 signext %str)
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i8 %str to float
%or = or i64 %ptr, 1000000000001
@@ -10154,30 +9335,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int8_t_float(i8 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
@@ -10212,7 +9376,7 @@ define dso_local void @st_cst_align64_int8_t_float(i8 signext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i8 %str to float
@@ -10222,26 +9386,12 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int8_t_double(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_0_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to double
%0 = inttoptr i64 %ptr to double*
@@ -10356,29 +9506,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int8_t_double(i64 %ptr, i8 zeroext %off, i8 signext %str) {
-; CHECK-P10-LABEL: st_or1_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to double
%conv1 = zext i8 %off to i64
@@ -10390,29 +9524,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int8_t_double(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to double
%or = or i64 %ptr, 6
@@ -10423,30 +9541,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int8_t_double(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i8 %str to double
@@ -10482,7 +9583,7 @@ define dso_local void @st_not_disjoint32_int8_t_double(i64 %ptr, i8 signext %str
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i8 %str to double
@@ -10547,29 +9648,17 @@ define dso_local void @st_not_disjoint64_int8_t_double(i64 %ptr, i8 signext %str
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i8 %str to double
%or = or i64 %ptr, 1000000000001
@@ -10636,30 +9725,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int8_t_double(i8 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
@@ -10694,7 +9766,7 @@ define dso_local void @st_cst_align64_int8_t_double(i8 signext %str) {
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i8 %str to double
diff --git a/llvm/test/CodeGen/PowerPC/scalar_vector_test_1.ll b/llvm/test/CodeGen/PowerPC/scalar_vector_test_1.ll
index c12f7f9a9f05..6f815d17620b 100644
--- a/llvm/test/CodeGen/PowerPC/scalar_vector_test_1.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar_vector_test_1.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE
; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
@@ -15,12 +16,25 @@ define <2 x i64> @s2v_test1(i64* nocapture readonly %int64, <2 x i64> %vec) {
; P9LE-NEXT: lfd f0, 0(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test1:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 0(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
+;
+; P8LE-LABEL: s2v_test1:
+; P8LE: # %bb.0: # %entry
+; P8LE-NEXT: lfdx f0, 0, r3
+; P8LE-NEXT: xxmrghd v2, v2, vs0
+; P8LE-NEXT: blr
+;
+; P8BE-LABEL: s2v_test1:
+; P8BE: # %bb.0: # %entry
+; P8BE-NEXT: lfdx f0, 0, r3
+; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
+; P8BE-NEXT: blr
+
entry:
%0 = load i64, i64* %int64, align 8
%vecins = insertelement <2 x i64> %vec, i64 %0, i32 0
@@ -34,12 +48,25 @@ define <2 x i64> @s2v_test2(i64* nocapture readonly %int64, <2 x i64> %vec) {
; P9LE-NEXT: lfd f0, 8(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test2:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 8(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
+;
+; P8LE-LABEL: s2v_test2:
+; P8LE: # %bb.0: # %entry
+; P8LE-NEXT: lfd f0, 8(r3)
+; P8LE-NEXT: xxmrghd v2, v2, vs0
+; P8LE-NEXT: blr
+;
+; P8BE-LABEL: s2v_test2:
+; P8BE: # %bb.0: # %entry
+; P8BE-NEXT: lfd f0, 8(r3)
+; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
+; P8BE-NEXT: blr
+
entry:
%arrayidx = getelementptr inbounds i64, i64* %int64, i64 1
%0 = load i64, i64* %arrayidx, align 8
@@ -55,13 +82,28 @@ define <2 x i64> @s2v_test3(i64* nocapture readonly %int64, <2 x i64> %vec, i32
; P9LE-NEXT: lfdx f0, r3, r4
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
-; P9BE-LABEL: s2v_test3
+;
+; P9BE-LABEL: s2v_test3:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: sldi r4, r7, 3
; P9BE-NEXT: lfdx f0, r3, r4
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
+;
+; P8LE-LABEL: s2v_test3:
+; P8LE: # %bb.0: # %entry
+; P8LE-NEXT: sldi r4, r7, 3
+; P8LE-NEXT: lfdx f0, r3, r4
+; P8LE-NEXT: xxmrghd v2, v2, vs0
+; P8LE-NEXT: blr
+;
+; P8BE-LABEL: s2v_test3:
+; P8BE: # %bb.0: # %entry
+; P8BE-NEXT: sldi r4, r7, 3
+; P8BE-NEXT: lfdx f0, r3, r4
+; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
+; P8BE-NEXT: blr
+
entry:
%idxprom = sext i32 %Idx to i64
%arrayidx = getelementptr inbounds i64, i64* %int64, i64 %idxprom
@@ -77,12 +119,25 @@ define <2 x i64> @s2v_test4(i64* nocapture readonly %int64, <2 x i64> %vec) {
; P9LE-NEXT: lfd f0, 8(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test4:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 8(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
+;
+; P8LE-LABEL: s2v_test4:
+; P8LE: # %bb.0: # %entry
+; P8LE-NEXT: lfd f0, 8(r3)
+; P8LE-NEXT: xxmrghd v2, v2, vs0
+; P8LE-NEXT: blr
+;
+; P8BE-LABEL: s2v_test4:
+; P8BE: # %bb.0: # %entry
+; P8BE-NEXT: lfd f0, 8(r3)
+; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
+; P8BE-NEXT: blr
+
entry:
%arrayidx = getelementptr inbounds i64, i64* %int64, i64 1
%0 = load i64, i64* %arrayidx, align 8
@@ -97,12 +152,25 @@ define <2 x i64> @s2v_test5(<2 x i64> %vec, i64* nocapture readonly %ptr1) {
; P9LE-NEXT: lfd f0, 0(r5)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test5:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 0(r5)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
+;
+; P8LE-LABEL: s2v_test5:
+; P8LE: # %bb.0: # %entry
+; P8LE-NEXT: lfdx f0, 0, r5
+; P8LE-NEXT: xxmrghd v2, v2, vs0
+; P8LE-NEXT: blr
+;
+; P8BE-LABEL: s2v_test5:
+; P8BE: # %bb.0: # %entry
+; P8BE-NEXT: lfdx f0, 0, r5
+; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
+; P8BE-NEXT: blr
+
entry:
%0 = load i64, i64* %ptr1, align 8
%vecins = insertelement <2 x i64> %vec, i64 %0, i32 0
@@ -116,24 +184,27 @@ define <2 x double> @s2v_test_f1(double* nocapture readonly %f64, <2 x double> %
; P9LE-NEXT: lfd f0, 0(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test_f1:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 0(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
-
+;
; P8LE-LABEL: s2v_test_f1:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfdx f0, 0, r3
+; P8LE-NEXT: lfd f0, 0(r3)
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
-
+;
; P8BE-LABEL: s2v_test_f1:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfdx f0, 0, r3
+; P8BE-NEXT: lfd f0, 0(r3)
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
+
+
+
entry:
%0 = load double, double* %f64, align 8
%vecins = insertelement <2 x double> %vec, double %0, i32 0
@@ -147,24 +218,27 @@ define <2 x double> @s2v_test_f2(double* nocapture readonly %f64, <2 x double> %
; P9LE-NEXT: lfd f0, 8(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test_f2:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 8(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
-
+;
; P8LE-LABEL: s2v_test_f2:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: lfd f0, 8(r3)
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
-
+;
; P8BE-LABEL: s2v_test_f2:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lfd f0, 8(r3)
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
+
+
+
entry:
%arrayidx = getelementptr inbounds double, double* %f64, i64 1
%0 = load double, double* %arrayidx, align 8
@@ -180,27 +254,30 @@ define <2 x double> @s2v_test_f3(double* nocapture readonly %f64, <2 x double> %
; P9LE-NEXT: lfdx f0, r3, r4
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test_f3:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: sldi r4, r7, 3
; P9BE-NEXT: lfdx f0, r3, r4
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
-
+;
; P8LE-LABEL: s2v_test_f3:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: sldi r4, r7, 3
; P8LE-NEXT: lfdx f0, r3, r4
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
-
+;
; P8BE-LABEL: s2v_test_f3:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: sldi r4, r7, 3
; P8BE-NEXT: lfdx f0, r3, r4
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
+
+
+
entry:
%idxprom = sext i32 %Idx to i64
%arrayidx = getelementptr inbounds double, double* %f64, i64 %idxprom
@@ -216,24 +293,27 @@ define <2 x double> @s2v_test_f4(double* nocapture readonly %f64, <2 x double> %
; P9LE-NEXT: lfd f0, 8(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test_f4:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 8(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
-
+;
; P8LE-LABEL: s2v_test_f4:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: lfd f0, 8(r3)
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
-
+;
; P8BE-LABEL: s2v_test_f4:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lfd f0, 8(r3)
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
+
+
+
entry:
%arrayidx = getelementptr inbounds double, double* %f64, i64 1
%0 = load double, double* %arrayidx, align 8
@@ -248,24 +328,27 @@ define <2 x double> @s2v_test_f5(<2 x double> %vec, double* nocapture readonly %
; P9LE-NEXT: lfd f0, 0(r5)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test_f5:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 0(r5)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
-
+;
; P8LE-LABEL: s2v_test_f5:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfdx f0, 0, r5
+; P8LE-NEXT: lfd f0, 0(r5)
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
-
+;
; P8BE-LABEL: s2v_test_f5:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfdx f0, 0, r5
+; P8BE-NEXT: lfd f0, 0(r5)
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
+
+
+
entry:
%0 = load double, double* %ptr1, align 8
%vecins = insertelement <2 x double> %vec, double %0, i32 0
diff --git a/llvm/test/CodeGen/PowerPC/scalar_vector_test_2.ll b/llvm/test/CodeGen/PowerPC/scalar_vector_test_2.ll
index 783ea3a11cce..c7c8a441f52e 100644
--- a/llvm/test/CodeGen/PowerPC/scalar_vector_test_2.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar_vector_test_2.ll
@@ -27,18 +27,18 @@ define void @test_liwzx1(<1 x float>* %A, <1 x float>* %B, <1 x float>* %C) {
;
; P8LE-LABEL: test_liwzx1:
; P8LE: # %bb.0:
-; P8LE-NEXT: lfsx f0, 0, r3
-; P8LE-NEXT: lfsx f1, 0, r4
+; P8LE-NEXT: lfs f0, 0(r3)
+; P8LE-NEXT: lfs f1, 0(r4)
; P8LE-NEXT: xsaddsp f0, f0, f1
-; P8LE-NEXT: stfsx f0, 0, r5
+; P8LE-NEXT: stfs f0, 0(r5)
; P8LE-NEXT: blr
;
; P8BE-LABEL: test_liwzx1:
; P8BE: # %bb.0:
-; P8BE-NEXT: lfsx f0, 0, r3
-; P8BE-NEXT: lfsx f1, 0, r4
+; P8BE-NEXT: lfs f0, 0(r3)
+; P8BE-NEXT: lfs f1, 0(r4)
; P8BE-NEXT: xsaddsp f0, f0, f1
-; P8BE-NEXT: stfsx f0, 0, r5
+; P8BE-NEXT: stfs f0, 0(r5)
; P8BE-NEXT: blr
@@ -71,20 +71,20 @@ define <1 x float>* @test_liwzx2(<1 x float>* %A, <1 x float>* %B, <1 x float>*
;
; P8LE-LABEL: test_liwzx2:
; P8LE: # %bb.0:
-; P8LE-NEXT: lfsx f0, 0, r3
-; P8LE-NEXT: lfsx f1, 0, r4
+; P8LE-NEXT: lfs f0, 0(r3)
+; P8LE-NEXT: lfs f1, 0(r4)
; P8LE-NEXT: mr r3, r5
; P8LE-NEXT: xssubsp f0, f0, f1
-; P8LE-NEXT: stfsx f0, 0, r5
+; P8LE-NEXT: stfs f0, 0(r5)
; P8LE-NEXT: blr
;
; P8BE-LABEL: test_liwzx2:
; P8BE: # %bb.0:
-; P8BE-NEXT: lfsx f0, 0, r3
-; P8BE-NEXT: lfsx f1, 0, r4
+; P8BE-NEXT: lfs f0, 0(r3)
+; P8BE-NEXT: lfs f1, 0(r4)
; P8BE-NEXT: mr r3, r5
; P8BE-NEXT: xssubsp f0, f0, f1
-; P8BE-NEXT: stfsx f0, 0, r5
+; P8BE-NEXT: stfs f0, 0(r5)
; P8BE-NEXT: blr
diff --git a/llvm/test/CodeGen/PowerPC/select_const.ll b/llvm/test/CodeGen/PowerPC/select_const.ll
index 804cc7736bf8..b63cad382393 100644
--- a/llvm/test/CodeGen/PowerPC/select_const.ll
+++ b/llvm/test/CodeGen/PowerPC/select_const.ll
@@ -726,7 +726,7 @@ define double @sel_constants_fadd_constant(i1 %cond) {
; ISEL-NEXT: addi 4, 4, .LCPI42_0 at toc@l
; ISEL-NEXT: addi 3, 3, .LCPI42_1 at toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: sel_constants_fadd_constant:
@@ -741,7 +741,7 @@ define double @sel_constants_fadd_constant(i1 %cond) {
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB42_2
; NO_ISEL-NEXT: .LBB42_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fadd double %sel, 5.1
@@ -757,7 +757,7 @@ define double @sel_constants_fsub_constant(i1 %cond) {
; ISEL-NEXT: addi 4, 4, .LCPI43_0 at toc@l
; ISEL-NEXT: addi 3, 3, .LCPI43_1 at toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: sel_constants_fsub_constant:
@@ -772,7 +772,7 @@ define double @sel_constants_fsub_constant(i1 %cond) {
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB43_2
; NO_ISEL-NEXT: .LBB43_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fsub double %sel, 5.1
@@ -788,7 +788,7 @@ define double @fsub_constant_sel_constants(i1 %cond) {
; ISEL-NEXT: addi 4, 4, .LCPI44_0 at toc@l
; ISEL-NEXT: addi 3, 3, .LCPI44_1 at toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: fsub_constant_sel_constants:
@@ -803,7 +803,7 @@ define double @fsub_constant_sel_constants(i1 %cond) {
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB44_2
; NO_ISEL-NEXT: .LBB44_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fsub double 5.1, %sel
@@ -819,7 +819,7 @@ define double @sel_constants_fmul_constant(i1 %cond) {
; ISEL-NEXT: addi 4, 4, .LCPI45_0 at toc@l
; ISEL-NEXT: addi 3, 3, .LCPI45_1 at toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: sel_constants_fmul_constant:
@@ -834,7 +834,7 @@ define double @sel_constants_fmul_constant(i1 %cond) {
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB45_2
; NO_ISEL-NEXT: .LBB45_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fmul double %sel, 5.1
@@ -850,7 +850,7 @@ define double @sel_constants_fdiv_constant(i1 %cond) {
; ISEL-NEXT: addi 4, 4, .LCPI46_0 at toc@l
; ISEL-NEXT: addi 3, 3, .LCPI46_1 at toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: sel_constants_fdiv_constant:
@@ -865,7 +865,7 @@ define double @sel_constants_fdiv_constant(i1 %cond) {
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB46_2
; NO_ISEL-NEXT: .LBB46_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fdiv double %sel, 5.1
@@ -881,7 +881,7 @@ define double @fdiv_constant_sel_constants(i1 %cond) {
; ISEL-NEXT: addi 4, 4, .LCPI47_0 at toc@l
; ISEL-NEXT: addi 3, 3, .LCPI47_1 at toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: fdiv_constant_sel_constants:
@@ -896,7 +896,7 @@ define double @fdiv_constant_sel_constants(i1 %cond) {
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB47_2
; NO_ISEL-NEXT: .LBB47_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fdiv double 5.1, %sel
@@ -930,7 +930,7 @@ define double @frem_constant_sel_constants(i1 %cond) {
; ISEL-NEXT: addi 4, 4, .LCPI49_0 at toc@l
; ISEL-NEXT: addi 3, 3, .LCPI49_1 at toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: frem_constant_sel_constants:
@@ -945,7 +945,7 @@ define double @frem_constant_sel_constants(i1 %cond) {
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB49_2
; NO_ISEL-NEXT: .LBB49_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = frem double 5.1, %sel
diff --git a/llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll b/llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
index 5c71c7394960..4ba8d45b50b5 100644
--- a/llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
+++ b/llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
@@ -98,7 +98,7 @@ define <4 x i16> @fold_srem_vec_1(<4 x i16> %x) {
; P9BE-NEXT: addis r3, r2, .LCPI0_0 at toc@ha
; P9BE-NEXT: ori r4, r4, 63249
; P9BE-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 6
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r3, r3
@@ -323,7 +323,7 @@ define <4 x i16> @fold_srem_vec_2(<4 x i16> %x) {
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r3, r3
@@ -550,7 +550,7 @@ define <4 x i16> @combine_srem_sdiv(<4 x i16> %x) {
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r7, r3
@@ -781,7 +781,7 @@ define <4 x i16> @dont_fold_srem_power_of_two(<4 x i16> %x) {
; P9BE-NEXT: addis r3, r2, .LCPI3_0 at toc@ha
; P9BE-NEXT: ori r4, r4, 37253
; P9BE-NEXT: addi r3, r3, .LCPI3_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 6
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r3, r3
@@ -975,7 +975,7 @@ define <4 x i16> @dont_fold_srem_one(<4 x i16> %x) {
; P9BE-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; P9BE-NEXT: ori r4, r4, 30865
; P9BE-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r3, r3
@@ -1164,7 +1164,7 @@ define <4 x i16> @dont_fold_urem_i16_smax(<4 x i16> %x) {
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI5_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r3, r3
diff --git a/llvm/test/CodeGen/PowerPC/store_fptoi.ll b/llvm/test/CodeGen/PowerPC/store_fptoi.ll
index dc534c2af171..5015c9de0b29 100644
--- a/llvm/test/CodeGen/PowerPC/store_fptoi.ll
+++ b/llvm/test/CodeGen/PowerPC/store_fptoi.ll
@@ -167,7 +167,7 @@ define void @dpConv2sdw(double* nocapture readonly %a, i64* nocapture %b) {
;
; CHECK-PWR8-LABEL: dpConv2sdw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 0, 4
; CHECK-PWR8-NEXT: blr
@@ -191,7 +191,7 @@ define void @dpConv2sw(double* nocapture readonly %a, i32* nocapture %b) {
;
; CHECK-PWR8-LABEL: dpConv2sw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 0, 4
; CHECK-PWR8-NEXT: blr
@@ -215,7 +215,7 @@ define void @dpConv2shw(double* nocapture readonly %a, i16* nocapture %b) {
;
; CHECK-PWR8-LABEL: dpConv2shw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: sth 3, 0(4)
@@ -240,7 +240,7 @@ define void @dpConv2sb(double* nocapture readonly %a, i8* nocapture %b) {
;
; CHECK-PWR8-LABEL: dpConv2sb:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stb 3, 0(4)
@@ -265,7 +265,7 @@ define void @spConv2sdw(float* nocapture readonly %a, i64* nocapture %b) {
;
; CHECK-PWR8-LABEL: spConv2sdw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 0, 4
; CHECK-PWR8-NEXT: blr
@@ -289,7 +289,7 @@ define void @spConv2sw(float* nocapture readonly %a, i32* nocapture %b) {
;
; CHECK-PWR8-LABEL: spConv2sw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 0, 4
; CHECK-PWR8-NEXT: blr
@@ -313,7 +313,7 @@ define void @spConv2shw(float* nocapture readonly %a, i16* nocapture %b) {
;
; CHECK-PWR8-LABEL: spConv2shw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: sth 3, 0(4)
@@ -338,7 +338,7 @@ define void @spConv2sb(float* nocapture readonly %a, i8* nocapture %b) {
;
; CHECK-PWR8-LABEL: spConv2sb:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stb 3, 0(4)
@@ -364,7 +364,7 @@ define void @dpConv2sdw_x(double* nocapture readonly %a, i64* nocapture %b,
;
; CHECK-PWR8-LABEL: dpConv2sdw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 3
; CHECK-PWR8-NEXT: xscvdpsxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 4, 3
@@ -393,7 +393,7 @@ define void @dpConv2sw_x(double* nocapture readonly %a, i32* nocapture %b,
;
; CHECK-PWR8-LABEL: dpConv2sw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 2
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 4, 3
@@ -422,7 +422,7 @@ define void @dpConv2shw_x(double* nocapture readonly %a, i16* nocapture %b,
;
; CHECK-PWR8-LABEL: dpConv2shw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 5, 5, 1
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
@@ -451,7 +451,7 @@ define void @dpConv2sb_x(double* nocapture readonly %a, i8* nocapture %b,
;
; CHECK-PWR8-LABEL: dpConv2sb_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stbx 3, 4, 5
@@ -480,7 +480,7 @@ define void @spConv2sdw_x(float* nocapture readonly %a, i64* nocapture %b,
;
; CHECK-PWR8-LABEL: spConv2sdw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 3
; CHECK-PWR8-NEXT: xscvdpsxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 4, 3
@@ -509,7 +509,7 @@ define void @spConv2sw_x(float* nocapture readonly %a, i32* nocapture %b,
;
; CHECK-PWR8-LABEL: spConv2sw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 2
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 4, 3
@@ -538,7 +538,7 @@ define void @spConv2shw_x(float* nocapture readonly %a, i16* nocapture %b,
;
; CHECK-PWR8-LABEL: spConv2shw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 5, 5, 1
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
@@ -567,7 +567,7 @@ define void @spConv2sb_x(float* nocapture readonly %a, i8* nocapture %b,
;
; CHECK-PWR8-LABEL: spConv2sb_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stbx 3, 4, 5
@@ -599,7 +599,7 @@ define void @dpConv2udw(double* nocapture readonly %a, i64* nocapture %b) {
;
; CHECK-PWR8-LABEL: dpConv2udw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpuxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 0, 4
; CHECK-PWR8-NEXT: blr
@@ -623,7 +623,7 @@ define void @dpConv2uw(double* nocapture readonly %a, i32* nocapture %b) {
;
; CHECK-PWR8-LABEL: dpConv2uw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpuxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 0, 4
; CHECK-PWR8-NEXT: blr
@@ -647,7 +647,7 @@ define void @dpConv2uhw(double* nocapture readonly %a, i16* nocapture %b) {
;
; CHECK-PWR8-LABEL: dpConv2uhw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: sth 3, 0(4)
@@ -672,7 +672,7 @@ define void @dpConv2ub(double* nocapture readonly %a, i8* nocapture %b) {
;
; CHECK-PWR8-LABEL: dpConv2ub:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stb 3, 0(4)
@@ -697,7 +697,7 @@ define void @spConv2udw(float* nocapture readonly %a, i64* nocapture %b) {
;
; CHECK-PWR8-LABEL: spConv2udw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpuxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 0, 4
; CHECK-PWR8-NEXT: blr
@@ -721,7 +721,7 @@ define void @spConv2uw(float* nocapture readonly %a, i32* nocapture %b) {
;
; CHECK-PWR8-LABEL: spConv2uw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpuxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 0, 4
; CHECK-PWR8-NEXT: blr
@@ -745,7 +745,7 @@ define void @spConv2uhw(float* nocapture readonly %a, i16* nocapture %b) {
;
; CHECK-PWR8-LABEL: spConv2uhw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: sth 3, 0(4)
@@ -770,7 +770,7 @@ define void @spConv2ub(float* nocapture readonly %a, i8* nocapture %b) {
;
; CHECK-PWR8-LABEL: spConv2ub:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stb 3, 0(4)
@@ -796,7 +796,7 @@ define void @dpConv2udw_x(double* nocapture readonly %a, i64* nocapture %b,
;
; CHECK-PWR8-LABEL: dpConv2udw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 3
; CHECK-PWR8-NEXT: xscvdpuxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 4, 3
@@ -825,7 +825,7 @@ define void @dpConv2uw_x(double* nocapture readonly %a, i32* nocapture %b,
;
; CHECK-PWR8-LABEL: dpConv2uw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 2
; CHECK-PWR8-NEXT: xscvdpuxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 4, 3
@@ -854,7 +854,7 @@ define void @dpConv2uhw_x(double* nocapture readonly %a, i16* nocapture %b,
;
; CHECK-PWR8-LABEL: dpConv2uhw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 5, 5, 1
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
@@ -883,7 +883,7 @@ define void @dpConv2ub_x(double* nocapture readonly %a, i8* nocapture %b,
;
; CHECK-PWR8-LABEL: dpConv2ub_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stbx 3, 4, 5
@@ -912,7 +912,7 @@ define void @spConv2udw_x(float* nocapture readonly %a, i64* nocapture %b,
;
; CHECK-PWR8-LABEL: spConv2udw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 3
; CHECK-PWR8-NEXT: xscvdpuxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 4, 3
@@ -941,7 +941,7 @@ define void @spConv2uw_x(float* nocapture readonly %a, i32* nocapture %b,
;
; CHECK-PWR8-LABEL: spConv2uw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 2
; CHECK-PWR8-NEXT: xscvdpuxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 4, 3
@@ -970,7 +970,7 @@ define void @spConv2uhw_x(float* nocapture readonly %a, i16* nocapture %b,
;
; CHECK-PWR8-LABEL: spConv2uhw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 5, 5, 1
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
@@ -999,7 +999,7 @@ define void @spConv2ub_x(float* nocapture readonly %a, i8* nocapture %b,
;
; CHECK-PWR8-LABEL: spConv2ub_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stbx 3, 4, 5
diff --git a/llvm/test/CodeGen/PowerPC/swaps-le-6.ll b/llvm/test/CodeGen/PowerPC/swaps-le-6.ll
index e3934ed2a031..4f12a0688498 100644
--- a/llvm/test/CodeGen/PowerPC/swaps-le-6.ll
+++ b/llvm/test/CodeGen/PowerPC/swaps-le-6.ll
@@ -26,13 +26,14 @@ define void @bar0() {
; CHECK-NEXT: addis r3, r2, .LC0 at toc@ha
; CHECK-NEXT: addis r4, r2, .LC1 at toc@ha
; CHECK-NEXT: ld r3, .LC0 at toc@l(r3)
-; CHECK-NEXT: lfdx f0, 0, r3
+; CHECK-NEXT: lxvd2x vs0, 0, r3
; CHECK-NEXT: ld r3, .LC1 at toc@l(r4)
-; CHECK-NEXT: lxvd2x vs1, 0, r3
; CHECK-NEXT: xxswapd vs0, vs0
+; CHECK-NEXT: lfd f1, 0(r3)
; CHECK-NEXT: addis r3, r2, .LC2 at toc@ha
; CHECK-NEXT: ld r3, .LC2 at toc@l(r3)
-; CHECK-NEXT: xxmrgld vs0, vs0, vs1
+; CHECK-NEXT: xxmrghd vs0, vs0, vs1
+; CHECK-NEXT: xxswapd vs0, vs0
; CHECK-NEXT: stxvd2x vs0, 0, r3
; CHECK-NEXT: blr
;
@@ -40,14 +41,14 @@ define void @bar0() {
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LC0 at toc@ha
; CHECK-P9-NEXT: ld r3, .LC0 at toc@l(r3)
-; CHECK-P9-NEXT: lxvx vs0, 0, r3
+; CHECK-P9-NEXT: lxv vs0, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LC1 at toc@ha
; CHECK-P9-NEXT: ld r3, .LC1 at toc@l(r3)
; CHECK-P9-NEXT: lfd f1, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LC2 at toc@ha
; CHECK-P9-NEXT: ld r3, .LC2 at toc@l(r3)
; CHECK-P9-NEXT: xxmrghd vs0, vs0, vs1
-; CHECK-P9-NEXT: stxvx vs0, 0, r3
+; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P9-NOVECTOR-LABEL: bar0:
@@ -57,11 +58,12 @@ define void @bar0() {
; CHECK-P9-NOVECTOR-NEXT: lxvd2x vs0, 0, r3
; CHECK-P9-NOVECTOR-NEXT: addis r3, r2, .LC1 at toc@ha
; CHECK-P9-NOVECTOR-NEXT: ld r3, .LC1 at toc@l(r3)
-; CHECK-P9-NOVECTOR-NEXT: lfdx f1, 0, r3
+; CHECK-P9-NOVECTOR-NEXT: xxswapd vs0, vs0
+; CHECK-P9-NOVECTOR-NEXT: lfd f1, 0(r3)
; CHECK-P9-NOVECTOR-NEXT: addis r3, r2, .LC2 at toc@ha
; CHECK-P9-NOVECTOR-NEXT: ld r3, .LC2 at toc@l(r3)
-; CHECK-P9-NOVECTOR-NEXT: xxswapd vs1, vs1
-; CHECK-P9-NOVECTOR-NEXT: xxmrgld vs0, vs1, vs0
+; CHECK-P9-NOVECTOR-NEXT: xxmrghd vs0, vs0, vs1
+; CHECK-P9-NOVECTOR-NEXT: xxswapd vs0, vs0
; CHECK-P9-NOVECTOR-NEXT: stxvd2x vs0, 0, r3
; CHECK-P9-NOVECTOR-NEXT: blr
entry:
@@ -78,13 +80,14 @@ define void @bar1() {
; CHECK-NEXT: addis r3, r2, .LC0 at toc@ha
; CHECK-NEXT: addis r4, r2, .LC1 at toc@ha
; CHECK-NEXT: ld r3, .LC0 at toc@l(r3)
-; CHECK-NEXT: lfdx f0, 0, r3
+; CHECK-NEXT: lxvd2x vs0, 0, r3
; CHECK-NEXT: ld r3, .LC1 at toc@l(r4)
-; CHECK-NEXT: lxvd2x vs1, 0, r3
; CHECK-NEXT: xxswapd vs0, vs0
+; CHECK-NEXT: lfd f1, 0(r3)
; CHECK-NEXT: addis r3, r2, .LC2 at toc@ha
; CHECK-NEXT: ld r3, .LC2 at toc@l(r3)
; CHECK-NEXT: xxpermdi vs0, vs1, vs0, 1
+; CHECK-NEXT: xxswapd vs0, vs0
; CHECK-NEXT: stxvd2x vs0, 0, r3
; CHECK-NEXT: blr
;
@@ -92,14 +95,14 @@ define void @bar1() {
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LC0 at toc@ha
; CHECK-P9-NEXT: ld r3, .LC0 at toc@l(r3)
-; CHECK-P9-NEXT: lxvx vs0, 0, r3
+; CHECK-P9-NEXT: lxv vs0, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LC1 at toc@ha
; CHECK-P9-NEXT: ld r3, .LC1 at toc@l(r3)
; CHECK-P9-NEXT: lfd f1, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LC2 at toc@ha
; CHECK-P9-NEXT: ld r3, .LC2 at toc@l(r3)
; CHECK-P9-NEXT: xxpermdi vs0, vs1, vs0, 1
-; CHECK-P9-NEXT: stxvx vs0, 0, r3
+; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P9-NOVECTOR-LABEL: bar1:
@@ -109,11 +112,12 @@ define void @bar1() {
; CHECK-P9-NOVECTOR-NEXT: lxvd2x vs0, 0, r3
; CHECK-P9-NOVECTOR-NEXT: addis r3, r2, .LC1 at toc@ha
; CHECK-P9-NOVECTOR-NEXT: ld r3, .LC1 at toc@l(r3)
-; CHECK-P9-NOVECTOR-NEXT: lfdx f1, 0, r3
+; CHECK-P9-NOVECTOR-NEXT: xxswapd vs0, vs0
+; CHECK-P9-NOVECTOR-NEXT: lfd f1, 0(r3)
; CHECK-P9-NOVECTOR-NEXT: addis r3, r2, .LC2 at toc@ha
; CHECK-P9-NOVECTOR-NEXT: ld r3, .LC2 at toc@l(r3)
-; CHECK-P9-NOVECTOR-NEXT: xxswapd vs1, vs1
-; CHECK-P9-NOVECTOR-NEXT: xxpermdi vs0, vs0, vs1, 1
+; CHECK-P9-NOVECTOR-NEXT: xxpermdi vs0, vs1, vs0, 1
+; CHECK-P9-NOVECTOR-NEXT: xxswapd vs0, vs0
; CHECK-P9-NOVECTOR-NEXT: stxvd2x vs0, 0, r3
; CHECK-P9-NOVECTOR-NEXT: blr
entry:
diff --git a/llvm/test/CodeGen/PowerPC/tailcall-speculatable-callee.ll b/llvm/test/CodeGen/PowerPC/tailcall-speculatable-callee.ll
index 64709d0c9d1f..b2a488a16b30 100644
--- a/llvm/test/CodeGen/PowerPC/tailcall-speculatable-callee.ll
+++ b/llvm/test/CodeGen/PowerPC/tailcall-speculatable-callee.ll
@@ -23,7 +23,7 @@ define dso_local void @speculatable_callee_non_return_use_only (double* nocaptur
; CHECK-NEXT: stdu r1, -48(r1)
; CHECK-NEXT: mr r30, r3
; CHECK-NEXT: bl callee
-; CHECK-NEXT: stfdx f1, 0, r30
+; CHECK-NEXT: stfd f1, 0(r30)
; CHECK-NEXT: addi r1, r1, 48
; CHECK-NEXT: ld r0, 16(r1)
; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
@@ -45,7 +45,7 @@ define dso_local double @speculatable_callee_multi_use (double* nocapture %res,
; CHECK-NEXT: stdu r1, -48(r1)
; CHECK-NEXT: mr r30, r3
; CHECK-NEXT: bl callee
- ; CHECK-NEXT: stfdx f1, 0, r30
+ ; CHECK-NEXT: stfd f1, 0(r30)
; CHECK-NEXT: addi r1, r1, 48
; CHECK-NEXT: ld r0, 16(r1)
; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
diff --git a/llvm/test/CodeGen/PowerPC/toc-float.ll b/llvm/test/CodeGen/PowerPC/toc-float.ll
index a9b12647b3b6..30f3ac030575 100644
--- a/llvm/test/CodeGen/PowerPC/toc-float.ll
+++ b/llvm/test/CodeGen/PowerPC/toc-float.ll
@@ -50,11 +50,10 @@ define float @floatConstantArray() local_unnamed_addr {
;
; CHECK-P8-LABEL: floatConstantArray:
; CHECK-P8: # %bb.0:
-; CHECK-P8-NEXT: addis 3, 2, FArr at toc@ha
+; CHECK-P8-NEXT: addis 3, 2, FArr at toc@ha+12
; CHECK-P8-NEXT: addis 4, 2, .LCPI2_0 at toc@ha
-; CHECK-P8-NEXT: addi 3, 3, FArr at toc@l
+; CHECK-P8-NEXT: lfs 0, FArr at toc@l+12(3)
; CHECK-P8-NEXT: lfs 1, .LCPI2_0 at toc@l(4)
-; CHECK-P8-NEXT: lfs 0, 12(3)
; CHECK-P8-NEXT: xsaddsp 1, 0, 1
; CHECK-P8-NEXT: blr
%1 = load float, float* getelementptr inbounds ([10 x float], [10 x float]* @FArr, i64 0, i64 3), align 4
@@ -93,11 +92,10 @@ define double @doubleConstantArray() {
;
; CHECK-P8-LABEL: doubleConstantArray:
; CHECK-P8: # %bb.0:
-; CHECK-P8-NEXT: addis 3, 2, d at toc@ha
+; CHECK-P8-NEXT: addis 3, 2, d at toc@ha+24
; CHECK-P8-NEXT: addis 4, 2, .LCPI4_0 at toc@ha
-; CHECK-P8-NEXT: addi 3, 3, d at toc@l
+; CHECK-P8-NEXT: lfd 0, d at toc@l+24(3)
; CHECK-P8-NEXT: lfd 1, .LCPI4_0 at toc@l(4)
-; CHECK-P8-NEXT: lfd 0, 24(3)
; CHECK-P8-NEXT: xsadddp 1, 0, 1
; CHECK-P8-NEXT: blr
%1 = load double, double* getelementptr inbounds ([200 x double], [200 x double]* @d, i64 0, i64 3), align 8
@@ -128,8 +126,8 @@ define double @doubleLargeConstantArray() {
; CHECK-P8-NEXT: addis 5, 2, .LCPI5_0 at toc@ha
; CHECK-P8-NEXT: addi 3, 3, arr at toc@l
; CHECK-P8-NEXT: ori 4, 4, 32768
-; CHECK-P8-NEXT: lfdx 0, 3, 4
; CHECK-P8-NEXT: lfd 1, .LCPI5_0 at toc@l(5)
+; CHECK-P8-NEXT: lfdx 0, 3, 4
; CHECK-P8-NEXT: xsadddp 1, 0, 1
; CHECK-P8-NEXT: blr
%1 = load double, double* getelementptr inbounds ([20000 x double], [20000 x double]* @arr, i64 0, i64 4096), align 8
diff --git a/llvm/test/CodeGen/PowerPC/unaligned-addressing-mode.ll b/llvm/test/CodeGen/PowerPC/unaligned-addressing-mode.ll
index 1b91fe9d917a..02039a604dff 100644
--- a/llvm/test/CodeGen/PowerPC/unaligned-addressing-mode.ll
+++ b/llvm/test/CodeGen/PowerPC/unaligned-addressing-mode.ll
@@ -55,10 +55,10 @@ entry:
define void @test_xoaddr(i32* %arr, i32* %arrTo) {
; CHECK-LABEL: test_xoaddr:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 8
-; CHECK-NEXT: addi r4, r4, 4
-; CHECK-NEXT: lxvx vs0, 0, r3
-; CHECK-NEXT: stxvx vs0, 0, r4
+; CHECK-NEXT: li r5, 8
+; CHECK-NEXT: lxvx vs0, r3, r5
+; CHECK-NEXT: li r3, 4
+; CHECK-NEXT: stxvx vs0, r4, r3
; CHECK-NEXT: blr
entry:
%arrayidx = getelementptr inbounds i32, i32* %arrTo, i64 1
diff --git a/llvm/test/CodeGen/PowerPC/unaligned.ll b/llvm/test/CodeGen/PowerPC/unaligned.ll
index b3e52d158ded..931cbdeae695 100644
--- a/llvm/test/CodeGen/PowerPC/unaligned.ll
+++ b/llvm/test/CodeGen/PowerPC/unaligned.ll
@@ -92,8 +92,8 @@ define void @foo5(double* %p, double* %r) nounwind {
;
; CHECK-VSX-LABEL: foo5:
; CHECK-VSX: # %bb.0: # %entry
-; CHECK-VSX-NEXT: lfdx 0, 0, 3
-; CHECK-VSX-NEXT: stfdx 0, 0, 4
+; CHECK-VSX-NEXT: lfd 0, 0(3)
+; CHECK-VSX-NEXT: stfd 0, 0(4)
; CHECK-VSX-NEXT: blr
entry:
%v = load double, double* %p, align 1
diff --git a/llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll b/llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
index 389e52680732..d94101e6b8ca 100644
--- a/llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
+++ b/llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
@@ -86,7 +86,7 @@ define <4 x i16> @fold_urem_vec_1(<4 x i16> %x) {
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI0_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: clrlwi r4, r3, 16
@@ -299,7 +299,7 @@ define <4 x i16> @fold_urem_vec_2(<4 x i16> %x) {
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: clrlwi r3, r3, 16
@@ -526,7 +526,7 @@ define <4 x i16> @combine_urem_udiv(<4 x i16> %x) {
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: clrlwi r7, r3, 16
@@ -737,7 +737,7 @@ define <4 x i16> @dont_fold_urem_power_of_two(<4 x i16> %x) {
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI3_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI3_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 6
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: clrlwi r3, r3, 16
@@ -891,7 +891,7 @@ define <4 x i16> @dont_fold_urem_one(<4 x i16> %x) {
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: clrlwi r4, r3, 16
diff --git a/llvm/test/CodeGen/PowerPC/vavg.ll b/llvm/test/CodeGen/PowerPC/vavg.ll
index 6a1ba7b95399..57587b6edb34 100644
--- a/llvm/test/CodeGen/PowerPC/vavg.ll
+++ b/llvm/test/CodeGen/PowerPC/vavg.ll
@@ -140,7 +140,7 @@ define <8 x i16> @test_v8i16_sign_negative(<8 x i16> %m, <8 x i16> %n) {
; CHECK-P9-NEXT: addis 3, 2, .LCPI6_0 at toc@ha
; CHECK-P9-NEXT: vadduhm 2, 2, 3
; CHECK-P9-NEXT: addi 3, 3, .LCPI6_0 at toc@l
-; CHECK-P9-NEXT: lxvx 35, 0, 3
+; CHECK-P9-NEXT: lxv 35, 0(3)
; CHECK-P9-NEXT: vadduhm 2, 2, 3
; CHECK-P9-NEXT: vspltish 3, 1
; CHECK-P9-NEXT: vsrah 2, 2, 3
diff --git a/llvm/test/CodeGen/PowerPC/vec-itofp.ll b/llvm/test/CodeGen/PowerPC/vec-itofp.ll
index eb41177600d9..b8544cb8aaf1 100644
--- a/llvm/test/CodeGen/PowerPC/vec-itofp.ll
+++ b/llvm/test/CodeGen/PowerPC/vec-itofp.ll
@@ -53,24 +53,24 @@ define void @test8(<8 x double>* nocapture %Sink, <8 x i16>* nocapture readonly
; CHECK-P9-NEXT: addis r4, r2, .LCPI0_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI0_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI0_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI0_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI0_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI0_2 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI0_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI0_3 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxddp vs3, v2
@@ -83,24 +83,24 @@ define void @test8(<8 x double>* nocapture %Sink, <8 x i16>* nocapture readonly
; CHECK-BE-NEXT: addis r4, r2, .LCPI0_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI0_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI0_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI0_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI0_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI0_2 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI0_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI0_3 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxddp vs3, v2
@@ -141,12 +141,12 @@ define void @test4(<4 x double>* nocapture %Sink, <4 x i16>* nocapture readonly
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v2
@@ -159,12 +159,12 @@ define void @test4(<4 x double>* nocapture %Sink, <4 x i16>* nocapture readonly
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v2
@@ -197,7 +197,7 @@ define void @test2(<2 x double>* nocapture %Sink, <2 x i16>* nocapture readonly
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v2
; CHECK-P9-NEXT: stxv vs0, 0(r3)
@@ -209,7 +209,7 @@ define void @test2(<2 x double>* nocapture %Sink, <2 x i16>* nocapture readonly
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v2
; CHECK-BE-NEXT: stxv vs0, 0(r3)
@@ -275,27 +275,27 @@ define void @stest8(<8 x double>* nocapture %Sink, <8 x i16>* nocapture readonly
; CHECK-P9-NEXT: lxv v2, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_2 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_3 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: vextsh2d v2, v2
@@ -309,27 +309,27 @@ define void @stest8(<8 x double>* nocapture %Sink, <8 x i16>* nocapture readonly
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_2 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_3 at toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs1, 48(r3)
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs2, 0(r3)
; CHECK-BE-NEXT: vextsh2d v2, v2
@@ -377,13 +377,13 @@ define void @stest4(<4 x double>* nocapture %Sink, <4 x i16>* nocapture readonly
; CHECK-P9-NEXT: lxv v2, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI4_0 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI4_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI4_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI4_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsh2d v2, v2
@@ -397,13 +397,13 @@ define void @stest4(<4 x double>* nocapture %Sink, <4 x i16>* nocapture readonly
; CHECK-BE-NEXT: addis r4, r2, .LCPI4_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v3, v3, v3
; CHECK-BE-NEXT: addi r4, r4, .LCPI4_0 at toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI4_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI4_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v3, v2, v4
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsh2d v2, v2
@@ -441,7 +441,7 @@ define void @stest2(<2 x double>* nocapture %Sink, <2 x i16>* nocapture readonly
; CHECK-P9-NEXT: lxv v2, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_0 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v2, v2
; CHECK-P9-NEXT: xvcvsxddp vs0, v2
@@ -453,7 +453,7 @@ define void @stest2(<2 x double>* nocapture %Sink, <2 x i16>* nocapture readonly
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI5_0 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI5_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: xvcvsxddp vs0, v2
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
index c809382f305c..71a9484000a5 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
@@ -53,7 +53,7 @@ define i32 @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-BE-NEXT: xscvspdpn f1, vs0
; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
@@ -134,7 +134,7 @@ define i64 @test4elt(<4 x float> %a) local_unnamed_addr #1 {
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0 at toc@l
; CHECK-BE-NEXT: xscvspdpn f0, vs0
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
@@ -273,7 +273,7 @@ define <8 x i16> @test8elt(<8 x float>* nocapture readonly) local_unnamed_addr #
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvdpsxws f2, f2
@@ -537,7 +537,7 @@ define void @test16elt(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.resul
; CHECK-BE-NEXT: lxv vs1, 0(r4)
; CHECK-BE-NEXT: lxv vs0, 48(r4)
; CHECK-BE-NEXT: addi r5, r5, .LCPI3_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r5
+; CHECK-BE-NEXT: lxv v2, 0(r5)
; CHECK-BE-NEXT: xxsldwi vs3, vs2, vs2, 3
; CHECK-BE-NEXT: xxswapd vs4, vs2
; CHECK-BE-NEXT: xscvspdpn f5, vs2
@@ -683,7 +683,7 @@ define i32 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-BE-NEXT: xscvspdpn f1, vs0
; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
@@ -764,7 +764,7 @@ define i64 @test4elt_signed(<4 x float> %a) local_unnamed_addr #1 {
; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0 at toc@l
; CHECK-BE-NEXT: xscvspdpn f0, vs0
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
@@ -903,7 +903,7 @@ define <8 x i16> @test8elt_signed(<8 x float>* nocapture readonly) local_unnamed
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvdpsxws f2, f2
@@ -1167,7 +1167,7 @@ define void @test16elt_signed(<16 x i16>* noalias nocapture sret(<16 x i16>) %ag
; CHECK-BE-NEXT: lxv vs1, 0(r4)
; CHECK-BE-NEXT: lxv vs0, 48(r4)
; CHECK-BE-NEXT: addi r5, r5, .LCPI7_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r5
+; CHECK-BE-NEXT: lxv v2, 0(r5)
; CHECK-BE-NEXT: xxsldwi vs3, vs2, vs2, 3
; CHECK-BE-NEXT: xxswapd vs4, vs2
; CHECK-BE-NEXT: xscvspdpn f5, vs2
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
index 8786f5770847..ef6f01116925 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
@@ -58,7 +58,7 @@ define i16 @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-BE-NEXT: xscvspdpn f1, vs0
; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
@@ -142,7 +142,7 @@ define i32 @test4elt(<4 x float> %a) local_unnamed_addr #1 {
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0 at toc@l
; CHECK-BE-NEXT: xscvspdpn f0, vs0
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
@@ -285,7 +285,7 @@ define i64 @test8elt(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvdpsxws f2, f2
@@ -550,7 +550,7 @@ define <16 x i8> @test16elt(<16 x float>* nocapture readonly) local_unnamed_addr
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI3_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI3_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
; CHECK-BE-NEXT: xscvspdpn f4, vs4
; CHECK-BE-NEXT: xscvdpsxws f4, f4
@@ -698,7 +698,7 @@ define i16 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-BE-NEXT: xscvspdpn f1, vs0
; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
@@ -782,7 +782,7 @@ define i32 @test4elt_signed(<4 x float> %a) local_unnamed_addr #1 {
; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0 at toc@l
; CHECK-BE-NEXT: xscvspdpn f0, vs0
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
@@ -925,7 +925,7 @@ define i64 @test8elt_signed(<8 x float>* nocapture readonly) local_unnamed_addr
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvdpsxws f2, f2
@@ -1190,7 +1190,7 @@ define <16 x i8> @test16elt_signed(<16 x float>* nocapture readonly) local_unnam
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI7_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI7_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
; CHECK-BE-NEXT: xscvspdpn f4, vs4
; CHECK-BE-NEXT: xscvdpsxws f4, f4
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
index 2786c2fbe7d8..93ba5b84dc7f 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
@@ -43,7 +43,7 @@ define i32 @test2elt(<2 x double> %a) local_unnamed_addr #0 {
; CHECK-BE-NEXT: xscvdpsxws f0, v2
; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: mtvsrwz v4, r3
@@ -117,7 +117,7 @@ define i64 @test4elt(<4 x double>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f2, f1
; CHECK-BE-NEXT: xxswapd vs1, vs1
; CHECK-BE-NEXT: xscvdpsxws f1, f1
@@ -242,7 +242,7 @@ define <8 x i16> @test8elt(<8 x double>* nocapture readonly) local_unnamed_addr
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xxswapd vs3, vs3
; CHECK-BE-NEXT: xscvdpsxws f3, f3
@@ -469,7 +469,7 @@ define void @test16elt(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.resul
; CHECK-BE-NEXT: lxv vs0, 0(r4)
; CHECK-BE-NEXT: addis r5, r2, .LCPI3_0 at toc@ha
; CHECK-BE-NEXT: addi r5, r5, .LCPI3_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r5
+; CHECK-BE-NEXT: lxv v2, 0(r5)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xscvdpsxws f5, f2
; CHECK-BE-NEXT: xscvdpsxws f6, f1
@@ -588,7 +588,7 @@ define i32 @test2elt_signed(<2 x double> %a) local_unnamed_addr #0 {
; CHECK-BE-NEXT: xscvdpsxws f0, v2
; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: mtvsrwz v4, r3
@@ -662,7 +662,7 @@ define i64 @test4elt_signed(<4 x double>* nocapture readonly) local_unnamed_addr
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f2, f1
; CHECK-BE-NEXT: xxswapd vs1, vs1
; CHECK-BE-NEXT: xscvdpsxws f1, f1
@@ -787,7 +787,7 @@ define <8 x i16> @test8elt_signed(<8 x double>* nocapture readonly) local_unname
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xxswapd vs3, vs3
; CHECK-BE-NEXT: xscvdpsxws f3, f3
@@ -1014,7 +1014,7 @@ define void @test16elt_signed(<16 x i16>* noalias nocapture sret(<16 x i16>) %ag
; CHECK-BE-NEXT: lxv vs0, 0(r4)
; CHECK-BE-NEXT: addis r5, r2, .LCPI7_0 at toc@ha
; CHECK-BE-NEXT: addi r5, r5, .LCPI7_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r5
+; CHECK-BE-NEXT: lxv v2, 0(r5)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xscvdpsxws f5, f2
; CHECK-BE-NEXT: xscvdpsxws f6, f1
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
index da07d1bce1c2..c43e93f7917e 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
@@ -48,7 +48,7 @@ define i16 @test2elt(<2 x double> %a) local_unnamed_addr #0 {
; CHECK-BE-NEXT: xscvdpsxws f0, v2
; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: mtvsrwz v4, r3
@@ -125,7 +125,7 @@ define i32 @test4elt(<4 x double>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f2, f1
; CHECK-BE-NEXT: xxswapd vs1, vs1
; CHECK-BE-NEXT: xscvdpsxws f1, f1
@@ -254,7 +254,7 @@ define i64 @test8elt(<8 x double>* nocapture readonly) local_unnamed_addr #1 {
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xxswapd vs3, vs3
; CHECK-BE-NEXT: xscvdpsxws f3, f3
@@ -487,7 +487,7 @@ define <16 x i8> @test16elt(<16 x double>* nocapture readonly) local_unnamed_add
; CHECK-BE-NEXT: lxv vs6, 96(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI3_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI3_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f7, f7
; CHECK-BE-NEXT: mffprwz r3, f8
; CHECK-BE-NEXT: mtvsrwz v3, r3
@@ -603,7 +603,7 @@ define i16 @test2elt_signed(<2 x double> %a) local_unnamed_addr #0 {
; CHECK-BE-NEXT: xscvdpsxws f0, v2
; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: mtvsrwz v4, r3
@@ -680,7 +680,7 @@ define i32 @test4elt_signed(<4 x double>* nocapture readonly) local_unnamed_addr
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f2, f1
; CHECK-BE-NEXT: xxswapd vs1, vs1
; CHECK-BE-NEXT: xscvdpsxws f1, f1
@@ -809,7 +809,7 @@ define i64 @test8elt_signed(<8 x double>* nocapture readonly) local_unnamed_addr
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xxswapd vs3, vs3
; CHECK-BE-NEXT: xscvdpsxws f3, f3
@@ -1042,7 +1042,7 @@ define <16 x i8> @test16elt_signed(<16 x double>* nocapture readonly) local_unna
; CHECK-BE-NEXT: lxv vs6, 96(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI7_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI7_0 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f7, f7
; CHECK-BE-NEXT: mffprwz r3, f8
; CHECK-BE-NEXT: mtvsrwz v3, r3
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
index 8f68b94076a6..844f4a506dc1 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
@@ -84,7 +84,7 @@ define <4 x float> @test4elt(i64 %a.coerce) local_unnamed_addr #1 {
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxwsp v2, v2
; CHECK-BE-NEXT: blr
@@ -170,12 +170,12 @@ define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.r
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v5, v5, v5
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0 at toc@l
-; CHECK-P9-NEXT: lxvx v4, 0, r4
+; CHECK-P9-NEXT: lxv v4, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1 at toc@l
; CHECK-P9-NEXT: vperm v0, v5, v3, v4
; CHECK-P9-NEXT: xvcvuxwsp vs0, v0
-; CHECK-P9-NEXT: lxvx v0, 0, r4
+; CHECK-P9-NEXT: lxv v0, 0(r4)
; CHECK-P9-NEXT: vperm v3, v5, v3, v0
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxwsp vs1, v3
@@ -195,7 +195,7 @@ define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.r
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v5, v5, v5
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0 at toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: vperm v0, v5, v3, v4
; CHECK-BE-NEXT: vperm v4, v5, v2, v4
; CHECK-BE-NEXT: vmrglh v3, v5, v3
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
index c4fdb613d05a..594ed990711a 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
@@ -27,7 +27,7 @@ define <2 x double> @test2elt(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-P9-NEXT: addis r3, r2, .LCPI0_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp v2, v2
; CHECK-P9-NEXT: blr
@@ -38,7 +38,7 @@ define <2 x double> @test2elt(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp v2, v2
; CHECK-BE-NEXT: blr
@@ -76,12 +76,12 @@ define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.re
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v2
@@ -94,12 +94,12 @@ define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.re
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v2
@@ -154,24 +154,24 @@ define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.re
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_2 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_3 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxddp vs3, v2
@@ -183,24 +183,24 @@ define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.re
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_2 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_3 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxddp vs3, v2
@@ -278,24 +278,24 @@ define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v5, v5, v5
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0 at toc@l
-; CHECK-P9-NEXT: lxvx v4, 0, r4
+; CHECK-P9-NEXT: lxv v4, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1 at toc@l
; CHECK-P9-NEXT: vperm v0, v5, v3, v4
; CHECK-P9-NEXT: xvcvuxddp vs0, v0
-; CHECK-P9-NEXT: lxvx v0, 0, r4
+; CHECK-P9-NEXT: lxv v0, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_2 at toc@l
; CHECK-P9-NEXT: vperm v1, v5, v3, v0
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v1
-; CHECK-P9-NEXT: lxvx v1, 0, r4
+; CHECK-P9-NEXT: lxv v1, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_3 at toc@l
; CHECK-P9-NEXT: vperm v6, v5, v3, v1
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxddp vs2, v6
-; CHECK-P9-NEXT: lxvx v6, 0, r4
+; CHECK-P9-NEXT: lxv v6, 0(r4)
; CHECK-P9-NEXT: vperm v3, v5, v3, v6
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxddp vs3, v3
@@ -321,24 +321,24 @@ define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v5, v5, v5
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0 at toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_1 at toc@l
; CHECK-BE-NEXT: vperm v0, v5, v3, v4
; CHECK-BE-NEXT: xvcvuxddp vs0, v0
-; CHECK-BE-NEXT: lxvx v0, 0, r4
+; CHECK-BE-NEXT: lxv v0, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_2 at toc@l
; CHECK-BE-NEXT: vperm v1, v5, v3, v0
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v1
-; CHECK-BE-NEXT: lxvx v1, 0, r4
+; CHECK-BE-NEXT: lxv v1, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_3 at toc@l
; CHECK-BE-NEXT: vperm v6, v5, v3, v1
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxddp vs2, v6
-; CHECK-BE-NEXT: lxvx v6, 0, r4
+; CHECK-BE-NEXT: lxv v6, 0(r4)
; CHECK-BE-NEXT: vperm v3, v5, v3, v6
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxddp vs3, v3
@@ -385,7 +385,7 @@ define <2 x double> @test2elt_signed(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-P9-NEXT: mtvsrwz v2, r3
; CHECK-P9-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v2, v2
; CHECK-P9-NEXT: xvcvsxddp v2, v2
@@ -396,7 +396,7 @@ define <2 x double> @test2elt_signed(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-BE-NEXT: mtvsrwz v2, r3
; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: xvcvsxddp v2, v2
@@ -441,13 +441,13 @@ define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>)
; CHECK-P9-NEXT: mtvsrd v2, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_0 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsh2d v2, v2
@@ -461,13 +461,13 @@ define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>)
; CHECK-BE-NEXT: addis r4, r2, .LCPI5_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v3, v3, v3
; CHECK-BE-NEXT: addi r4, r4, .LCPI5_0 at toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI5_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI5_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v3, v2, v4
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsh2d v2, v2
@@ -533,27 +533,27 @@ define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>)
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_0 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_2 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_3 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: vextsh2d v2, v2
@@ -566,27 +566,27 @@ define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_2 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_3 at toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs1, 48(r3)
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs2, 0(r3)
; CHECK-BE-NEXT: vextsh2d v2, v2
@@ -682,20 +682,20 @@ define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double
; CHECK-P9-NEXT: addis r5, r2, .LCPI7_0 at toc@ha
; CHECK-P9-NEXT: lxv v2, 0(r4)
; CHECK-P9-NEXT: addi r5, r5, .LCPI7_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r5
+; CHECK-P9-NEXT: lxv v3, 0(r5)
; CHECK-P9-NEXT: addis r5, r2, .LCPI7_1 at toc@ha
; CHECK-P9-NEXT: addi r5, r5, .LCPI7_1 at toc@l
-; CHECK-P9-NEXT: lxvx v5, 0, r5
+; CHECK-P9-NEXT: lxv v5, 0(r5)
; CHECK-P9-NEXT: addis r5, r2, .LCPI7_2 at toc@ha
; CHECK-P9-NEXT: vperm v4, v2, v2, v3
; CHECK-P9-NEXT: addi r5, r5, .LCPI7_2 at toc@l
; CHECK-P9-NEXT: vextsh2d v4, v4
-; CHECK-P9-NEXT: lxvx v0, 0, r5
+; CHECK-P9-NEXT: lxv v0, 0(r5)
; CHECK-P9-NEXT: addis r5, r2, .LCPI7_3 at toc@ha
; CHECK-P9-NEXT: xvcvsxddp vs0, v4
; CHECK-P9-NEXT: vperm v4, v2, v2, v5
; CHECK-P9-NEXT: addi r5, r5, .LCPI7_3 at toc@l
-; CHECK-P9-NEXT: lxvx v1, 0, r5
+; CHECK-P9-NEXT: lxv v1, 0(r5)
; CHECK-P9-NEXT: vextsh2d v4, v4
; CHECK-P9-NEXT: xvcvsxddp vs1, v4
; CHECK-P9-NEXT: vperm v4, v2, v2, v0
@@ -736,10 +736,10 @@ define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_2 at toc@ha
; CHECK-BE-NEXT: addi r5, r5, .LCPI7_0 at toc@l
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_2 at toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r5
+; CHECK-BE-NEXT: lxv v2, 0(r5)
; CHECK-BE-NEXT: addis r5, r2, .LCPI7_1 at toc@ha
; CHECK-BE-NEXT: addi r5, r5, .LCPI7_1 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r5
+; CHECK-BE-NEXT: lxv v3, 0(r5)
; CHECK-BE-NEXT: vperm v0, v5, v4, v2
; CHECK-BE-NEXT: vperm v2, v5, v1, v2
; CHECK-BE-NEXT: vextsh2d v2, v2
@@ -751,7 +751,7 @@ define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: vextsh2d v0, v0
; CHECK-BE-NEXT: xvcvsxddp vs3, v2
-; CHECK-BE-NEXT: lxvx v2, 0, r4
+; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_3 at toc@ha
; CHECK-BE-NEXT: xvcvsxddp vs1, v0
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_3 at toc@l
@@ -764,7 +764,7 @@ define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: xvcvsxddp vs4, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: xvcvsxddp vs6, v2
; CHECK-BE-NEXT: vperm v4, v4, v4, v3
; CHECK-BE-NEXT: vperm v2, v1, v1, v3
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
index 792565007b57..9493e571a8cc 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
@@ -79,7 +79,7 @@ define <4 x float> @test4elt(i32 %a.coerce) local_unnamed_addr #1 {
; CHECK-P9-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxwsp v2, v2
; CHECK-P9-NEXT: blr
@@ -90,7 +90,7 @@ define <4 x float> @test4elt(i32 %a.coerce) local_unnamed_addr #1 {
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxwsp v2, v2
; CHECK-BE-NEXT: blr
@@ -126,12 +126,12 @@ define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.resu
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxwsp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxwsp vs1, v2
@@ -144,12 +144,12 @@ define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.resu
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxwsp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxwsp vs1, v2
@@ -200,24 +200,24 @@ define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.r
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxwsp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_2 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxwsp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_3 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxwsp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxwsp vs3, v2
@@ -229,24 +229,24 @@ define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.r
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxwsp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_2 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxwsp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_3 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxwsp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxwsp vs3, v2
@@ -334,7 +334,7 @@ define <4 x float> @test4elt_signed(i32 %a.coerce) local_unnamed_addr #1 {
; CHECK-P9-NEXT: mtvsrwz v2, r3
; CHECK-P9-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI5_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: vextsb2w v2, v2
; CHECK-P9-NEXT: xvcvsxwsp v2, v2
@@ -345,7 +345,7 @@ define <4 x float> @test4elt_signed(i32 %a.coerce) local_unnamed_addr #1 {
; CHECK-BE-NEXT: mtvsrwz v2, r3
; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: vextsb2w v2, v2
; CHECK-BE-NEXT: xvcvsxwsp v2, v2
@@ -386,13 +386,13 @@ define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %a
; CHECK-P9-NEXT: mtvsrd v2, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_0 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsb2w v3, v3
; CHECK-P9-NEXT: xvcvsxwsp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsb2w v2, v2
@@ -406,13 +406,13 @@ define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %a
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v3, v3, v3
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_0 at toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v3, v2, v4
; CHECK-BE-NEXT: vextsb2w v3, v3
; CHECK-BE-NEXT: xvcvsxwsp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsb2w v2, v2
@@ -472,27 +472,27 @@ define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>)
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_0 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsb2w v3, v3
; CHECK-P9-NEXT: xvcvsxwsp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_2 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsb2w v3, v3
; CHECK-P9-NEXT: xvcvsxwsp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_3 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: vextsb2w v3, v3
; CHECK-P9-NEXT: xvcvsxwsp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: vextsb2w v2, v2
@@ -505,27 +505,27 @@ define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: vextsb2w v3, v3
; CHECK-BE-NEXT: xvcvsxwsp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_2 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsb2w v3, v3
; CHECK-BE-NEXT: xvcvsxwsp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_3 at toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs1, 48(r3)
; CHECK-BE-NEXT: vextsb2w v3, v3
; CHECK-BE-NEXT: xvcvsxwsp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs2, 0(r3)
; CHECK-BE-NEXT: vextsb2w v2, v2
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
index 60cb5877f2b8..fdf42d2580c0 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
@@ -27,7 +27,7 @@ define <2 x double> @test2elt(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-P9-NEXT: addis r3, r2, .LCPI0_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp v2, v2
; CHECK-P9-NEXT: blr
@@ -38,7 +38,7 @@ define <2 x double> @test2elt(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp v2, v2
; CHECK-BE-NEXT: blr
@@ -76,12 +76,12 @@ define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.re
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v2
@@ -94,12 +94,12 @@ define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.re
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v2
@@ -156,24 +156,24 @@ define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.re
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_2 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_3 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxddp vs3, v2
@@ -186,24 +186,24 @@ define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.re
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_2 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_3 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxddp vs3, v2
@@ -290,48 +290,48 @@ define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0 at toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_2 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_3 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_4 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_4 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxddp vs3, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_5 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_5 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs3, 48(r3)
; CHECK-P9-NEXT: xvcvuxddp vs4, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_6 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_6 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs4, 64(r3)
; CHECK-P9-NEXT: xvcvuxddp vs5, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_7 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_7 at toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs5, 80(r3)
; CHECK-P9-NEXT: xvcvuxddp vs6, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs6, 96(r3)
; CHECK-P9-NEXT: xvcvuxddp vs7, v2
@@ -343,48 +343,48 @@ define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_2 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_3 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_4 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_4 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxddp vs3, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_5 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_5 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs3, 48(r3)
; CHECK-BE-NEXT: xvcvuxddp vs4, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_6 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_6 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs4, 64(r3)
; CHECK-BE-NEXT: xvcvuxddp vs5, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_7 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_7 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs5, 80(r3)
; CHECK-BE-NEXT: xvcvuxddp vs6, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs6, 96(r3)
; CHECK-BE-NEXT: xvcvuxddp vs7, v2
@@ -418,7 +418,7 @@ define <2 x double> @test2elt_signed(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-P9-NEXT: mtvsrwz v2, r3
; CHECK-P9-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: vextsb2d v2, v2
; CHECK-P9-NEXT: xvcvsxddp v2, v2
@@ -429,7 +429,7 @@ define <2 x double> @test2elt_signed(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-BE-NEXT: mtvsrwz v2, r3
; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0 at toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: vextsb2d v2, v2
; CHECK-BE-NEXT: xvcvsxddp v2, v2
@@ -474,13 +474,13 @@ define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>)
; CHECK-P9-NEXT: mtvsrwz v2, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_0 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsb2d v2, v2
@@ -494,13 +494,13 @@ define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>)
; CHECK-BE-NEXT: addis r4, r2, .LCPI5_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v3, v3, v3
; CHECK-BE-NEXT: addi r4, r4, .LCPI5_0 at toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI5_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI5_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v3, v2, v4
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsb2d v2, v2
@@ -568,27 +568,27 @@ define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>)
; CHECK-P9-NEXT: mtvsrd v2, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_0 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_2 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_3 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: vextsb2d v2, v2
@@ -602,27 +602,27 @@ define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_0 at toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_1 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_2 at toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_3 at toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs1, 48(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs2, 0(r3)
; CHECK-BE-NEXT: vextsb2d v2, v2
@@ -728,55 +728,55 @@ define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_0 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_0 at toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_1 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_1 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_2 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_2 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_3 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_3 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_4 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_4 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs3, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_5 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_5 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs3, 48(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs4, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_6 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_6 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs4, 64(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs5, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_7 at toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_7 at toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs5, 80(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs6, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs6, 96(r3)
; CHECK-P9-NEXT: vextsb2d v2, v2
@@ -789,55 +789,55 @@ define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_0 at toc@ha
; CHECK-BE-NEXT: xxlxor v3, v3, v3
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_0 at toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_1 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_1 at toc@l
; CHECK-BE-NEXT: vperm v4, v3, v2, v4
; CHECK-BE-NEXT: vextsb2d v4, v4
; CHECK-BE-NEXT: xvcvsxddp vs0, v4
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_2 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_2 at toc@l
; CHECK-BE-NEXT: vperm v4, v3, v2, v4
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsb2d v4, v4
; CHECK-BE-NEXT: xvcvsxddp vs1, v4
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_3 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_3 at toc@l
; CHECK-BE-NEXT: vperm v4, v3, v2, v4
; CHECK-BE-NEXT: stxv vs1, 48(r3)
; CHECK-BE-NEXT: vextsb2d v4, v4
; CHECK-BE-NEXT: xvcvsxddp vs2, v4
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_4 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_4 at toc@l
; CHECK-BE-NEXT: vperm v3, v3, v2, v4
; CHECK-BE-NEXT: stxv vs2, 80(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs3, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_5 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_5 at toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs3, 112(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs4, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_6 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_6 at toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs4, 0(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs5, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_7 at toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_7 at toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs5, 32(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs6, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs6, 64(r3)
; CHECK-BE-NEXT: vextsb2d v2, v2
diff --git a/llvm/test/CodeGen/PowerPC/vec_extract_p9.ll b/llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
index 8f3967403ae6..97e2dd122b76 100644
--- a/llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
@@ -180,7 +180,7 @@ define double @test10(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: addis 3, 2, .LCPI9_0 at toc@ha
; CHECK-LE-NEXT: addi 3, 3, .LCPI9_0 at toc@l
-; CHECK-LE-NEXT: lxvx 36, 0, 3
+; CHECK-LE-NEXT: lxv 36, 0(3)
; CHECK-LE-NEXT: addis 3, 2, .LCPI9_1 at toc@ha
; CHECK-LE-NEXT: lfs 0, .LCPI9_1 at toc@l(3)
; CHECK-LE-NEXT: vperm 2, 3, 2, 4
diff --git a/llvm/test/CodeGen/PowerPC/vec_int_ext.ll b/llvm/test/CodeGen/PowerPC/vec_int_ext.ll
index 47f79eee5ef7..06716aaabc48 100644
--- a/llvm/test/CodeGen/PowerPC/vec_int_ext.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_int_ext.ll
@@ -12,7 +12,7 @@ define <4 x i32> @vextsb2wLE(<16 x i8> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI0_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI0_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: vextsb2w 2, 2
; CHECK-BE-NEXT: blr
@@ -43,7 +43,7 @@ define <2 x i64> @vextsb2dLE(<16 x i8> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI1_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI1_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: vextsb2d 2, 2
; CHECK-BE-NEXT: blr
@@ -68,7 +68,7 @@ define <4 x i32> @vextsh2wLE(<8 x i16> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI2_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI2_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: vextsh2w 2, 2
; CHECK-BE-NEXT: blr
@@ -99,7 +99,7 @@ define <2 x i64> @vextsh2dLE(<8 x i16> %a) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI3_0 at toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI3_0 at toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: vextsh2d 2, 2
; CHECK-BE-NEXT: blr
@@ -361,7 +361,7 @@ define <8 x i16> @testInvalidExtend(<16 x i8> %a) {
; CHECK-BE-NEXT: extsb 6, 6
; CHECK-BE-NEXT: mtvsrwz 32, 3
; CHECK-BE-NEXT: addi 9, 9, .LCPI11_0 at toc@l
-; CHECK-BE-NEXT: lxvx 36, 0, 9
+; CHECK-BE-NEXT: lxv 36, 0(9)
; CHECK-BE-NEXT: vperm 2, 3, 2, 4
; CHECK-BE-NEXT: mtvsrwz 35, 8
; CHECK-BE-NEXT: vperm 3, 5, 3, 4
diff --git a/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
index 3cbfa1eabd66..b378b0aabdb2 100644
--- a/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
@@ -80,7 +80,7 @@ define <3 x float> @constrained_vector_fdiv_v3f32(<3 x float> %x, <3 x float> %y
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvspdpn 2, 2
; PC64LE9-NEXT: xscvspdpn 3, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: xsdivsp 0, 1, 0
; PC64LE9-NEXT: xxswapd 1, 35
; PC64LE9-NEXT: xscvspdpn 1, 1
@@ -364,7 +364,7 @@ define <3 x float> @constrained_vector_frem_v3f32(<3 x float> %x, <3 x float> %y
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI7_0 at toc@l
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: vmrghw 2, 3, 2
; PC64LE9-NEXT: xscvdpspn 35, 31
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
@@ -675,7 +675,7 @@ define <3 x float> @constrained_vector_fmul_v3f32(<3 x float> %x, <3 x float> %y
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvspdpn 2, 2
; PC64LE9-NEXT: xscvspdpn 3, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: xsmulsp 0, 1, 0
; PC64LE9-NEXT: xxswapd 1, 35
; PC64LE9-NEXT: xscvspdpn 1, 1
@@ -836,7 +836,7 @@ define <3 x float> @constrained_vector_fadd_v3f32(<3 x float> %x, <3 x float> %y
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvspdpn 2, 2
; PC64LE9-NEXT: xscvspdpn 3, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: xsaddsp 0, 1, 0
; PC64LE9-NEXT: xxswapd 1, 35
; PC64LE9-NEXT: xscvspdpn 1, 1
@@ -997,7 +997,7 @@ define <3 x float> @constrained_vector_fsub_v3f32(<3 x float> %x, <3 x float> %y
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvspdpn 2, 2
; PC64LE9-NEXT: xscvspdpn 3, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: xssubsp 0, 1, 0
; PC64LE9-NEXT: xxswapd 1, 35
; PC64LE9-NEXT: xscvspdpn 1, 1
@@ -1155,7 +1155,7 @@ define <3 x float> @constrained_vector_sqrt_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
@@ -1419,7 +1419,7 @@ define <3 x float> @constrained_vector_pow_v3f32(<3 x float> %x, <3 x float> %y)
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI32_0 at toc@l
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: vmrghw 2, 3, 2
; PC64LE9-NEXT: xscvdpspn 35, 31
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
@@ -1846,7 +1846,7 @@ define <3 x float> @constrained_vector_powi_v3f32(<3 x float> %x, i32 %y) #0 {
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: ld 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI37_0 at toc@l
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: vmrghw 2, 3, 2
; PC64LE9-NEXT: xscvdpspn 35, 31
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
@@ -2228,7 +2228,7 @@ define <3 x float> @constrained_vector_sin_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI42_0 at toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -2578,7 +2578,7 @@ define <3 x float> @constrained_vector_cos_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI47_0 at toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -2928,7 +2928,7 @@ define <3 x float> @constrained_vector_exp_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI52_0 at toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -3278,7 +3278,7 @@ define <3 x float> @constrained_vector_exp2_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI57_0 at toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -3628,7 +3628,7 @@ define <3 x float> @constrained_vector_log_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI62_0 at toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -3978,7 +3978,7 @@ define <3 x float> @constrained_vector_log10_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI67_0 at toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -4328,7 +4328,7 @@ define <3 x float> @constrained_vector_log2_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI72_0 at toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -4585,7 +4585,7 @@ define <3 x float> @constrained_vector_rint_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
@@ -4816,7 +4816,7 @@ define <3 x float> @constrained_vector_nearbyint_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI82_0 at toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
@@ -5138,7 +5138,7 @@ define <3 x float> @constrained_vector_maxnum_v3f32(<3 x float> %x, <3 x float>
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI87_0 at toc@l
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: vmrghw 2, 3, 2
; PC64LE9-NEXT: xscvdpspn 35, 31
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
@@ -5379,7 +5379,7 @@ define <3 x float> @constrained_vector_minnum_v3f32(<3 x float> %x, <3 x float>
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI92_0 at toc@l
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: vmrghw 2, 3, 2
; PC64LE9-NEXT: xscvdpspn 35, 31
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
@@ -5579,7 +5579,7 @@ define <3 x i32> @constrained_vector_fptosi_v3i32_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI97_0 at toc@l
; PC64LE9-NEXT: vmrghw 3, 4, 3
; PC64LE9-NEXT: xscvdpsxws 0, 0
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: mffprwz 3, 0
; PC64LE9-NEXT: mtvsrwz 34, 3
; PC64LE9-NEXT: vperm 2, 2, 3, 4
@@ -5837,7 +5837,7 @@ define <3 x i32> @constrained_vector_fptosi_v3i32_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: addis 3, 2, .LCPI105_0 at toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI105_0 at toc@l
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: mffprwz 3, 0
; PC64LE9-NEXT: mtvsrwz 36, 3
; PC64LE9-NEXT: vperm 2, 4, 2, 3
@@ -6073,7 +6073,7 @@ define <3 x i32> @constrained_vector_fptoui_v3i32_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI113_0 at toc@l
; PC64LE9-NEXT: vmrghw 3, 4, 3
; PC64LE9-NEXT: xscvdpuxws 0, 0
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: mffprwz 3, 0
; PC64LE9-NEXT: mtvsrwz 34, 3
; PC64LE9-NEXT: vperm 2, 2, 3, 4
@@ -6330,7 +6330,7 @@ define <3 x i32> @constrained_vector_fptoui_v3i32_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: addis 3, 2, .LCPI121_0 at toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI121_0 at toc@l
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: mffprwz 3, 0
; PC64LE9-NEXT: mtvsrwz 36, 3
; PC64LE9-NEXT: vperm 2, 4, 2, 3
@@ -6540,7 +6540,7 @@ define <3 x float> @constrained_vector_fptrunc_v3f64(<3 x double> %x) #0 {
; PC64LE9-NEXT: xsrsp 0, 3
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
@@ -6751,7 +6751,7 @@ define <3 x float> @constrained_vector_ceil_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
@@ -6866,7 +6866,7 @@ define <3 x float> @constrained_vector_floor_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
@@ -6980,7 +6980,7 @@ define <3 x float> @constrained_vector_round_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
@@ -7095,7 +7095,7 @@ define <3 x float> @constrained_vector_trunc_v3f32(<3 x float> %x) #0 {
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
@@ -7236,7 +7236,7 @@ define <2 x double> @constrained_vector_sitofp_v2f64_v2i16(<2 x i16> %x) #0 {
; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI155_0 at toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI155_0 at toc@l
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 2, 2, 3
; PC64LE9-NEXT: vextsh2d 2, 2
; PC64LE9-NEXT: xvcvsxddp 34, 34
@@ -7451,7 +7451,7 @@ define <3 x float> @constrained_vector_sitofp_v3f32_v3i32(<3 x i32> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI161_0 at toc@l
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 3, 4, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: mfvsrwz 3, 34
; PC64LE9-NEXT: mtfprwa 0, 3
; PC64LE9-NEXT: xscvsxdsp 0, 0
@@ -7526,7 +7526,7 @@ define <3 x float> @constrained_vector_sitofp_v3f32_v3i64(<3 x i64> %x) #0 {
; PC64LE9-NEXT: mtfprd 0, 5
; PC64LE9-NEXT: xscvsxdsp 0, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
@@ -7800,7 +7800,7 @@ define <2 x double> @constrained_vector_uitofp_v2f64_v2i16(<2 x i16> %x) #0 {
; PC64LE9-NEXT: addis 3, 2, .LCPI173_0 at toc@ha
; PC64LE9-NEXT: xxlxor 36, 36, 36
; PC64LE9-NEXT: addi 3, 3, .LCPI173_0 at toc@l
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: xvcvuxddp 34, 34
; PC64LE9-NEXT: blr
@@ -8014,7 +8014,7 @@ define <3 x float> @constrained_vector_uitofp_v3f32_v3i32(<3 x i32> %x) #0 {
; PC64LE9-NEXT: addi 3, 3, .LCPI179_0 at toc@l
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 3, 4, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: mfvsrwz 3, 34
; PC64LE9-NEXT: mtfprwz 0, 3
; PC64LE9-NEXT: xscvuxdsp 0, 0
@@ -8089,7 +8089,7 @@ define <3 x float> @constrained_vector_uitofp_v3f32_v3i64(<3 x i64> %x) #0 {
; PC64LE9-NEXT: mtfprd 0, 5
; PC64LE9-NEXT: xscvuxdsp 0, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
diff --git a/llvm/test/CodeGen/PowerPC/vector-extend-sign.ll b/llvm/test/CodeGen/PowerPC/vector-extend-sign.ll
index 71928296d89f..6ac90eda99e6 100644
--- a/llvm/test/CodeGen/PowerPC/vector-extend-sign.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-extend-sign.ll
@@ -149,7 +149,7 @@ define <2 x i64> @test_none(<2 x i64> %m) {
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis 3, 2, .LCPI5_0 at toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI5_0 at toc@l
-; CHECK-P9-NEXT: lxvx 35, 0, 3
+; CHECK-P9-NEXT: lxv 35, 0(3)
; CHECK-P9-NEXT: vsld 2, 2, 3
; CHECK-P9-NEXT: vsrad 2, 2, 3
; CHECK-P9-NEXT: blr
diff --git a/llvm/test/CodeGen/PowerPC/vector-ldst.ll b/llvm/test/CodeGen/PowerPC/vector-ldst.ll
index 92887e6c113e..4ccb28d70a83 100644
--- a/llvm/test/CodeGen/PowerPC/vector-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-ldst.ll
@@ -44,8 +44,8 @@ entry:
define dso_local <16 x i8> @ld_unalign16_vector(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_unalign16_vector:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 1
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 1
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_unalign16_vector:
@@ -70,8 +70,8 @@ entry:
define dso_local <16 x i8> @ld_align16_vector(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_align16_vector:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 8
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 8
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_align16_vector:
@@ -272,7 +272,7 @@ define dso_local <16 x i8> @ld_or_vector(i64 %ptr, i8 zeroext %off) {
; CHECK-LABEL: ld_or_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_or_vector:
@@ -327,7 +327,7 @@ define dso_local <16 x i8> @ld_not_disjoint16_vector(i64 %ptr) {
; CHECK-LABEL: ld_not_disjoint16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_not_disjoint16_vector:
@@ -353,8 +353,8 @@ define dso_local <16 x i8> @ld_disjoint_unalign16_vector(i64 %ptr) {
; CHECK-LABEL: ld_disjoint_unalign16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 6
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_disjoint_unalign16_vector:
@@ -383,8 +383,8 @@ define dso_local <16 x i8> @ld_disjoint_align16_vector(i64 %ptr) {
; CHECK-LABEL: ld_disjoint_align16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 24
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 24
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_disjoint_align16_vector:
@@ -414,7 +414,7 @@ define dso_local <16 x i8> @ld_not_disjoint32_vector(i64 %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_not_disjoint32_vector:
@@ -529,7 +529,7 @@ define dso_local <16 x i8> @ld_not_disjoint64_vector(i64 %ptr) {
; CHECK-P10-NEXT: pli r5, 3567587329
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_not_disjoint64_vector:
@@ -539,7 +539,7 @@ define dso_local <16 x i8> @ld_not_disjoint64_vector(i64 %ptr) {
; CHECK-P9-NEXT: oris r4, r4, 54437
; CHECK-P9-NEXT: ori r4, r4, 4097
; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lxvx v2, 0, r3
+; CHECK-P9-NEXT: lxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_not_disjoint64_vector:
@@ -665,7 +665,7 @@ define dso_local <16 x i8> @ld_cst_unalign16_vector() {
; CHECK-LABEL: ld_cst_unalign16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 255
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_cst_unalign16_vector:
@@ -712,14 +712,14 @@ define dso_local <16 x i8> @ld_cst_unalign32_vector() {
; CHECK-P10-LABEL: ld_cst_unalign32_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 99999
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_unalign32_vector:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r3, 1
; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: lxvx v2, 0, r3
+; CHECK-P9-NEXT: lxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_cst_unalign32_vector:
@@ -745,14 +745,14 @@ define dso_local <16 x i8> @ld_cst_align32_vector() {
; CHECK-P10-LABEL: ld_cst_align32_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 9999900
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_align32_vector:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r3, 152
; CHECK-P9-NEXT: ori r3, r3, 38428
-; CHECK-P9-NEXT: lxvx v2, 0, r3
+; CHECK-P9-NEXT: lxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_cst_align32_vector:
@@ -780,7 +780,7 @@ define dso_local <16 x i8> @ld_cst_unalign64_vector() {
; CHECK-P10-NEXT: pli r3, 232
; CHECK-P10-NEXT: pli r4, 3567587329
; CHECK-P10-NEXT: rldimi r4, r3, 32, 0
-; CHECK-P10-NEXT: lxvx v2, 0, r4
+; CHECK-P10-NEXT: lxv v2, 0(r4)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_unalign64_vector:
@@ -789,7 +789,7 @@ define dso_local <16 x i8> @ld_cst_unalign64_vector() {
; CHECK-P9-NEXT: rldic r3, r3, 35, 24
; CHECK-P9-NEXT: oris r3, r3, 54437
; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: lxvx v2, 0, r3
+; CHECK-P9-NEXT: lxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_cst_unalign64_vector:
@@ -820,7 +820,7 @@ define dso_local <16 x i8> @ld_cst_align64_vector() {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_align64_vector:
@@ -828,7 +828,7 @@ define dso_local <16 x i8> @ld_cst_align64_vector() {
; CHECK-P9-NEXT: lis r3, 3725
; CHECK-P9-NEXT: ori r3, r3, 19025
; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lxvx v2, 0, r3
+; CHECK-P9-NEXT: lxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_cst_align64_vector:
@@ -877,8 +877,8 @@ entry:
define dso_local void @st_unalign16_vector(i8* nocapture %ptr, <16 x i8> %str) {
; CHECK-LABEL: st_unalign16_vector:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 1
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 1
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_unalign16_vector:
@@ -903,8 +903,8 @@ entry:
define dso_local void @st_align16_vector(i8* nocapture %ptr, <16 x i8> %str) {
; CHECK-LABEL: st_align16_vector:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 8
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 8
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_align16_vector:
@@ -1105,7 +1105,7 @@ define dso_local void @st_or1_vector(i64 %ptr, i8 zeroext %off, <16 x i8> %str)
; CHECK-LABEL: st_or1_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_or1_vector:
@@ -1160,7 +1160,7 @@ define dso_local void @st_not_disjoint16_vector(i64 %ptr, <16 x i8> %str) {
; CHECK-LABEL: st_not_disjoint16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_not_disjoint16_vector:
@@ -1186,8 +1186,8 @@ define dso_local void @st_disjoint_unalign16_vector(i64 %ptr, <16 x i8> %str) {
; CHECK-LABEL: st_disjoint_unalign16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 6
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_disjoint_unalign16_vector:
@@ -1216,8 +1216,8 @@ define dso_local void @st_disjoint_align16_vector(i64 %ptr, <16 x i8> %str) {
; CHECK-LABEL: st_disjoint_align16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 24
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 24
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_disjoint_align16_vector:
@@ -1247,7 +1247,7 @@ define dso_local void @st_not_disjoint32_vector(i64 %ptr, <16 x i8> %str) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_not_disjoint32_vector:
@@ -1362,7 +1362,7 @@ define dso_local void @st_not_disjoint64_vector(i64 %ptr, <16 x i8> %str) {
; CHECK-P10-NEXT: pli r5, 3567587329
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_not_disjoint64_vector:
@@ -1372,7 +1372,7 @@ define dso_local void @st_not_disjoint64_vector(i64 %ptr, <16 x i8> %str) {
; CHECK-P9-NEXT: oris r4, r4, 54437
; CHECK-P9-NEXT: ori r4, r4, 4097
; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_not_disjoint64_vector:
@@ -1498,7 +1498,7 @@ define dso_local void @st_cst_unalign16_vector(<16 x i8> %str) {
; CHECK-LABEL: st_cst_unalign16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 255
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_cst_unalign16_vector:
@@ -1545,14 +1545,14 @@ define dso_local void @st_cst_unalign32_vector(<16 x i8> %str) {
; CHECK-P10-LABEL: st_cst_unalign32_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 99999
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_unalign32_vector:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r3, 1
; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_cst_unalign32_vector:
@@ -1578,14 +1578,14 @@ define dso_local void @st_cst_align32_vector(<16 x i8> %str) {
; CHECK-P10-LABEL: st_cst_align32_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 9999900
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_align32_vector:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r3, 152
; CHECK-P9-NEXT: ori r3, r3, 38428
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_cst_align32_vector:
@@ -1613,7 +1613,7 @@ define dso_local void @st_cst_unalign64_vector(<16 x i8> %str) {
; CHECK-P10-NEXT: pli r3, 232
; CHECK-P10-NEXT: pli r4, 3567587329
; CHECK-P10-NEXT: rldimi r4, r3, 32, 0
-; CHECK-P10-NEXT: stxvx v2, 0, r4
+; CHECK-P10-NEXT: stxv v2, 0(r4)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_unalign64_vector:
@@ -1622,7 +1622,7 @@ define dso_local void @st_cst_unalign64_vector(<16 x i8> %str) {
; CHECK-P9-NEXT: rldic r3, r3, 35, 24
; CHECK-P9-NEXT: oris r3, r3, 54437
; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_cst_unalign64_vector:
@@ -1653,7 +1653,7 @@ define dso_local void @st_cst_align64_vector(<16 x i8> %str) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_align64_vector:
@@ -1661,7 +1661,7 @@ define dso_local void @st_cst_align64_vector(<16 x i8> %str) {
; CHECK-P9-NEXT: lis r3, 3725
; CHECK-P9-NEXT: ori r3, r3, 19025
; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_cst_align64_vector:
diff --git a/llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll b/llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
index 8ca2140ea3df..0bcf03450b5d 100644
--- a/llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
@@ -11998,7 +11998,7 @@ define <2 x i64> @ugt_1_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI100_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI100_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -12063,7 +12063,7 @@ define <2 x i64> @ult_2_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI101_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI101_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -12197,7 +12197,7 @@ define <2 x i64> @ugt_2_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI102_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI102_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -12331,7 +12331,7 @@ define <2 x i64> @ult_3_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI103_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI103_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -12465,7 +12465,7 @@ define <2 x i64> @ugt_3_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI104_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI104_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -12599,7 +12599,7 @@ define <2 x i64> @ult_4_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI105_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI105_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -12733,7 +12733,7 @@ define <2 x i64> @ugt_4_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI106_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI106_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -12867,7 +12867,7 @@ define <2 x i64> @ult_5_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI107_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI107_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -13001,7 +13001,7 @@ define <2 x i64> @ugt_5_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI108_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI108_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -13135,7 +13135,7 @@ define <2 x i64> @ult_6_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI109_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI109_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -13269,7 +13269,7 @@ define <2 x i64> @ugt_6_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI110_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI110_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -13403,7 +13403,7 @@ define <2 x i64> @ult_7_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI111_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI111_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -13537,7 +13537,7 @@ define <2 x i64> @ugt_7_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI112_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI112_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -13671,7 +13671,7 @@ define <2 x i64> @ult_8_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI113_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI113_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -13805,7 +13805,7 @@ define <2 x i64> @ugt_8_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI114_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI114_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -13939,7 +13939,7 @@ define <2 x i64> @ult_9_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI115_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI115_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -14073,7 +14073,7 @@ define <2 x i64> @ugt_9_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI116_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI116_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -14207,7 +14207,7 @@ define <2 x i64> @ult_10_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI117_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI117_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -14341,7 +14341,7 @@ define <2 x i64> @ugt_10_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI118_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI118_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -14475,7 +14475,7 @@ define <2 x i64> @ult_11_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI119_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI119_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -14609,7 +14609,7 @@ define <2 x i64> @ugt_11_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI120_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI120_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -14743,7 +14743,7 @@ define <2 x i64> @ult_12_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI121_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI121_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -14877,7 +14877,7 @@ define <2 x i64> @ugt_12_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI122_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI122_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -15011,7 +15011,7 @@ define <2 x i64> @ult_13_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI123_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI123_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -15145,7 +15145,7 @@ define <2 x i64> @ugt_13_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI124_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI124_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -15279,7 +15279,7 @@ define <2 x i64> @ult_14_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI125_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI125_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -15413,7 +15413,7 @@ define <2 x i64> @ugt_14_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI126_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI126_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -15547,7 +15547,7 @@ define <2 x i64> @ult_15_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI127_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI127_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -15681,7 +15681,7 @@ define <2 x i64> @ugt_15_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI128_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI128_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -15815,7 +15815,7 @@ define <2 x i64> @ult_16_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI129_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI129_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -15949,7 +15949,7 @@ define <2 x i64> @ugt_16_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI130_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI130_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -16083,7 +16083,7 @@ define <2 x i64> @ult_17_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI131_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI131_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -16217,7 +16217,7 @@ define <2 x i64> @ugt_17_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI132_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI132_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -16351,7 +16351,7 @@ define <2 x i64> @ult_18_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI133_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI133_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -16485,7 +16485,7 @@ define <2 x i64> @ugt_18_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI134_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI134_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -16619,7 +16619,7 @@ define <2 x i64> @ult_19_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI135_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI135_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -16753,7 +16753,7 @@ define <2 x i64> @ugt_19_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI136_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI136_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -16887,7 +16887,7 @@ define <2 x i64> @ult_20_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI137_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI137_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -17021,7 +17021,7 @@ define <2 x i64> @ugt_20_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI138_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI138_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -17155,7 +17155,7 @@ define <2 x i64> @ult_21_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI139_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI139_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -17289,7 +17289,7 @@ define <2 x i64> @ugt_21_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI140_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI140_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -17423,7 +17423,7 @@ define <2 x i64> @ult_22_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI141_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI141_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -17557,7 +17557,7 @@ define <2 x i64> @ugt_22_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI142_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI142_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -17691,7 +17691,7 @@ define <2 x i64> @ult_23_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI143_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI143_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -17825,7 +17825,7 @@ define <2 x i64> @ugt_23_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI144_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI144_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -17959,7 +17959,7 @@ define <2 x i64> @ult_24_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI145_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI145_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -18093,7 +18093,7 @@ define <2 x i64> @ugt_24_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI146_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI146_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -18227,7 +18227,7 @@ define <2 x i64> @ult_25_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI147_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI147_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -18361,7 +18361,7 @@ define <2 x i64> @ugt_25_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI148_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI148_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -18495,7 +18495,7 @@ define <2 x i64> @ult_26_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI149_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI149_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -18629,7 +18629,7 @@ define <2 x i64> @ugt_26_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI150_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI150_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -18763,7 +18763,7 @@ define <2 x i64> @ult_27_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI151_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI151_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -18897,7 +18897,7 @@ define <2 x i64> @ugt_27_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI152_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI152_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -19031,7 +19031,7 @@ define <2 x i64> @ult_28_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI153_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI153_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -19165,7 +19165,7 @@ define <2 x i64> @ugt_28_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI154_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI154_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -19299,7 +19299,7 @@ define <2 x i64> @ult_29_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI155_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI155_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -19433,7 +19433,7 @@ define <2 x i64> @ugt_29_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI156_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI156_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -19567,7 +19567,7 @@ define <2 x i64> @ult_30_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI157_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI157_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -19701,7 +19701,7 @@ define <2 x i64> @ugt_30_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI158_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI158_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -19835,7 +19835,7 @@ define <2 x i64> @ult_31_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI159_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI159_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -19969,7 +19969,7 @@ define <2 x i64> @ugt_31_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI160_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI160_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -20103,7 +20103,7 @@ define <2 x i64> @ult_32_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI161_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI161_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -20237,7 +20237,7 @@ define <2 x i64> @ugt_32_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI162_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI162_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -20371,7 +20371,7 @@ define <2 x i64> @ult_33_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI163_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI163_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -20505,7 +20505,7 @@ define <2 x i64> @ugt_33_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI164_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI164_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -20639,7 +20639,7 @@ define <2 x i64> @ult_34_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI165_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI165_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -20773,7 +20773,7 @@ define <2 x i64> @ugt_34_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI166_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI166_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -20907,7 +20907,7 @@ define <2 x i64> @ult_35_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI167_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI167_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -21041,7 +21041,7 @@ define <2 x i64> @ugt_35_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI168_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI168_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -21175,7 +21175,7 @@ define <2 x i64> @ult_36_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI169_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI169_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -21309,7 +21309,7 @@ define <2 x i64> @ugt_36_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI170_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI170_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -21443,7 +21443,7 @@ define <2 x i64> @ult_37_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI171_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI171_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -21577,7 +21577,7 @@ define <2 x i64> @ugt_37_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI172_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI172_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -21711,7 +21711,7 @@ define <2 x i64> @ult_38_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI173_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI173_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -21845,7 +21845,7 @@ define <2 x i64> @ugt_38_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI174_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI174_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -21979,7 +21979,7 @@ define <2 x i64> @ult_39_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI175_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI175_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -22113,7 +22113,7 @@ define <2 x i64> @ugt_39_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI176_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI176_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -22247,7 +22247,7 @@ define <2 x i64> @ult_40_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI177_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI177_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -22381,7 +22381,7 @@ define <2 x i64> @ugt_40_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI178_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI178_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -22515,7 +22515,7 @@ define <2 x i64> @ult_41_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI179_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI179_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -22649,7 +22649,7 @@ define <2 x i64> @ugt_41_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI180_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI180_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -22783,7 +22783,7 @@ define <2 x i64> @ult_42_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI181_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI181_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -22917,7 +22917,7 @@ define <2 x i64> @ugt_42_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI182_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI182_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -23051,7 +23051,7 @@ define <2 x i64> @ult_43_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI183_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI183_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -23185,7 +23185,7 @@ define <2 x i64> @ugt_43_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI184_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI184_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -23319,7 +23319,7 @@ define <2 x i64> @ult_44_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI185_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI185_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -23453,7 +23453,7 @@ define <2 x i64> @ugt_44_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI186_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI186_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -23587,7 +23587,7 @@ define <2 x i64> @ult_45_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI187_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI187_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -23721,7 +23721,7 @@ define <2 x i64> @ugt_45_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI188_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI188_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -23855,7 +23855,7 @@ define <2 x i64> @ult_46_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI189_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI189_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -23989,7 +23989,7 @@ define <2 x i64> @ugt_46_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI190_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI190_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -24123,7 +24123,7 @@ define <2 x i64> @ult_47_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI191_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI191_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -24257,7 +24257,7 @@ define <2 x i64> @ugt_47_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI192_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI192_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -24391,7 +24391,7 @@ define <2 x i64> @ult_48_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI193_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI193_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -24525,7 +24525,7 @@ define <2 x i64> @ugt_48_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI194_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI194_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -24659,7 +24659,7 @@ define <2 x i64> @ult_49_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI195_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI195_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -24793,7 +24793,7 @@ define <2 x i64> @ugt_49_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI196_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI196_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -24927,7 +24927,7 @@ define <2 x i64> @ult_50_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI197_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI197_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -25061,7 +25061,7 @@ define <2 x i64> @ugt_50_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI198_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI198_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -25195,7 +25195,7 @@ define <2 x i64> @ult_51_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI199_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI199_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -25329,7 +25329,7 @@ define <2 x i64> @ugt_51_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI200_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI200_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -25463,7 +25463,7 @@ define <2 x i64> @ult_52_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI201_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI201_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -25597,7 +25597,7 @@ define <2 x i64> @ugt_52_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI202_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI202_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -25731,7 +25731,7 @@ define <2 x i64> @ult_53_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI203_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI203_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -25865,7 +25865,7 @@ define <2 x i64> @ugt_53_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI204_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI204_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -25999,7 +25999,7 @@ define <2 x i64> @ult_54_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI205_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI205_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -26133,7 +26133,7 @@ define <2 x i64> @ugt_54_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI206_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI206_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -26267,7 +26267,7 @@ define <2 x i64> @ult_55_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI207_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI207_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -26401,7 +26401,7 @@ define <2 x i64> @ugt_55_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI208_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI208_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -26535,7 +26535,7 @@ define <2 x i64> @ult_56_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI209_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI209_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -26669,7 +26669,7 @@ define <2 x i64> @ugt_56_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI210_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI210_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -26803,7 +26803,7 @@ define <2 x i64> @ult_57_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI211_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI211_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -26937,7 +26937,7 @@ define <2 x i64> @ugt_57_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI212_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI212_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -27071,7 +27071,7 @@ define <2 x i64> @ult_58_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI213_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI213_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -27205,7 +27205,7 @@ define <2 x i64> @ugt_58_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI214_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI214_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -27339,7 +27339,7 @@ define <2 x i64> @ult_59_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI215_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI215_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -27473,7 +27473,7 @@ define <2 x i64> @ugt_59_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI216_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI216_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -27607,7 +27607,7 @@ define <2 x i64> @ult_60_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI217_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI217_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -27741,7 +27741,7 @@ define <2 x i64> @ugt_60_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI218_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI218_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -27875,7 +27875,7 @@ define <2 x i64> @ult_61_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI219_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI219_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -28009,7 +28009,7 @@ define <2 x i64> @ugt_61_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI220_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI220_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -28143,7 +28143,7 @@ define <2 x i64> @ult_62_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI221_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI221_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -28277,7 +28277,7 @@ define <2 x i64> @ugt_62_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI222_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI222_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
@@ -28411,7 +28411,7 @@ define <2 x i64> @ult_63_v2i64(<2 x i64> %0) {
; PWR9-NEXT: addis 3, 2, .LCPI223_0 at toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI223_0 at toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
diff --git a/llvm/test/CodeGen/PowerPC/vsx-p9.ll b/llvm/test/CodeGen/PowerPC/vsx-p9.ll
index 0dec6ddbcb44..636a53a81149 100644
--- a/llvm/test/CodeGen/PowerPC/vsx-p9.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx-p9.ll
@@ -36,8 +36,8 @@ entry:
%1 = load <16 x i8>, <16 x i8>* @ucb, align 16
%add.i = add <16 x i8> %1, %0
tail call void (...) @sink(<16 x i8> %add.i)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vaddubm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
@@ -45,8 +45,8 @@ entry:
%3 = load <16 x i8>, <16 x i8>* @scb, align 16
%add.i22 = add <16 x i8> %3, %2
tail call void (...) @sink(<16 x i8> %add.i22)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vaddubm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
@@ -54,8 +54,8 @@ entry:
%5 = load <8 x i16>, <8 x i16>* @usb, align 16
%add.i21 = add <8 x i16> %5, %4
tail call void (...) @sink(<8 x i16> %add.i21)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduhm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
@@ -63,8 +63,8 @@ entry:
%7 = load <8 x i16>, <8 x i16>* @ssb, align 16
%add.i20 = add <8 x i16> %7, %6
tail call void (...) @sink(<8 x i16> %add.i20)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduhm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
@@ -72,8 +72,8 @@ entry:
%9 = load <4 x i32>, <4 x i32>* @uib, align 16
%add.i19 = add <4 x i32> %9, %8
tail call void (...) @sink(<4 x i32> %add.i19)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduwm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
@@ -81,8 +81,8 @@ entry:
%11 = load <4 x i32>, <4 x i32>* @sib, align 16
%add.i18 = add <4 x i32> %11, %10
tail call void (...) @sink(<4 x i32> %add.i18)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduwm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
@@ -90,8 +90,8 @@ entry:
%13 = load <2 x i64>, <2 x i64>* @ullb, align 16
%add.i17 = add <2 x i64> %13, %12
tail call void (...) @sink(<2 x i64> %add.i17)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vaddudm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
@@ -99,8 +99,8 @@ entry:
%15 = load <2 x i64>, <2 x i64>* @sllb, align 16
%add.i16 = add <2 x i64> %15, %14
tail call void (...) @sink(<2 x i64> %add.i16)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vaddudm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
@@ -108,8 +108,8 @@ entry:
%17 = load <1 x i128>, <1 x i128>* @uxb, align 16
%add.i15 = add <1 x i128> %17, %16
tail call void (...) @sink(<1 x i128> %add.i15)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduqm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
@@ -117,8 +117,8 @@ entry:
%19 = load <1 x i128>, <1 x i128>* @sxb, align 16
%add.i14 = add <1 x i128> %19, %18
tail call void (...) @sink(<1 x i128> %add.i14)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduqm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
@@ -126,8 +126,8 @@ entry:
%21 = load <4 x float>, <4 x float>* @vfb, align 16
%add.i13 = fadd <4 x float> %20, %21
tail call void (...) @sink(<4 x float> %add.i13)
-; CHECK: lxvx 0, 0, 3
-; CHECK: lxvx 1, 0, 3
+; CHECK: lxv 0, 0(3)
+; CHECK: lxv 1, 0(3)
; CHECK: xvaddsp 34, 0, 1
; CHECK: stxv 34,
; CHECK: bl sink
@@ -135,8 +135,8 @@ entry:
%23 = load <2 x double>, <2 x double>* @vdb, align 16
%add.i12 = fadd <2 x double> %22, %23
tail call void (...) @sink(<2 x double> %add.i12)
-; CHECK: lxvx 0, 0, 3
-; CHECK: lxvx 1, 0, 3
+; CHECK: lxv 0, 0(3)
+; CHECK: lxv 1, 0(3)
; CHECK: xvadddp 0, 0, 1
; CHECK: stxv 0,
; CHECK: bl sink
diff --git a/llvm/test/CodeGen/PowerPC/vsx.ll b/llvm/test/CodeGen/PowerPC/vsx.ll
index 6a6ef7f4c978..a62f006eaeb1 100644
--- a/llvm/test/CodeGen/PowerPC/vsx.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx.ll
@@ -1308,12 +1308,12 @@ define <2 x float> @test44(<2 x i64> %a) {
; CHECK-NEXT: ld r3, -8(r1)
; CHECK-NEXT: std r3, -24(r1)
; CHECK-NEXT: ld r3, -16(r1)
-; CHECK-NEXT: std r3, -32(r1)
; CHECK-NEXT: lfd f0, -24(r1)
+; CHECK-NEXT: std r3, -32(r1)
+; CHECK-NEXT: addi r3, r1, -48
; CHECK-NEXT: fcfidus f0, f0
; CHECK-NEXT: stfs f0, -48(r1)
; CHECK-NEXT: lfd f0, -32(r1)
-; CHECK-NEXT: addi r3, r1, -48
; CHECK-NEXT: fcfidus f0, f0
; CHECK-NEXT: stfs f0, -64(r1)
; CHECK-NEXT: lxvw4x v2, 0, r3
@@ -1329,12 +1329,12 @@ define <2 x float> @test44(<2 x i64> %a) {
; CHECK-REG-NEXT: ld r3, -8(r1)
; CHECK-REG-NEXT: std r3, -24(r1)
; CHECK-REG-NEXT: ld r3, -16(r1)
-; CHECK-REG-NEXT: std r3, -32(r1)
; CHECK-REG-NEXT: lfd f0, -24(r1)
+; CHECK-REG-NEXT: std r3, -32(r1)
+; CHECK-REG-NEXT: addi r3, r1, -48
; CHECK-REG-NEXT: fcfidus f0, f0
; CHECK-REG-NEXT: stfs f0, -48(r1)
; CHECK-REG-NEXT: lfd f0, -32(r1)
-; CHECK-REG-NEXT: addi r3, r1, -48
; CHECK-REG-NEXT: fcfidus f0, f0
; CHECK-REG-NEXT: stfs f0, -64(r1)
; CHECK-REG-NEXT: lxvw4x v2, 0, r3
@@ -1387,12 +1387,12 @@ define <2 x float> @test45(<2 x i64> %a) {
; CHECK-NEXT: ld r3, -8(r1)
; CHECK-NEXT: std r3, -24(r1)
; CHECK-NEXT: ld r3, -16(r1)
-; CHECK-NEXT: std r3, -32(r1)
; CHECK-NEXT: lfd f0, -24(r1)
+; CHECK-NEXT: std r3, -32(r1)
+; CHECK-NEXT: addi r3, r1, -48
; CHECK-NEXT: fcfids f0, f0
; CHECK-NEXT: stfs f0, -48(r1)
; CHECK-NEXT: lfd f0, -32(r1)
-; CHECK-NEXT: addi r3, r1, -48
; CHECK-NEXT: fcfids f0, f0
; CHECK-NEXT: stfs f0, -64(r1)
; CHECK-NEXT: lxvw4x v2, 0, r3
@@ -1408,12 +1408,12 @@ define <2 x float> @test45(<2 x i64> %a) {
; CHECK-REG-NEXT: ld r3, -8(r1)
; CHECK-REG-NEXT: std r3, -24(r1)
; CHECK-REG-NEXT: ld r3, -16(r1)
-; CHECK-REG-NEXT: std r3, -32(r1)
; CHECK-REG-NEXT: lfd f0, -24(r1)
+; CHECK-REG-NEXT: std r3, -32(r1)
+; CHECK-REG-NEXT: addi r3, r1, -48
; CHECK-REG-NEXT: fcfids f0, f0
; CHECK-REG-NEXT: stfs f0, -48(r1)
; CHECK-REG-NEXT: lfd f0, -32(r1)
-; CHECK-REG-NEXT: addi r3, r1, -48
; CHECK-REG-NEXT: fcfids f0, f0
; CHECK-REG-NEXT: stfs f0, -64(r1)
; CHECK-REG-NEXT: lxvw4x v2, 0, r3
@@ -1466,10 +1466,10 @@ define <2 x i64> @test46(<2 x float> %a) {
; CHECK-NEXT: xscvdpuxds f0, f0
; CHECK-NEXT: stfd f0, -32(r1)
; CHECK-NEXT: lfs f0, -48(r1)
-; CHECK-NEXT: xscvdpuxds f0, f0
-; CHECK-NEXT: stfd f0, -24(r1)
; CHECK-NEXT: ld r3, -32(r1)
+; CHECK-NEXT: xscvdpuxds f0, f0
; CHECK-NEXT: std r3, -8(r1)
+; CHECK-NEXT: stfd f0, -24(r1)
; CHECK-NEXT: ld r3, -24(r1)
; CHECK-NEXT: std r3, -16(r1)
; CHECK-NEXT: addi r3, r1, -16
@@ -1484,10 +1484,10 @@ define <2 x i64> @test46(<2 x float> %a) {
; CHECK-REG-NEXT: xscvdpuxds f0, f0
; CHECK-REG-NEXT: stfd f0, -32(r1)
; CHECK-REG-NEXT: lfs f0, -48(r1)
-; CHECK-REG-NEXT: xscvdpuxds f0, f0
-; CHECK-REG-NEXT: stfd f0, -24(r1)
; CHECK-REG-NEXT: ld r3, -32(r1)
+; CHECK-REG-NEXT: xscvdpuxds f0, f0
; CHECK-REG-NEXT: std r3, -8(r1)
+; CHECK-REG-NEXT: stfd f0, -24(r1)
; CHECK-REG-NEXT: ld r3, -24(r1)
; CHECK-REG-NEXT: std r3, -16(r1)
; CHECK-REG-NEXT: addi r3, r1, -16
@@ -1533,10 +1533,10 @@ define <2 x i64> @test47(<2 x float> %a) {
; CHECK-NEXT: xscvdpsxds f0, f0
; CHECK-NEXT: stfd f0, -32(r1)
; CHECK-NEXT: lfs f0, -48(r1)
-; CHECK-NEXT: xscvdpsxds f0, f0
-; CHECK-NEXT: stfd f0, -24(r1)
; CHECK-NEXT: ld r3, -32(r1)
+; CHECK-NEXT: xscvdpsxds f0, f0
; CHECK-NEXT: std r3, -8(r1)
+; CHECK-NEXT: stfd f0, -24(r1)
; CHECK-NEXT: ld r3, -24(r1)
; CHECK-NEXT: std r3, -16(r1)
; CHECK-NEXT: addi r3, r1, -16
@@ -1551,10 +1551,10 @@ define <2 x i64> @test47(<2 x float> %a) {
; CHECK-REG-NEXT: xscvdpsxds f0, f0
; CHECK-REG-NEXT: stfd f0, -32(r1)
; CHECK-REG-NEXT: lfs f0, -48(r1)
-; CHECK-REG-NEXT: xscvdpsxds f0, f0
-; CHECK-REG-NEXT: stfd f0, -24(r1)
; CHECK-REG-NEXT: ld r3, -32(r1)
+; CHECK-REG-NEXT: xscvdpsxds f0, f0
; CHECK-REG-NEXT: std r3, -8(r1)
+; CHECK-REG-NEXT: stfd f0, -24(r1)
; CHECK-REG-NEXT: ld r3, -24(r1)
; CHECK-REG-NEXT: std r3, -16(r1)
; CHECK-REG-NEXT: addi r3, r1, -16
diff --git a/llvm/test/CodeGen/PowerPC/vsx_builtins.ll b/llvm/test/CodeGen/PowerPC/vsx_builtins.ll
index 0aae50af2649..be69c08044ad 100644
--- a/llvm/test/CodeGen/PowerPC/vsx_builtins.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx_builtins.ll
@@ -1,7 +1,28 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -relocation-model=static -verify-machineinstrs -mcpu=pwr9 \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-P9
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=-power9-vector \
+; RUN: -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-NOINTRIN
+; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mattr=+vsx \
+; RUN: -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-NOINTRIN
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 \
+; RUN: -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-P9
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=-power9-vector \
+; RUN: -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-INTRIN
+; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mattr=+vsx \
+; RUN: -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-INTRIN
; Function Attrs: nounwind readnone
define <4 x i32> @test1(i8* %a) {
@@ -140,3 +161,51 @@ entry:
%.lobit = and i32 %1, 1
ret i32 %.lobit
}
+
+; Function Attrs: nounwind readnone
+define <2 x double> @test_lxvd2x(i8* %a) {
+; CHECK-P9-LABEL: test_lxvd2x:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: lxv v2, 0(r3)
+; CHECK-P9-NEXT: blr
+;
+; CHECK-NOINTRIN-LABEL: test_lxvd2x:
+; CHECK-NOINTRIN: # %bb.0: # %entry
+; CHECK-NOINTRIN-NEXT: lxvd2x vs0, 0, r3
+; CHECK-NOINTRIN-NEXT: xxswapd v2, vs0
+; CHECK-NOINTRIN-NEXT: blr
+;
+; CHECK-INTRIN-LABEL: test_lxvd2x:
+; CHECK-INTRIN: # %bb.0: # %entry
+; CHECK-INTRIN-NEXT: lxvd2x v2, 0, r3
+; CHECK-INTRIN-NEXT: blr
+entry:
+ %0 = tail call <2 x double> @llvm.ppc.vsx.lxvd2x(i8* %a)
+ ret <2 x double> %0
+}
+; Function Attrs: nounwind readnone
+declare <2 x double> @llvm.ppc.vsx.lxvd2x(i8*)
+
+; Function Attrs: nounwind readnone
+define void @test_stxvd2x(<2 x double> %a, i8* %b) {
+; CHECK-P9-LABEL: test_stxvd2x:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: stxv v2, 0(r5)
+; CHECK-P9-NEXT: blr
+;
+; CHECK-NOINTRIN-LABEL: test_stxvd2x:
+; CHECK-NOINTRIN: # %bb.0: # %entry
+; CHECK-NOINTRIN-NEXT: xxswapd vs0, v2
+; CHECK-NOINTRIN-NEXT: stxvd2x vs0, 0, r5
+; CHECK-NOINTRIN-NEXT: blr
+;
+; CHECK-INTRIN-LABEL: test_stxvd2x:
+; CHECK-INTRIN: # %bb.0: # %entry
+; CHECK-INTRIN-NEXT: stxvd2x v2, 0, r5
+; CHECK-INTRIN-NEXT: blr
+entry:
+ tail call void @llvm.ppc.vsx.stxvd2x(<2 x double> %a, i8* %b)
+ ret void
+}
+; Function Attrs: nounwind readnone
+declare void @llvm.ppc.vsx.stxvd2x(<2 x double>, i8*)
diff --git a/llvm/test/CodeGen/PowerPC/vsx_insert_extract_le.ll b/llvm/test/CodeGen/PowerPC/vsx_insert_extract_le.ll
index 331d7864a228..ccefc5822c98 100644
--- a/llvm/test/CodeGen/PowerPC/vsx_insert_extract_le.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx_insert_extract_le.ll
@@ -19,7 +19,7 @@ define <2 x double> @testi0(<2 x double>* %p1, double* %p2) {
; CHECK-LABEL: testi0:
; CHECK: # %bb.0:
; CHECK-NEXT: lxvd2x vs0, 0, r3
-; CHECK-NEXT: lfdx f1, 0, r4
+; CHECK-NEXT: lfd f1, 0(r4)
; CHECK-NEXT: xxswapd vs0, vs0
; CHECK-NEXT: xxmrghd v2, vs0, vs1
; CHECK-NEXT: blr
@@ -27,14 +27,14 @@ define <2 x double> @testi0(<2 x double>* %p1, double* %p2) {
; CHECK-P8-BE-LABEL: testi0:
; CHECK-P8-BE: # %bb.0:
; CHECK-P8-BE-NEXT: lxvd2x vs0, 0, r3
-; CHECK-P8-BE-NEXT: lfdx f1, 0, r4
+; CHECK-P8-BE-NEXT: lfd f1, 0(r4)
; CHECK-P8-BE-NEXT: xxpermdi v2, vs1, vs0, 1
; CHECK-P8-BE-NEXT: blr
;
; CHECK-P9-VECTOR-LABEL: testi0:
; CHECK-P9-VECTOR: # %bb.0:
; CHECK-P9-VECTOR-NEXT: lxvd2x vs0, 0, r3
-; CHECK-P9-VECTOR-NEXT: lfdx f1, 0, r4
+; CHECK-P9-VECTOR-NEXT: lfd f1, 0(r4)
; CHECK-P9-VECTOR-NEXT: xxswapd vs0, vs0
; CHECK-P9-VECTOR-NEXT: xxmrghd v2, vs0, vs1
; CHECK-P9-VECTOR-NEXT: blr
@@ -57,7 +57,7 @@ define <2 x double> @testi1(<2 x double>* %p1, double* %p2) {
; CHECK-LABEL: testi1:
; CHECK: # %bb.0:
; CHECK-NEXT: lxvd2x vs0, 0, r3
-; CHECK-NEXT: lfdx f1, 0, r4
+; CHECK-NEXT: lfd f1, 0(r4)
; CHECK-NEXT: xxswapd vs0, vs0
; CHECK-NEXT: xxpermdi v2, vs1, vs0, 1
; CHECK-NEXT: blr
@@ -65,14 +65,14 @@ define <2 x double> @testi1(<2 x double>* %p1, double* %p2) {
; CHECK-P8-BE-LABEL: testi1:
; CHECK-P8-BE: # %bb.0:
; CHECK-P8-BE-NEXT: lxvd2x vs0, 0, r3
-; CHECK-P8-BE-NEXT: lfdx f1, 0, r4
+; CHECK-P8-BE-NEXT: lfd f1, 0(r4)
; CHECK-P8-BE-NEXT: xxmrghd v2, vs0, vs1
; CHECK-P8-BE-NEXT: blr
;
; CHECK-P9-VECTOR-LABEL: testi1:
; CHECK-P9-VECTOR: # %bb.0:
; CHECK-P9-VECTOR-NEXT: lxvd2x vs0, 0, r3
-; CHECK-P9-VECTOR-NEXT: lfdx f1, 0, r4
+; CHECK-P9-VECTOR-NEXT: lfd f1, 0(r4)
; CHECK-P9-VECTOR-NEXT: xxswapd vs0, vs0
; CHECK-P9-VECTOR-NEXT: xxpermdi v2, vs1, vs0, 1
; CHECK-P9-VECTOR-NEXT: blr
@@ -100,7 +100,7 @@ define double @teste0(<2 x double>* %p1) {
;
; CHECK-P8-BE-LABEL: teste0:
; CHECK-P8-BE: # %bb.0:
-; CHECK-P8-BE-NEXT: lfdx f1, 0, r3
+; CHECK-P8-BE-NEXT: lfd f1, 0(r3)
; CHECK-P8-BE-NEXT: blr
;
; CHECK-P9-VECTOR-LABEL: teste0:
diff --git a/llvm/test/CodeGen/PowerPC/vsx_scalar_ld_st.ll b/llvm/test/CodeGen/PowerPC/vsx_scalar_ld_st.ll
index d09b2146e726..2244523c5705 100644
--- a/llvm/test/CodeGen/PowerPC/vsx_scalar_ld_st.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx_scalar_ld_st.ll
@@ -123,7 +123,7 @@ entry:
store volatile float %conv, float* %ff, align 4
ret void
; CHECK-LABEL: @dblToFloat
-; CHECK: lfdx [[REGLD5:[0-9]+]],
+; CHECK: lfd [[REGLD5:[0-9]+]],
; CHECK: stfs [[REGLD5]],
; CHECK-P9-LABEL: @dblToFloat
; CHECK-P9: lfd [[REGLD5:[0-9]+]],
@@ -139,7 +139,7 @@ entry:
store volatile double %conv, double* %dd, align 8
ret void
; CHECK-LABEL: @floatToDbl
-; CHECK: lfsx [[REGLD5:[0-9]+]],
+; CHECK: lfs [[REGLD5:[0-9]+]],
; CHECK: stfd [[REGLD5]],
; CHECK-P9-LABEL: @floatToDbl
; CHECK-P9: lfs [[REGLD5:[0-9]+]],
More information about the llvm-commits
mailing list