[PATCH] D106072: [AMDGPU][MC] Added missing isCall/isBranch flags
Dmitry Preobrazhensky via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 16 04:57:37 PDT 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG09c9f4dc7db2: [AMDGPU][MC] Added missing isCall/isBranch flags (authored by dp).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D106072/new/
https://reviews.llvm.org/D106072
Files:
llvm/lib/Target/AMDGPU/SOPInstructions.td
Index: llvm/lib/Target/AMDGPU/SOPInstructions.td
===================================================================
--- llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -729,6 +729,8 @@
let SchedRW = ps.SchedRW;
let mayLoad = ps.mayLoad;
let mayStore = ps.mayStore;
+ let isBranch = ps.isBranch;
+ let isCall = ps.isCall;
// encoding
bits<7> sdst;
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