[llvm] 77f2f0f - [llvm-mca][JSON] Store extra information about driver flags used for the simulation

Marcos Horro via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 16 00:19:04 PDT 2021


Author: Marcos Horro
Date: 2021-07-16T09:18:40+02:00
New Revision: 77f2f0f9b7c7c1bd56879c86a0c63ffdd5e8166e

URL: https://github.com/llvm/llvm-project/commit/77f2f0f9b7c7c1bd56879c86a0c63ffdd5e8166e
DIFF: https://github.com/llvm/llvm-project/commit/77f2f0f9b7c7c1bd56879c86a0c63ffdd5e8166e.diff

LOG: [llvm-mca][JSON] Store extra information about driver flags used for the simulation

Added information stored in PipelineOptions and the MCSubtargetInfo.

Bug: https://bugs.llvm.org/show_bug.cgi?id=51041

Reviewed By: andreadb

Differential Revision: https://reviews.llvm.org/D106077

Added: 
    llvm/test/tools/llvm-mca/JSON/X86/views-custom-parameters.s

Modified: 
    llvm/test/tools/llvm-mca/JSON/X86/instruction-tables-multiple-anonymous-regions.s
    llvm/test/tools/llvm-mca/JSON/X86/instruction-tables-multiple-regions.s
    llvm/test/tools/llvm-mca/JSON/X86/views-multiple-anonymous-regions.s
    llvm/test/tools/llvm-mca/JSON/X86/views-multiple-region.s
    llvm/test/tools/llvm-mca/JSON/X86/views.s
    llvm/tools/llvm-mca/PipelinePrinter.cpp
    llvm/tools/llvm-mca/PipelinePrinter.h
    llvm/tools/llvm-mca/llvm-mca.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/test/tools/llvm-mca/JSON/X86/instruction-tables-multiple-anonymous-regions.s b/llvm/test/tools/llvm-mca/JSON/X86/instruction-tables-multiple-anonymous-regions.s
index e3e90f65a9fe9..949ff706dbbc0 100644
--- a/llvm/test/tools/llvm-mca/JSON/X86/instruction-tables-multiple-anonymous-regions.s
+++ b/llvm/test/tools/llvm-mca/JSON/X86/instruction-tables-multiple-anonymous-regions.s
@@ -238,6 +238,11 @@ add %edx, %edx
 # CHECK-NEXT:       }
 # CHECK-NEXT:     }
 # CHECK-NEXT:   ],
+# CHECK-NEXT:   "SimulationParameters": {
+# CHECK-NEXT:     "-march": "x86_64",
+# CHECK-NEXT:     "-mcpu": "haswell",
+# CHECK-NEXT:     "-mtriple": "x86_64-unknown-unknown"
+# CHECK-NEXT:   },
 # CHECK-NEXT:   "TargetInfo": {
 # CHECK-NEXT:     "CPUName": "haswell",
 # CHECK-NEXT:     "Resources": [

diff  --git a/llvm/test/tools/llvm-mca/JSON/X86/instruction-tables-multiple-regions.s b/llvm/test/tools/llvm-mca/JSON/X86/instruction-tables-multiple-regions.s
index 4942a713f22c8..bc0bd0aafa966 100644
--- a/llvm/test/tools/llvm-mca/JSON/X86/instruction-tables-multiple-regions.s
+++ b/llvm/test/tools/llvm-mca/JSON/X86/instruction-tables-multiple-regions.s
@@ -263,6 +263,11 @@ add %edx, %edx
 # CHECK-NEXT:       }
 # CHECK-NEXT:     }
 # CHECK-NEXT:   ],
+# CHECK-NEXT:   "SimulationParameters": {
+# CHECK-NEXT:     "-march": "x86_64",
+# CHECK-NEXT:     "-mcpu": "haswell",
+# CHECK-NEXT:     "-mtriple": "x86_64-unknown-unknown"
+# CHECK-NEXT:   },
 # CHECK-NEXT:   "TargetInfo": {
 # CHECK-NEXT:     "CPUName": "haswell",
 # CHECK-NEXT:     "Resources": [

diff  --git a/llvm/test/tools/llvm-mca/JSON/X86/views-custom-parameters.s b/llvm/test/tools/llvm-mca/JSON/X86/views-custom-parameters.s
new file mode 100644
index 0000000000000..1301c4acda832
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/JSON/X86/views-custom-parameters.s
@@ -0,0 +1,185 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# Verify that we create proper JSON for the MCA views TimelineView, ResourcePressureview,
+# InstructionInfoView and SummaryView.
+
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -lqueue=12 -squeue=12 --json --timeline-max-iterations=1 --timeline --all-stats --all-views < %s | FileCheck %s
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -lqueue=12 -squeue=12 --json --timeline-max-iterations=1 --timeline --all-stats --all-views -o %t.json < %s
+# RUN: cat %t.json \
+# RUN:  | %python -c 'import json, sys; json.dump(json.loads(sys.stdin.read()), sys.stdout, sort_keys=True, indent=2)' \
+# RUN:  | FileCheck %s
+
+add %eax, %eax
+add %ebx, %ebx
+add %ecx, %ecx
+add %edx, %edx
+
+# CHECK:      {
+# CHECK-NEXT:   "CodeRegions": [
+# CHECK-NEXT:     {
+# CHECK-NEXT:       "DispatchStatistics": {
+# CHECK-NEXT:         "GROUP": 0,
+# CHECK-NEXT:         "LQ": 0,
+# CHECK-NEXT:         "RAT": 0,
+# CHECK-NEXT:         "RCU": 0,
+# CHECK-NEXT:         "SCHEDQ": 0,
+# CHECK-NEXT:         "SQ": 0,
+# CHECK-NEXT:         "USH": 0
+# CHECK-NEXT:       },
+# CHECK-NEXT:       "InstructionInfoView": {
+# CHECK-NEXT:         "InstructionList": [
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "Instruction": 0,
+# CHECK-NEXT:             "Latency": 1,
+# CHECK-NEXT:             "NumMicroOpcodes": 1,
+# CHECK-NEXT:             "RThroughput": 0.25,
+# CHECK-NEXT:             "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:             "mayLoad": false,
+# CHECK-NEXT:             "mayStore": false
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "Instruction": 1,
+# CHECK-NEXT:             "Latency": 1,
+# CHECK-NEXT:             "NumMicroOpcodes": 1,
+# CHECK-NEXT:             "RThroughput": 0.25,
+# CHECK-NEXT:             "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:             "mayLoad": false,
+# CHECK-NEXT:             "mayStore": false
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "Instruction": 2,
+# CHECK-NEXT:             "Latency": 1,
+# CHECK-NEXT:             "NumMicroOpcodes": 1,
+# CHECK-NEXT:             "RThroughput": 0.25,
+# CHECK-NEXT:             "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:             "mayLoad": false,
+# CHECK-NEXT:             "mayStore": false
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "Instruction": 3,
+# CHECK-NEXT:             "Latency": 1,
+# CHECK-NEXT:             "NumMicroOpcodes": 1,
+# CHECK-NEXT:             "RThroughput": 0.25,
+# CHECK-NEXT:             "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:             "mayLoad": false,
+# CHECK-NEXT:             "mayStore": false
+# CHECK-NEXT:           }
+# CHECK-NEXT:         ]
+# CHECK-NEXT:       },
+# CHECK-NEXT:       "Instructions": [
+# CHECK-NEXT:         "addl\t%eax, %eax",
+# CHECK-NEXT:         "addl\t%ebx, %ebx",
+# CHECK-NEXT:         "addl\t%ecx, %ecx",
+# CHECK-NEXT:         "addl\t%edx, %edx"
+# CHECK-NEXT:       ],
+# CHECK-NEXT:       "Name": "",
+# CHECK-NEXT:       "ResourcePressureView": {
+# CHECK-NEXT:         "ResourcePressureInfo": [
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "InstructionIndex": 0,
+# CHECK-NEXT:             "ResourceIndex": 8,
+# CHECK-NEXT:             "ResourceUsage": 1
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "InstructionIndex": 1,
+# CHECK-NEXT:             "ResourceIndex": 7,
+# CHECK-NEXT:             "ResourceUsage": 1
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "InstructionIndex": 2,
+# CHECK-NEXT:             "ResourceIndex": 3,
+# CHECK-NEXT:             "ResourceUsage": 1
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "InstructionIndex": 3,
+# CHECK-NEXT:             "ResourceIndex": 2,
+# CHECK-NEXT:             "ResourceUsage": 1
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "InstructionIndex": 4,
+# CHECK-NEXT:             "ResourceIndex": 2,
+# CHECK-NEXT:             "ResourceUsage": 1
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "InstructionIndex": 4,
+# CHECK-NEXT:             "ResourceIndex": 3,
+# CHECK-NEXT:             "ResourceUsage": 1
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "InstructionIndex": 4,
+# CHECK-NEXT:             "ResourceIndex": 7,
+# CHECK-NEXT:             "ResourceUsage": 1
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "InstructionIndex": 4,
+# CHECK-NEXT:             "ResourceIndex": 8,
+# CHECK-NEXT:             "ResourceUsage": 1
+# CHECK-NEXT:           }
+# CHECK-NEXT:         ]
+# CHECK-NEXT:       },
+# CHECK-NEXT:       "SummaryView": {
+# CHECK-NEXT:         "BlockRThroughput": 1,
+# CHECK-NEXT:         "DispatchWidth": 4,
+# CHECK-NEXT:         "IPC": 3.883495145631068,
+# CHECK-NEXT:         "Instructions": 400,
+# CHECK-NEXT:         "Iterations": 100,
+# CHECK-NEXT:         "TotalCycles": 103,
+# CHECK-NEXT:         "TotaluOps": 400,
+# CHECK-NEXT:         "uOpsPerCycle": 3.883495145631068
+# CHECK-NEXT:       },
+# CHECK-NEXT:       "TimelineView": {
+# CHECK-NEXT:         "TimelineInfo": [
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "CycleDispatched": 0,
+# CHECK-NEXT:             "CycleExecuted": 2,
+# CHECK-NEXT:             "CycleIssued": 1,
+# CHECK-NEXT:             "CycleReady": 0,
+# CHECK-NEXT:             "CycleRetired": 3
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "CycleDispatched": 0,
+# CHECK-NEXT:             "CycleExecuted": 2,
+# CHECK-NEXT:             "CycleIssued": 1,
+# CHECK-NEXT:             "CycleReady": 0,
+# CHECK-NEXT:             "CycleRetired": 3
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "CycleDispatched": 0,
+# CHECK-NEXT:             "CycleExecuted": 2,
+# CHECK-NEXT:             "CycleIssued": 1,
+# CHECK-NEXT:             "CycleReady": 0,
+# CHECK-NEXT:             "CycleRetired": 3
+# CHECK-NEXT:           },
+# CHECK-NEXT:           {
+# CHECK-NEXT:             "CycleDispatched": 0,
+# CHECK-NEXT:             "CycleExecuted": 2,
+# CHECK-NEXT:             "CycleIssued": 1,
+# CHECK-NEXT:             "CycleReady": 0,
+# CHECK-NEXT:             "CycleRetired": 3
+# CHECK-NEXT:           }
+# CHECK-NEXT:         ]
+# CHECK-NEXT:       }
+# CHECK-NEXT:     }
+# CHECK-NEXT:   ],
+# CHECK-NEXT:   "SimulationParameters": {
+# CHECK-NEXT:     "-lqueue": 12,
+# CHECK-NEXT:     "-march": "x86_64",
+# CHECK-NEXT:     "-mcpu": "haswell",
+# CHECK-NEXT:     "-mtriple": "x86_64-unknown-unknown",
+# CHECK-NEXT:     "-squeue": 12
+# CHECK-NEXT:   },
+# CHECK-NEXT:   "TargetInfo": {
+# CHECK-NEXT:     "CPUName": "haswell",
+# CHECK-NEXT:     "Resources": [
+# CHECK-NEXT:       "HWDivider",
+# CHECK-NEXT:       "HWFPDivider",
+# CHECK-NEXT:       "HWPort0",
+# CHECK-NEXT:       "HWPort1",
+# CHECK-NEXT:       "HWPort2",
+# CHECK-NEXT:       "HWPort3",
+# CHECK-NEXT:       "HWPort4",
+# CHECK-NEXT:       "HWPort5",
+# CHECK-NEXT:       "HWPort6",
+# CHECK-NEXT:       "HWPort7"
+# CHECK-NEXT:     ]
+# CHECK-NEXT:   }
+# CHECK-NEXT: }

diff  --git a/llvm/test/tools/llvm-mca/JSON/X86/views-multiple-anonymous-regions.s b/llvm/test/tools/llvm-mca/JSON/X86/views-multiple-anonymous-regions.s
index fe7941bdb5e98..8cd8d41a6ff65 100644
--- a/llvm/test/tools/llvm-mca/JSON/X86/views-multiple-anonymous-regions.s
+++ b/llvm/test/tools/llvm-mca/JSON/X86/views-multiple-anonymous-regions.s
@@ -567,6 +567,11 @@ add %edx, %edx
 # CHECK-NEXT:       }
 # CHECK-NEXT:     }
 # CHECK-NEXT:   ],
+# CHECK-NEXT:   "SimulationParameters": {
+# CHECK-NEXT:     "-march": "x86_64",
+# CHECK-NEXT:     "-mcpu": "haswell",
+# CHECK-NEXT:     "-mtriple": "x86_64-unknown-unknown"
+# CHECK-NEXT:   },
 # CHECK-NEXT:   "TargetInfo": {
 # CHECK-NEXT:     "CPUName": "haswell",
 # CHECK-NEXT:     "Resources": [

diff  --git a/llvm/test/tools/llvm-mca/JSON/X86/views-multiple-region.s b/llvm/test/tools/llvm-mca/JSON/X86/views-multiple-region.s
index 95424cc6d30d9..0b7bb16beeb91 100644
--- a/llvm/test/tools/llvm-mca/JSON/X86/views-multiple-region.s
+++ b/llvm/test/tools/llvm-mca/JSON/X86/views-multiple-region.s
@@ -274,6 +274,11 @@ add %edx, %edx
 # CHECK-NEXT:       }
 # CHECK-NEXT:     }
 # CHECK-NEXT:   ],
+# CHECK-NEXT:   "SimulationParameters": {
+# CHECK-NEXT:     "-march": "x86_64",
+# CHECK-NEXT:     "-mcpu": "haswell",
+# CHECK-NEXT:     "-mtriple": "x86_64-unknown-unknown"
+# CHECK-NEXT:   },
 # CHECK-NEXT:   "TargetInfo": {
 # CHECK-NEXT:     "CPUName": "haswell",
 # CHECK-NEXT:     "Resources": [

diff  --git a/llvm/test/tools/llvm-mca/JSON/X86/views.s b/llvm/test/tools/llvm-mca/JSON/X86/views.s
index 50ec80e63f2ae..df85f2203f314 100644
--- a/llvm/test/tools/llvm-mca/JSON/X86/views.s
+++ b/llvm/test/tools/llvm-mca/JSON/X86/views.s
@@ -160,6 +160,11 @@ add %edx, %edx
 # CHECK-NEXT:       }
 # CHECK-NEXT:     }
 # CHECK-NEXT:   ],
+# CHECK-NEXT:   "SimulationParameters": {
+# CHECK-NEXT:     "-march": "x86_64",
+# CHECK-NEXT:     "-mcpu": "haswell",
+# CHECK-NEXT:     "-mtriple": "x86_64-unknown-unknown"
+# CHECK-NEXT:   },
 # CHECK-NEXT:   "TargetInfo": {
 # CHECK-NEXT:     "CPUName": "haswell",
 # CHECK-NEXT:     "Resources": [

diff  --git a/llvm/tools/llvm-mca/PipelinePrinter.cpp b/llvm/tools/llvm-mca/PipelinePrinter.cpp
index 4f86ab4258335..955b825891fa8 100644
--- a/llvm/tools/llvm-mca/PipelinePrinter.cpp
+++ b/llvm/tools/llvm-mca/PipelinePrinter.cpp
@@ -45,6 +45,39 @@ json::Object PipelinePrinter::getJSONReportRegion() const {
   return JO;
 }
 
+json::Object PipelinePrinter::getJSONSimulationParameters() const {
+  json::Object SimParameters({{"-mcpu", STI.getCPU()},
+                              {"-mtriple", STI.getTargetTriple().getTriple()},
+                              {"-march", STI.getTargetTriple().getArchName()}});
+
+  const MCSchedModel &SM = STI.getSchedModel();
+  if (!SM.isOutOfOrder())
+    return SimParameters;
+
+  if (PO.RegisterFileSize)
+    SimParameters.try_emplace("-register-file-size", PO.RegisterFileSize);
+
+  if (!PO.AssumeNoAlias)
+    SimParameters.try_emplace("-noalias", PO.AssumeNoAlias);
+
+  if (PO.DecodersThroughput)
+    SimParameters.try_emplace("-decoder-throughput", PO.DecodersThroughput);
+
+  if (PO.MicroOpQueueSize)
+    SimParameters.try_emplace("-micro-op-queue-size", PO.MicroOpQueueSize);
+
+  if (PO.DispatchWidth)
+    SimParameters.try_emplace("-dispatch", PO.DispatchWidth);
+
+  if (PO.LoadQueueSize)
+    SimParameters.try_emplace("-lqueue", PO.LoadQueueSize);
+
+  if (PO.StoreQueueSize)
+    SimParameters.try_emplace("-squeue", PO.StoreQueueSize);
+
+  return SimParameters;
+}
+
 json::Object PipelinePrinter::getJSONTargetInfo() const {
   json::Array Resources;
   const MCSchedModel &SM = STI.getSchedModel();
@@ -71,10 +104,9 @@ json::Object PipelinePrinter::getJSONTargetInfo() const {
 }
 
 void PipelinePrinter::printReport(json::Object &JO) const {
-  if (!RegionIdx)
-    JO.try_emplace("TargetInfo", getJSONTargetInfo());
-
   if (!RegionIdx) {
+    JO.try_emplace("TargetInfo", getJSONTargetInfo());
+    JO.try_emplace("SimulationParameters", getJSONSimulationParameters());
     // Construct an array of regions.
     JO.try_emplace("CodeRegions", json::Array());
   }

diff  --git a/llvm/tools/llvm-mca/PipelinePrinter.h b/llvm/tools/llvm-mca/PipelinePrinter.h
index e0b54dec5af1b..1365f75be0f5a 100644
--- a/llvm/tools/llvm-mca/PipelinePrinter.h
+++ b/llvm/tools/llvm-mca/PipelinePrinter.h
@@ -19,6 +19,7 @@
 #include "Views/View.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MCA/Context.h"
 #include "llvm/MCA/Pipeline.h"
 #include "llvm/Support/raw_ostream.h"
 
@@ -41,16 +42,18 @@ class PipelinePrinter {
   const CodeRegion &Region;
   unsigned RegionIdx;
   const MCSubtargetInfo &STI;
+  const PipelineOptions &PO;
   llvm::SmallVector<std::unique_ptr<View>, 8> Views;
 
   void printRegionHeader(llvm::raw_ostream &OS) const;
   json::Object getJSONReportRegion() const;
   json::Object getJSONTargetInfo() const;
+  json::Object getJSONSimulationParameters() const;
 
 public:
   PipelinePrinter(Pipeline &Pipe, const CodeRegion &R, unsigned Idx,
-                  const MCSubtargetInfo &STI)
-      : P(Pipe), Region(R), RegionIdx(Idx), STI(STI), Views() {}
+                  const MCSubtargetInfo &STI, const PipelineOptions &PO)
+      : P(Pipe), Region(R), RegionIdx(Idx), STI(STI), PO(PO), Views() {}
 
   void addView(std::unique_ptr<View> V) {
     P.addEventListener(V.get());

diff  --git a/llvm/tools/llvm-mca/llvm-mca.cpp b/llvm/tools/llvm-mca/llvm-mca.cpp
index a1557337e22e4..a473cd8f1719e 100644
--- a/llvm/tools/llvm-mca/llvm-mca.cpp
+++ b/llvm/tools/llvm-mca/llvm-mca.cpp
@@ -569,7 +569,7 @@ int main(int argc, char **argv) {
       P->appendStage(std::make_unique<mca::EntryStage>(S));
       P->appendStage(std::make_unique<mca::InstructionTables>(SM));
 
-      mca::PipelinePrinter Printer(*P, *Region, RegionIdx, *STI);
+      mca::PipelinePrinter Printer(*P, *Region, RegionIdx, *STI, PO);
       if (PrintJson) {
         Printer.addView(
             std::make_unique<mca::InstructionView>(*STI, *IP, Insts));
@@ -608,7 +608,7 @@ int main(int argc, char **argv) {
     // Create a basic pipeline simulating an out-of-order backend.
     auto P = MCA.createDefaultPipeline(PO, S, *CB);
 
-    mca::PipelinePrinter Printer(*P, *Region, RegionIdx, *STI);
+    mca::PipelinePrinter Printer(*P, *Region, RegionIdx, *STI, PO);
 
     // When we output JSON, we add a view that contains the instructions
     // and CPU resource information.


        


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