[llvm] 46c8e71 - [AArch64][GlobalISel] Clamp <n x p0> vecs when legalizing G_EXTRACT_VECTOR_ELT

[Jessica Paquette via llvm-commits]

Author: Jessica Paquette
Date: 2021-07-15T14:05:28-07:00
New Revision: 46c8e7122b51960fa1ba100d3efca26411a8aacb

URL: https://github.com/llvm/llvm-project/commit/46c8e7122b51960fa1ba100d3efca26411a8aacb
DIFF: https://github.com/llvm/llvm-project/commit/46c8e7122b51960fa1ba100d3efca26411a8aacb.diff

LOG: [AArch64][GlobalISel] Clamp <n x p0> vecs when legalizing G_EXTRACT_VECTOR_ELT

This case was missing from G_EXTRACT_VECTOR_ELT. It's the same as for s64.

https://godbolt.org/z/Tnq4acY8z

Differential Revision: https://reviews.llvm.org/D105952

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 153bc59470cd..59ba2754a71a 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -650,7 +650,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
       .minScalarOrElt(0, s8) // Worst case, we need at least s8.
       .clampMaxNumElements(1, s64, 2)
       .clampMaxNumElements(1, s32, 4)
-      .clampMaxNumElements(1, s16, 8);
+      .clampMaxNumElements(1, s16, 8)
+      .clampMaxNumElements(1, p0, 2);
 
   getActionDefinitionsBuilder(G_INSERT_VECTOR_ELT)
       .legalIf(typeInSet(0, {v8s16, v2s32, v4s32, v2s64}));

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
index bc90237e736e..1272d29c2ddc 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=aarch64-linux-gnu -O0 -run-pass=legalizer %s -o - -global-isel-abort=1 | FileCheck %s
+# RUN: llc -mtriple=aarch64-linux-gnu -O0 -run-pass=legalizer -global-isel-abort=0 -verify-machineinstrs %s -o - | FileCheck %s
 
 ---
 name:            test_eve_1
@@ -245,3 +245,40 @@ body: |
     $w0 = COPY %ext(s32)
     RET_ReallyLR
 ...
+---
+name:            test_eve_v4p0
+body: |
+  bb.0:
+    liveins: $x0
+    ; CHECK-LABEL: name: test_eve_v4p0
+    ; CHECK: [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
+    ; CHECK: %idx:_(s64) = G_CONSTANT i64 1
+    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[DEF]](p0), [[DEF]](p0)
+    ; CHECK: %eve:_(p0) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<2 x p0>), %idx(s64)
+    ; CHECK: $x0 = COPY %eve(p0)
+    ; CHECK: RET_ReallyLR
+    %vec:_(<4 x p0>) = G_IMPLICIT_DEF
+    %idx:_(s64) = G_CONSTANT i64 1
+    %eve:_(p0) = G_EXTRACT_VECTOR_ELT %vec:_(<4 x p0>), %idx:_(s64)
+    $x0 = COPY %eve(p0)
+    RET_ReallyLR
+...
+---
+name:            cant_legalize_
diff erent_address_spaces
+body: |
+  bb.0:
+    liveins: $x0
+    ; Make sure that the pointer legalization rules don't apply when we have
+    ; 
diff erent address spaces.
+
+    ; CHECK-LABEL: name: cant_legalize_
diff erent_address_spaces
+    ; CHECK: %vec:_(<4 x p1>) = G_IMPLICIT_DEF
+    ; CHECK: %idx:_(s64) = G_CONSTANT i64 1
+    ; CHECK: %eve:_(p0) = G_EXTRACT_VECTOR_ELT %vec(<4 x p1>), %idx(s64)
+    ; CHECK: $x0 = COPY %eve(p0)
+    ; CHECK: RET_ReallyLR
+    %vec:_(<4 x p1>) = G_IMPLICIT_DEF
+    %idx:_(s64) = G_CONSTANT i64 1
+    %eve:_(p0) = G_EXTRACT_VECTOR_ELT %vec:_(<4 x p1>), %idx:_(s64)
+    $x0 = COPY %eve(p0)
+    RET_ReallyLR