[PATCH] D105566: [AArch64][SME] Support .arch and .arch_extension assembler directives

[Cullen Rhodes via Phabricator via llvm-commits]

c-rhodes updated this revision to Diff 358961.
c-rhodes added reviewers: sdesmalen, david-arm, kmclaughlin, CarolineConcatto.
c-rhodes added a comment.

Add support for f64/i64 features.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105566/new/

https://reviews.llvm.org/D105566

Files:
  llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  llvm/test/MC/AArch64/SME/directives-negative.s
  llvm/test/MC/AArch64/SME/directives.s


Index: llvm/test/MC/AArch64/SME/directives.s
===================================================================
--- /dev/null
+++ llvm/test/MC/AArch64/SME/directives.s
@@ -0,0 +1,35 @@
+// RUN: llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.arch_extension sme
+smstart
+// CHECK: smstart
+
+.arch_extension nosme
+
+.arch_extension sme-f64
+fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+// CHECK: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+
+.arch_extension nosme-f64
+
+.arch_extension sme-i64
+addha za0.d, p0/m, p0/m, z0.d
+// CHECK: addha za0.d, p0/m, p0/m, z0.d
+
+.arch_extension nosme-i64
+
+.arch armv8-a+sme
+smstart
+// CHECK: smstart
+
+.arch armv8-a+nosme
+
+.arch armv8-a+sme-f64
+fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+// CHECK: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+
+.arch armv8-a+nosme-f64
+
+.arch armv8-a+sme-i64
+addha za0.d, p0/m, p0/m, z0.d
+// CHECK: addha za0.d, p0/m, p0/m, z0.d
Index: llvm/test/MC/AArch64/SME/directives-negative.s
===================================================================
--- /dev/null
+++ llvm/test/MC/AArch64/SME/directives-negative.s
@@ -0,0 +1,37 @@
+// RUN: not llvm-mc -triple aarch64 -o - %s 2>&1 | FileCheck %s
+
+.arch_extension sme
+.arch_extension nosme
+smstart
+// CHECK: error: instruction requires: sme
+// CHECK-NEXT: smstart
+
+.arch_extension sme-f64
+.arch_extension nosme-f64
+fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+// CHECK: error: instruction requires: sme-f64
+// CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+
+.arch_extension sme-i64
+.arch_extension nosme-i64
+addha za0.d, p0/m, p0/m, z0.d
+// CHECK: error: instruction requires: sme-i64
+// CHECK-NEXT: addha za0.d, p0/m, p0/m, z0.d
+
+.arch armv8-a+sme
+.arch armv8-a+nosme
+smstart
+// CHECK: error: instruction requires: sme
+// CHECK-NEXT: smstart
+
+.arch armv8-a+sme-f64
+.arch armv8-a+nosme-f64
+fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+// CHECK: error: instruction requires: sme-f64
+// CHECK-NEXT: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
+
+.arch armv8-a+sme-i64
+.arch armv8-a+nosme-i64
+addha za0.d, p0/m, p0/m, z0.d
+// CHECK: error: instruction requires: sme-i64
+// CHECK-NEXT: addha za0.d, p0/m, p0/m, z0.d
Index: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
===================================================================
--- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3308,6 +3308,9 @@
     {"pauth", {AArch64::FeaturePAuth}},
     {"flagm", {AArch64::FeatureFlagM}},
     {"rme", {AArch64::FeatureRME}},
+    {"sme", {AArch64::FeatureSME}},
+    {"sme-f64", {AArch64::FeatureSMEF64}},
+    {"sme-i64", {AArch64::FeatureSMEI64}},
     // FIXME: Unsupported extensions
     {"lor", {}},
     {"rdma", {}},


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