[llvm] 91e1514 - [TTI] Consistently make getMinVectorRegisterBitWidth() methods const. NFCI.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2021-07-15T13:27:55+01:00
New Revision: 91e151476c75ebad640a62b469328e7184f45ef2

URL: https://github.com/llvm/llvm-project/commit/91e151476c75ebad640a62b469328e7184f45ef2
DIFF: https://github.com/llvm/llvm-project/commit/91e151476c75ebad640a62b469328e7184f45ef2.diff

LOG: [TTI] Consistently make getMinVectorRegisterBitWidth() methods const. NFCI.

The underlying getMinVectorRegisterBitWidth() methods are const, but it was missed in a couple of TargetTransformInfo wrappers.

Noticed while working on D103925

Added: 
    

Modified: 
    llvm/include/llvm/Analysis/TargetTransformInfo.h
    llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h

Removed: 
    


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diff  --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index b4b3736c36d5..208f0fcd3178 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -1535,7 +1535,7 @@ class TargetTransformInfo::Concept {
                                            Type *Ty = nullptr) const = 0;
   virtual const char *getRegisterClassName(unsigned ClassID) const = 0;
   virtual TypeSize getRegisterBitWidth(RegisterKind K) const = 0;
-  virtual unsigned getMinVectorRegisterBitWidth() = 0;
+  virtual unsigned getMinVectorRegisterBitWidth() const = 0;
   virtual Optional<unsigned> getMaxVScale() const = 0;
   virtual bool shouldMaximizeVectorBandwidth() const = 0;
   virtual ElementCount getMinimumVF(unsigned ElemWidth,
@@ -1982,7 +1982,7 @@ class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
   TypeSize getRegisterBitWidth(RegisterKind K) const override {
     return Impl.getRegisterBitWidth(K);
   }
-  unsigned getMinVectorRegisterBitWidth() override {
+  unsigned getMinVectorRegisterBitWidth() const override {
     return Impl.getMinVectorRegisterBitWidth();
   }
   Optional<unsigned> getMaxVScale() const override {

diff  --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
index 1de650bd3220..27563d3cd0a3 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
@@ -121,7 +121,7 @@ class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
     llvm_unreachable("Unsupported register kind");
   }
 
-  unsigned getMinVectorRegisterBitWidth() {
+  unsigned getMinVectorRegisterBitWidth() const {
     return ST->getMinVectorRegisterBitWidth();
   }