[compiler-rt] cadbb92 - [TSan] Align thread_registry_placeholder

[Ilya Leoshkevich via llvm-commits]

Author: Ilya Leoshkevich
Date: 2021-07-15T12:18:47+02:00
New Revision: cadbb9241627eefc9f589ae4376fd9ed3e272ecc

URL: https://github.com/llvm/llvm-project/commit/cadbb9241627eefc9f589ae4376fd9ed3e272ecc
DIFF: https://github.com/llvm/llvm-project/commit/cadbb9241627eefc9f589ae4376fd9ed3e272ecc.diff

LOG: [TSan] Align thread_registry_placeholder

s390x requires ThreadRegistry.mtx_.opaque_storage_ to be 4-byte
aligned. Since other architectures may have similar requirements, use
the maximum thread_registry_placeholder alignment from other
sanitizers, which is 64 (LSan).

Reviewed By: dvyukov

Differential Revision: https://reviews.llvm.org/D105629

Added: 
    

Modified: 
    compiler-rt/lib/tsan/rtl/tsan_rtl.cpp

Removed: 
    


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diff  --git a/compiler-rt/lib/tsan/rtl/tsan_rtl.cpp b/compiler-rt/lib/tsan/rtl/tsan_rtl.cpp
index e704cbde1dbe..7f769d017935 100644
--- a/compiler-rt/lib/tsan/rtl/tsan_rtl.cpp
+++ b/compiler-rt/lib/tsan/rtl/tsan_rtl.cpp
@@ -77,7 +77,7 @@ void OnInitialize() {
 }
 #endif
 
-static char thread_registry_placeholder[sizeof(ThreadRegistry)];
+static ALIGNED(64) char thread_registry_placeholder[sizeof(ThreadRegistry)];
 
 static ThreadContextBase *CreateThreadContext(u32 tid) {
   // Map thread trace when context is created.