[llvm] 122b022 - [WebAssembly] Remove datalayout strings from llc tests
Thomas Lively via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 14 11:17:25 PDT 2021
Author: Thomas Lively
Date: 2021-07-14T11:17:08-07:00
New Revision: 122b0220fd45ee71acda912b0b712bb8edb6ba46
URL: https://github.com/llvm/llvm-project/commit/122b0220fd45ee71acda912b0b712bb8edb6ba46
DIFF: https://github.com/llvm/llvm-project/commit/122b0220fd45ee71acda912b0b712bb8edb6ba46.diff
LOG: [WebAssembly] Remove datalayout strings from llc tests
The data layout strings do not have any effect on llc tests and will become
misleadingly out of date as we continue to update the canonical data layout, so
remove them from the tests.
Differential Revision: https://reviews.llvm.org/D105842
Added:
Modified:
llvm/test/CodeGen/WebAssembly/PR40172.ll
llvm/test/CodeGen/WebAssembly/PR40267.ll
llvm/test/CodeGen/WebAssembly/PR41149.ll
llvm/test/CodeGen/WebAssembly/PR41841.ll
llvm/test/CodeGen/WebAssembly/address-offsets.ll
llvm/test/CodeGen/WebAssembly/atomic-fence.ll
llvm/test/CodeGen/WebAssembly/atomic-fence.mir
llvm/test/CodeGen/WebAssembly/atomic-mem-consistency.ll
llvm/test/CodeGen/WebAssembly/atomic-pic.ll
llvm/test/CodeGen/WebAssembly/atomic-rmw.ll
llvm/test/CodeGen/WebAssembly/bulk-memory.ll
llvm/test/CodeGen/WebAssembly/bulk-memory64.ll
llvm/test/CodeGen/WebAssembly/byval.ll
llvm/test/CodeGen/WebAssembly/call-indirect.ll
llvm/test/CodeGen/WebAssembly/call-pic.ll
llvm/test/CodeGen/WebAssembly/call.ll
llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.mir
llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
llvm/test/CodeGen/WebAssembly/clear-cache.ll
llvm/test/CodeGen/WebAssembly/comparisons-f32.ll
llvm/test/CodeGen/WebAssembly/comparisons-f64.ll
llvm/test/CodeGen/WebAssembly/comparisons-i32.ll
llvm/test/CodeGen/WebAssembly/comparisons-i64.ll
llvm/test/CodeGen/WebAssembly/conv-trap.ll
llvm/test/CodeGen/WebAssembly/conv.ll
llvm/test/CodeGen/WebAssembly/copysign-casts.ll
llvm/test/CodeGen/WebAssembly/custom-sections.ll
llvm/test/CodeGen/WebAssembly/dbgvalue.ll
llvm/test/CodeGen/WebAssembly/dead-vreg.ll
llvm/test/CodeGen/WebAssembly/debugtest-opt.ll
llvm/test/CodeGen/WebAssembly/debugtrap.ll
llvm/test/CodeGen/WebAssembly/divrem-constant.ll
llvm/test/CodeGen/WebAssembly/eh-lsda.ll
llvm/test/CodeGen/WebAssembly/exception.ll
llvm/test/CodeGen/WebAssembly/exception.mir
llvm/test/CodeGen/WebAssembly/export-name.ll
llvm/test/CodeGen/WebAssembly/f16.ll
llvm/test/CodeGen/WebAssembly/f32.ll
llvm/test/CodeGen/WebAssembly/f64.ll
llvm/test/CodeGen/WebAssembly/fast-isel-br-i1.ll
llvm/test/CodeGen/WebAssembly/fast-isel-call-indirect64.ll
llvm/test/CodeGen/WebAssembly/fast-isel-i24.ll
llvm/test/CodeGen/WebAssembly/fast-isel-i256.ll
llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll
llvm/test/CodeGen/WebAssembly/fast-isel-pr47040.ll
llvm/test/CodeGen/WebAssembly/fast-isel.ll
llvm/test/CodeGen/WebAssembly/frem.ll
llvm/test/CodeGen/WebAssembly/func.ll
llvm/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll
llvm/test/CodeGen/WebAssembly/function-bitcasts.ll
llvm/test/CodeGen/WebAssembly/function-info.mir
llvm/test/CodeGen/WebAssembly/function-pointer64.ll
llvm/test/CodeGen/WebAssembly/global.ll
llvm/test/CodeGen/WebAssembly/global_dtors.ll
llvm/test/CodeGen/WebAssembly/globl.ll
llvm/test/CodeGen/WebAssembly/i128-returned.ll
llvm/test/CodeGen/WebAssembly/i128.ll
llvm/test/CodeGen/WebAssembly/i32-load-store-alignment.ll
llvm/test/CodeGen/WebAssembly/i32.ll
llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll
llvm/test/CodeGen/WebAssembly/i64.ll
llvm/test/CodeGen/WebAssembly/ident.ll
llvm/test/CodeGen/WebAssembly/immediates.ll
llvm/test/CodeGen/WebAssembly/implicit-def.ll
llvm/test/CodeGen/WebAssembly/import-module.ll
llvm/test/CodeGen/WebAssembly/indirect-import.ll
llvm/test/CodeGen/WebAssembly/inline-asm-m.ll
llvm/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll
llvm/test/CodeGen/WebAssembly/inline-asm.ll
llvm/test/CodeGen/WebAssembly/irreducible-cfg-exceptions.ll
llvm/test/CodeGen/WebAssembly/irreducible-cfg.ll
llvm/test/CodeGen/WebAssembly/irreducible-cfg.mir
llvm/test/CodeGen/WebAssembly/legalize.ll
llvm/test/CodeGen/WebAssembly/libcalls.ll
llvm/test/CodeGen/WebAssembly/load-store-static.ll
llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll
llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
llvm/test/CodeGen/WebAssembly/lower-em-sjlj-sret.ll
llvm/test/CodeGen/WebAssembly/lower-global-dtors.ll
llvm/test/CodeGen/WebAssembly/main-declaration.ll
llvm/test/CodeGen/WebAssembly/main-no-args.ll
llvm/test/CodeGen/WebAssembly/main-three-args.ll
llvm/test/CodeGen/WebAssembly/main-with-args.ll
llvm/test/CodeGen/WebAssembly/masked-shifts.ll
llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll
llvm/test/CodeGen/WebAssembly/memory-addr32.ll
llvm/test/CodeGen/WebAssembly/memory-addr64.ll
llvm/test/CodeGen/WebAssembly/muloti4.ll
llvm/test/CodeGen/WebAssembly/multi-return.ll
llvm/test/CodeGen/WebAssembly/multivalue-stackify.ll
llvm/test/CodeGen/WebAssembly/multivalue-stackify.py
llvm/test/CodeGen/WebAssembly/multivalue.ll
llvm/test/CodeGen/WebAssembly/mutable-globals.ll
llvm/test/CodeGen/WebAssembly/negative-base-reg.ll
llvm/test/CodeGen/WebAssembly/null-streamer.ll
llvm/test/CodeGen/WebAssembly/offset-atomics.ll
llvm/test/CodeGen/WebAssembly/offset-fastisel.ll
llvm/test/CodeGen/WebAssembly/offset-folding.ll
llvm/test/CodeGen/WebAssembly/offset.ll
llvm/test/CodeGen/WebAssembly/phi.ll
llvm/test/CodeGen/WebAssembly/pr47375.ll
llvm/test/CodeGen/WebAssembly/reference-types.ll
llvm/test/CodeGen/WebAssembly/reg-stackify.ll
llvm/test/CodeGen/WebAssembly/return-address-emscripten.ll
llvm/test/CodeGen/WebAssembly/return-address-unknown.ll
llvm/test/CodeGen/WebAssembly/return-int32.ll
llvm/test/CodeGen/WebAssembly/return-void.ll
llvm/test/CodeGen/WebAssembly/returned.ll
llvm/test/CodeGen/WebAssembly/select.ll
llvm/test/CodeGen/WebAssembly/signext-arg.ll
llvm/test/CodeGen/WebAssembly/signext-inreg.ll
llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
llvm/test/CodeGen/WebAssembly/simd-arith.ll
llvm/test/CodeGen/WebAssembly/simd-bitcasts.ll
llvm/test/CodeGen/WebAssembly/simd-build-pair.ll
llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
llvm/test/CodeGen/WebAssembly/simd-comparisons.ll
llvm/test/CodeGen/WebAssembly/simd-concat.ll
llvm/test/CodeGen/WebAssembly/simd-conversions.ll
llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll
llvm/test/CodeGen/WebAssembly/simd-extending.ll
llvm/test/CodeGen/WebAssembly/simd-illegal-signext.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll
llvm/test/CodeGen/WebAssembly/simd-load-splat.ll
llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll
llvm/test/CodeGen/WebAssembly/simd-load-zero-offset.ll
llvm/test/CodeGen/WebAssembly/simd-nested-shuffles.ll
llvm/test/CodeGen/WebAssembly/simd-nonconst-sext.ll
llvm/test/CodeGen/WebAssembly/simd-offset.ll
llvm/test/CodeGen/WebAssembly/simd-reductions.ll
llvm/test/CodeGen/WebAssembly/simd-scalar-to-vector.ll
llvm/test/CodeGen/WebAssembly/simd-select.ll
llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll
llvm/test/CodeGen/WebAssembly/simd-shift-complex-splats.ll
llvm/test/CodeGen/WebAssembly/simd-shuffle-bitcast.ll
llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
llvm/test/CodeGen/WebAssembly/simd.ll
llvm/test/CodeGen/WebAssembly/snan_literal.ll
llvm/test/CodeGen/WebAssembly/stack-insts.ll
llvm/test/CodeGen/WebAssembly/store.ll
llvm/test/CodeGen/WebAssembly/swiftcc.ll
llvm/test/CodeGen/WebAssembly/switch-in-loop.ll
llvm/test/CodeGen/WebAssembly/switch-unreachable-default.ll
llvm/test/CodeGen/WebAssembly/tailcall.ll
llvm/test/CodeGen/WebAssembly/target-features-tls.ll
llvm/test/CodeGen/WebAssembly/target-features.ll
llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
llvm/test/CodeGen/WebAssembly/tls-local-exec.ll
llvm/test/CodeGen/WebAssembly/umulo-i64.ll
llvm/test/CodeGen/WebAssembly/unreachable.ll
llvm/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll
llvm/test/CodeGen/WebAssembly/unused-argument.ll
llvm/test/CodeGen/WebAssembly/vector-sdiv.ll
llvm/test/CodeGen/WebAssembly/vtable.ll
llvm/test/CodeGen/WebAssembly/weak.ll
llvm/test/MC/WebAssembly/array-fill.ll
llvm/test/MC/WebAssembly/assembler-binary.ll
llvm/test/MC/WebAssembly/comdat-sections.ll
llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll
llvm/test/MC/WebAssembly/debug-byval-struct.ll
llvm/test/MC/WebAssembly/debug-localvar.ll
llvm/test/MC/WebAssembly/file-headers.ll
llvm/test/MC/WebAssembly/function-alias.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/WebAssembly/PR40172.ll b/llvm/test/CodeGen/WebAssembly/PR40172.ll
index e0ad5be8b219e..752f3e4dfbb2c 100644
--- a/llvm/test/CodeGen/WebAssembly/PR40172.ll
+++ b/llvm/test/CodeGen/WebAssembly/PR40172.ll
@@ -6,7 +6,6 @@
; test case FastISel falls back to DAG ISel, which combines away the
; comparison, invalidating FastISel's assumption.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK: i32.sub $[[BASE:[0-9]+]]=,
diff --git a/llvm/test/CodeGen/WebAssembly/PR40267.ll b/llvm/test/CodeGen/WebAssembly/PR40267.ll
index 5773d08da74da..12d2bcaf2aa30 100644
--- a/llvm/test/CodeGen/WebAssembly/PR40267.ll
+++ b/llvm/test/CodeGen/WebAssembly/PR40267.ll
@@ -5,7 +5,6 @@
; that SIMD is not enabled for this test. Check only that llc does not
; crash, since it would previously trigger an assertion.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @foo() {
diff --git a/llvm/test/CodeGen/WebAssembly/PR41149.ll b/llvm/test/CodeGen/WebAssembly/PR41149.ll
index e53adf87e89fe..6a8dee1906f1b 100644
--- a/llvm/test/CodeGen/WebAssembly/PR41149.ll
+++ b/llvm/test/CodeGen/WebAssembly/PR41149.ll
@@ -24,4 +24,3 @@ define void @mod() {
store <4 x i8> %tmp4, <4 x i8>* undef
ret void
}
-
diff --git a/llvm/test/CodeGen/WebAssembly/PR41841.ll b/llvm/test/CodeGen/WebAssembly/PR41841.ll
index 6ebaadac13eed..4e3166adf7bb1 100644
--- a/llvm/test/CodeGen/WebAssembly/PR41841.ll
+++ b/llvm/test/CodeGen/WebAssembly/PR41841.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -O0 -wasm-disable-explicit-locals -wasm-keep-registers -asm-verbose=false | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @foo(i128)
diff --git a/llvm/test/CodeGen/WebAssembly/address-offsets.ll b/llvm/test/CodeGen/WebAssembly/address-offsets.ll
index f84b377c1a155..3ddc952d85281 100644
--- a/llvm/test/CodeGen/WebAssembly/address-offsets.ll
+++ b/llvm/test/CodeGen/WebAssembly/address-offsets.ll
@@ -4,7 +4,6 @@
; Test folding constant offsets and symbols into load and store addresses under
; a variety of circumstances.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-emscripten"
@g = external global [0 x i32], align 4
diff --git a/llvm/test/CodeGen/WebAssembly/atomic-fence.ll b/llvm/test/CodeGen/WebAssembly/atomic-fence.ll
index 43a1a66f9762f..8fed309bcce00 100644
--- a/llvm/test/CodeGen/WebAssembly/atomic-fence.ll
+++ b/llvm/test/CodeGen/WebAssembly/atomic-fence.ll
@@ -1,7 +1,6 @@
; RUN: llc < %s | FileCheck %s --check-prefix NOATOMIC
; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; A multithread fence is lowered to an atomic.fence instruction.
diff --git a/llvm/test/CodeGen/WebAssembly/atomic-fence.mir b/llvm/test/CodeGen/WebAssembly/atomic-fence.mir
index 610118c8818d4..5bfe85cd59244 100644
--- a/llvm/test/CodeGen/WebAssembly/atomic-fence.mir
+++ b/llvm/test/CodeGen/WebAssembly/atomic-fence.mir
@@ -7,7 +7,6 @@
# local.get are inserted to save and load memory.atomic.notify's return value.
--- |
- target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @foo(i32, i32)
diff --git a/llvm/test/CodeGen/WebAssembly/atomic-mem-consistency.ll b/llvm/test/CodeGen/WebAssembly/atomic-mem-consistency.ll
index c2cb02acc1ee5..ed2fc6fcf8440 100644
--- a/llvm/test/CodeGen/WebAssembly/atomic-mem-consistency.ll
+++ b/llvm/test/CodeGen/WebAssembly/atomic-mem-consistency.ll
@@ -5,7 +5,6 @@
; consistent, so even if LLVM IR specifies weaker orderings than that, we
; should upgrade them to sequential ordering and treat them in the same way.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
;===----------------------------------------------------------------------------
diff --git a/llvm/test/CodeGen/WebAssembly/atomic-pic.ll b/llvm/test/CodeGen/WebAssembly/atomic-pic.ll
index 2c4f922b7f9da..8f2014873fbfd 100644
--- a/llvm/test/CodeGen/WebAssembly/atomic-pic.ll
+++ b/llvm/test/CodeGen/WebAssembly/atomic-pic.ll
@@ -5,7 +5,6 @@
; that atomic operations on global address load addres via @GOT or
; @MBREL relocations.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-emscripten"
@external_global = external global i32
diff --git a/llvm/test/CodeGen/WebAssembly/atomic-rmw.ll b/llvm/test/CodeGen/WebAssembly/atomic-rmw.ll
index 34f505b7d6b47..f391f40d68ce0 100644
--- a/llvm/test/CodeGen/WebAssembly/atomic-rmw.ll
+++ b/llvm/test/CodeGen/WebAssembly/atomic-rmw.ll
@@ -3,7 +3,6 @@
; Test atomic RMW (read-modify-write) instructions are assembled properly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
;===----------------------------------------------------------------------------
diff --git a/llvm/test/CodeGen/WebAssembly/bulk-memory.ll b/llvm/test/CodeGen/WebAssembly/bulk-memory.ll
index 89ea7e8f826e2..f739f08f70715 100644
--- a/llvm/test/CodeGen/WebAssembly/bulk-memory.ll
+++ b/llvm/test/CodeGen/WebAssembly/bulk-memory.ll
@@ -3,7 +3,6 @@
; Test that basic bulk memory codegen works correctly
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @llvm.memcpy.p0i8.p0i8.i8(i8*, i8*, i8, i1)
diff --git a/llvm/test/CodeGen/WebAssembly/bulk-memory64.ll b/llvm/test/CodeGen/WebAssembly/bulk-memory64.ll
index 6c450f5b53982..eaf9a9659429e 100644
--- a/llvm/test/CodeGen/WebAssembly/bulk-memory64.ll
+++ b/llvm/test/CodeGen/WebAssembly/bulk-memory64.ll
@@ -3,7 +3,6 @@
; Test that basic bulk memory codegen works correctly
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm64-unknown-unknown"
declare void @llvm.memcpy.p0i8.p0i8.i8(i8*, i8*, i8, i1)
diff --git a/llvm/test/CodeGen/WebAssembly/byval.ll b/llvm/test/CodeGen/WebAssembly/byval.ll
index b3b6884fbd0bb..fb6355fdc7c6d 100644
--- a/llvm/test/CodeGen/WebAssembly/byval.ll
+++ b/llvm/test/CodeGen/WebAssembly/byval.ll
@@ -1,7 +1,6 @@
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs -fast-isel | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
%SmallStruct = type { i32 }
diff --git a/llvm/test/CodeGen/WebAssembly/call-indirect.ll b/llvm/test/CodeGen/WebAssembly/call-indirect.ll
index 57e754ccb3be7..7a174318d4732 100644
--- a/llvm/test/CodeGen/WebAssembly/call-indirect.ll
+++ b/llvm/test/CodeGen/WebAssembly/call-indirect.ll
@@ -4,7 +4,6 @@
; Test that compilation units with call_indirect but without any
; function pointer declarations still get a table.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: call_indirect_void:
diff --git a/llvm/test/CodeGen/WebAssembly/call-pic.ll b/llvm/test/CodeGen/WebAssembly/call-pic.ll
index 9bb505dd1f73e..5a5fd056849d9 100644
--- a/llvm/test/CodeGen/WebAssembly/call-pic.ll
+++ b/llvm/test/CodeGen/WebAssembly/call-pic.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -relocation-model=pic -fast-isel=1 | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -relocation-model=pic -fast-isel=0 | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-emscripten"
declare i32 @foo()
diff --git a/llvm/test/CodeGen/WebAssembly/call.ll b/llvm/test/CodeGen/WebAssembly/call.ll
index b082ba0c3da6c..307e87d894e7b 100644
--- a/llvm/test/CodeGen/WebAssembly/call.ll
+++ b/llvm/test/CodeGen/WebAssembly/call.ll
@@ -5,7 +5,6 @@
; Test that basic call operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i32 @i32_nullary()
diff --git a/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll b/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
index 3e7ef1b3c29ea..28ae7be6eda71 100644
--- a/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
+++ b/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
@@ -5,7 +5,6 @@
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -disable-block-placement -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 -exception-model=wasm -mattr=+exception-handling -wasm-disable-ehpad-sort -stats 2>&1 | FileCheck %s --check-prefix=NOSORT
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -disable-block-placement -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 -exception-model=wasm -mattr=+exception-handling -wasm-disable-ehpad-sort | FileCheck %s --check-prefix=NOSORT-LOCALS
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
@_ZTIi = external constant i8*
diff --git a/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.mir b/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.mir
index fd75e0b6f142c..873273db45415 100644
--- a/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.mir
+++ b/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.mir
@@ -1,7 +1,6 @@
# RUN: llc -mtriple=wasm32-unknown-unknown -exception-model=wasm -mattr=+exception-handling -run-pass wasm-cfg-stackify %s -o - | FileCheck %s
--- |
- target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i32 @__gxx_wasm_personality_v0(...)
diff --git a/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll b/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
index ff04ddc247eac..6e0bbce78a1ae 100644
--- a/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
+++ b/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
@@ -5,7 +5,6 @@
; Explicitly disable fast-isel, since it gets implicitly enabled in the
; optnone test.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @something()
diff --git a/llvm/test/CodeGen/WebAssembly/clear-cache.ll b/llvm/test/CodeGen/WebAssembly/clear-cache.ll
index 4e1aee438ebe7..0fc379cb8ac91 100644
--- a/llvm/test/CodeGen/WebAssembly/clear-cache.ll
+++ b/llvm/test/CodeGen/WebAssembly/clear-cache.ll
@@ -1,6 +1,5 @@
; RUN: not --crash llc < %s -asm-verbose=false 2>&1 | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK: LLVM ERROR: llvm.clear_cache is not supported on wasm
diff --git a/llvm/test/CodeGen/WebAssembly/comparisons-f32.ll b/llvm/test/CodeGen/WebAssembly/comparisons-f32.ll
index abd26e947b502..f4144f86e7066 100644
--- a/llvm/test/CodeGen/WebAssembly/comparisons-f32.ll
+++ b/llvm/test/CodeGen/WebAssembly/comparisons-f32.ll
@@ -3,7 +3,6 @@
; Test that basic 32-bit floating-point comparison operations assemble as
; expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f32:
diff --git a/llvm/test/CodeGen/WebAssembly/comparisons-f64.ll b/llvm/test/CodeGen/WebAssembly/comparisons-f64.ll
index 4d84c02a68e2b..03a85f4e7b8d0 100644
--- a/llvm/test/CodeGen/WebAssembly/comparisons-f64.ll
+++ b/llvm/test/CodeGen/WebAssembly/comparisons-f64.ll
@@ -3,7 +3,6 @@
; Test that basic 64-bit floating-point comparison operations assemble as
; expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f64:
diff --git a/llvm/test/CodeGen/WebAssembly/comparisons-i32.ll b/llvm/test/CodeGen/WebAssembly/comparisons-i32.ll
index ed884e751b2cd..0fb021c4dc104 100644
--- a/llvm/test/CodeGen/WebAssembly/comparisons-i32.ll
+++ b/llvm/test/CodeGen/WebAssembly/comparisons-i32.ll
@@ -3,7 +3,6 @@
; Test that basic 32-bit integer comparison operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i32:
diff --git a/llvm/test/CodeGen/WebAssembly/comparisons-i64.ll b/llvm/test/CodeGen/WebAssembly/comparisons-i64.ll
index 899cc063f5041..57ab8a9bf0319 100644
--- a/llvm/test/CodeGen/WebAssembly/comparisons-i64.ll
+++ b/llvm/test/CodeGen/WebAssembly/comparisons-i64.ll
@@ -3,7 +3,6 @@
; Test that basic 64-bit integer comparison operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i64:
diff --git a/llvm/test/CodeGen/WebAssembly/conv-trap.ll b/llvm/test/CodeGen/WebAssembly/conv-trap.ll
index 67519ee68fd5f..0906743374b93 100644
--- a/llvm/test/CodeGen/WebAssembly/conv-trap.ll
+++ b/llvm/test/CodeGen/WebAssembly/conv-trap.ll
@@ -3,7 +3,6 @@
; Test that basic conversion operations assemble as expected using
; the trapping opcodes and explicit code to suppress the trapping.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: i32_trunc_s_f32:
diff --git a/llvm/test/CodeGen/WebAssembly/conv.ll b/llvm/test/CodeGen/WebAssembly/conv.ll
index 5699c7b9adc5b..cf76548aad17d 100644
--- a/llvm/test/CodeGen/WebAssembly/conv.ll
+++ b/llvm/test/CodeGen/WebAssembly/conv.ll
@@ -2,7 +2,6 @@
; Test that basic conversion operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: i32_wrap_i64:
diff --git a/llvm/test/CodeGen/WebAssembly/copysign-casts.ll b/llvm/test/CodeGen/WebAssembly/copysign-casts.ll
index 51aeb86bfad89..9a284675d48f0 100644
--- a/llvm/test/CodeGen/WebAssembly/copysign-casts.ll
+++ b/llvm/test/CodeGen/WebAssembly/copysign-casts.ll
@@ -3,7 +3,6 @@
; DAGCombiner oddly folds casts into the rhs of copysign. Test that they get
; unfolded.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare double @copysign(double, double) nounwind readnone
diff --git a/llvm/test/CodeGen/WebAssembly/custom-sections.ll b/llvm/test/CodeGen/WebAssembly/custom-sections.ll
index 78fe3c5458fdb..b959cd1d9003d 100644
--- a/llvm/test/CodeGen/WebAssembly/custom-sections.ll
+++ b/llvm/test/CodeGen/WebAssembly/custom-sections.ll
@@ -2,7 +2,6 @@
; Test the mechanism for defining user custom sections.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
!0 = !{ !"red", !"foo" }
diff --git a/llvm/test/CodeGen/WebAssembly/dbgvalue.ll b/llvm/test/CodeGen/WebAssembly/dbgvalue.ll
index 6c9e5ef4a1af0..78a1114a62355 100644
--- a/llvm/test/CodeGen/WebAssembly/dbgvalue.ll
+++ b/llvm/test/CodeGen/WebAssembly/dbgvalue.ll
@@ -5,7 +5,6 @@
; CHECK: %bb.1
; CHECK: DW_TAG_variable
source_filename = "test/CodeGen/WebAssembly/dbgvalue.ll"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
@key = external local_unnamed_addr global [15 x i8], align 1
@@ -69,4 +68,3 @@ attributes #0 = { nounwind readnone }
!25 = !DILocation(line: 15, column: 17, scope: !15)
!26 = !DILocation(line: 16, column: 3, scope: !15)
!27 = !DILocation(line: 17, column: 3, scope: !15)
-
diff --git a/llvm/test/CodeGen/WebAssembly/dead-vreg.ll b/llvm/test/CodeGen/WebAssembly/dead-vreg.ll
index c1b9ad6700d42..61023dcf1275a 100644
--- a/llvm/test/CodeGen/WebAssembly/dead-vreg.ll
+++ b/llvm/test/CodeGen/WebAssembly/dead-vreg.ll
@@ -2,7 +2,6 @@
; Check that unused vregs aren't assigned registers.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @foo(i32* nocapture %a, i32 %w, i32 %h) {
diff --git a/llvm/test/CodeGen/WebAssembly/debugtest-opt.ll b/llvm/test/CodeGen/WebAssembly/debugtest-opt.ll
index 20e0a9c614781..790471cf028ed 100644
--- a/llvm/test/CodeGen/WebAssembly/debugtest-opt.ll
+++ b/llvm/test/CodeGen/WebAssembly/debugtest-opt.ll
@@ -17,7 +17,6 @@
; ModuleID = 'debugtest-opt.c'
source_filename = "debugtest-opt.c"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32"
@globl = hidden local_unnamed_addr global i32* null, align 4, !dbg !0
diff --git a/llvm/test/CodeGen/WebAssembly/debugtrap.ll b/llvm/test/CodeGen/WebAssembly/debugtrap.ll
index 27504ac6443d0..9dcd15676a497 100644
--- a/llvm/test/CodeGen/WebAssembly/debugtrap.ll
+++ b/llvm/test/CodeGen/WebAssembly/debugtrap.ll
@@ -4,7 +4,6 @@
; the normal UNREACHABLE instruction would yield invalid
; MachineFunctions.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32"
declare void @llvm.debugtrap()
diff --git a/llvm/test/CodeGen/WebAssembly/divrem-constant.ll b/llvm/test/CodeGen/WebAssembly/divrem-constant.ll
index 29aac381951d3..14fe5b448da5b 100644
--- a/llvm/test/CodeGen/WebAssembly/divrem-constant.ll
+++ b/llvm/test/CodeGen/WebAssembly/divrem-constant.ll
@@ -2,7 +2,6 @@
; Test that integer div and rem by constant are optimized appropriately.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: test_udiv_2:
diff --git a/llvm/test/CodeGen/WebAssembly/eh-lsda.ll b/llvm/test/CodeGen/WebAssembly/eh-lsda.ll
index 7d1f8bed107f4..1572adc4d4201 100644
--- a/llvm/test/CodeGen/WebAssembly/eh-lsda.ll
+++ b/llvm/test/CodeGen/WebAssembly/eh-lsda.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling | FileCheck -allow-deprecated-dag-overlap %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
@_ZTIi = external constant i8*
diff --git a/llvm/test/CodeGen/WebAssembly/exception.ll b/llvm/test/CodeGen/WebAssembly/exception.ll
index 4fab09af195f5..aa99e53720a7b 100644
--- a/llvm/test/CodeGen/WebAssembly/exception.ll
+++ b/llvm/test/CodeGen/WebAssembly/exception.ll
@@ -2,7 +2,6 @@
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling -verify-machineinstrs -O0
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
%struct.Temp = type { i8 }
diff --git a/llvm/test/CodeGen/WebAssembly/exception.mir b/llvm/test/CodeGen/WebAssembly/exception.mir
index 744d15a83d22a..a83fe0285c3d3 100644
--- a/llvm/test/CodeGen/WebAssembly/exception.mir
+++ b/llvm/test/CodeGen/WebAssembly/exception.mir
@@ -1,7 +1,6 @@
# RUN: llc -mtriple=wasm32-unknown-unknown -exception-model=wasm -mattr=+exception-handling -run-pass wasm-late-eh-prepare -run-pass wasm-cfg-stackify %s -o - | FileCheck %s
--- |
- target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i32 @__gxx_wasm_personality_v0(...)
diff --git a/llvm/test/CodeGen/WebAssembly/export-name.ll b/llvm/test/CodeGen/WebAssembly/export-name.ll
index d1d4c2115ebeb..9941520f21918 100644
--- a/llvm/test/CodeGen/WebAssembly/export-name.ll
+++ b/llvm/test/CodeGen/WebAssembly/export-name.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @test() #0 {
diff --git a/llvm/test/CodeGen/WebAssembly/f16.ll b/llvm/test/CodeGen/WebAssembly/f16.ll
index aa5a6477241ca..b67c0c16d4651 100644
--- a/llvm/test/CodeGen/WebAssembly/f16.ll
+++ b/llvm/test/CodeGen/WebAssembly/f16.ll
@@ -3,7 +3,6 @@
; Test that f16 is expanded.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: demote.f32:
diff --git a/llvm/test/CodeGen/WebAssembly/f32.ll b/llvm/test/CodeGen/WebAssembly/f32.ll
index f9fbb8973780d..1a75245b6f183 100644
--- a/llvm/test/CodeGen/WebAssembly/f32.ll
+++ b/llvm/test/CodeGen/WebAssembly/f32.ll
@@ -2,7 +2,6 @@
; Test that basic 32-bit floating-point operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare float @llvm.fabs.f32(float)
diff --git a/llvm/test/CodeGen/WebAssembly/f64.ll b/llvm/test/CodeGen/WebAssembly/f64.ll
index 2dd072df58002..138044f06ac09 100644
--- a/llvm/test/CodeGen/WebAssembly/f64.ll
+++ b/llvm/test/CodeGen/WebAssembly/f64.ll
@@ -2,7 +2,6 @@
; Test that basic 64-bit floating-point operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare double @llvm.fabs.f64(double)
diff --git a/llvm/test/CodeGen/WebAssembly/fast-isel-br-i1.ll b/llvm/test/CodeGen/WebAssembly/fast-isel-br-i1.ll
index 0870655a1a6ce..493314eef8c04 100644
--- a/llvm/test/CodeGen/WebAssembly/fast-isel-br-i1.ll
+++ b/llvm/test/CodeGen/WebAssembly/fast-isel-br-i1.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -fast-isel -asm-verbose=false -wasm-keep-registers | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; Fast-isel uses a 32-bit xor with -1 to negate i1 values, because it doesn't
diff --git a/llvm/test/CodeGen/WebAssembly/fast-isel-call-indirect64.ll b/llvm/test/CodeGen/WebAssembly/fast-isel-call-indirect64.ll
index f82b05fc10856..adbf3aa94dc06 100644
--- a/llvm/test/CodeGen/WebAssembly/fast-isel-call-indirect64.ll
+++ b/llvm/test/CodeGen/WebAssembly/fast-isel-call-indirect64.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -fast-isel --mtriple=wasm64 -asm-verbose=false -wasm-keep-registers | FileCheck %s
-target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
target triple = "wasm64"
; Ensure fast isel also lowers function pointers to 32-bit.
diff --git a/llvm/test/CodeGen/WebAssembly/fast-isel-i24.ll b/llvm/test/CodeGen/WebAssembly/fast-isel-i24.ll
index dddf2c4ff2dc6..b952a58a4368d 100644
--- a/llvm/test/CodeGen/WebAssembly/fast-isel-i24.ll
+++ b/llvm/test/CodeGen/WebAssembly/fast-isel-i24.ll
@@ -4,7 +4,6 @@
; Test that fast-isel properly copes with i24 arguments and return types.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: add:
diff --git a/llvm/test/CodeGen/WebAssembly/fast-isel-i256.ll b/llvm/test/CodeGen/WebAssembly/fast-isel-i256.ll
index a916a87d346d5..811fed3112828 100644
--- a/llvm/test/CodeGen/WebAssembly/fast-isel-i256.ll
+++ b/llvm/test/CodeGen/WebAssembly/fast-isel-i256.ll
@@ -4,7 +4,6 @@
; Test that fast-isel properly copes with i256 arguments and return types.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: add:
diff --git a/llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll b/llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll
index 60d38d6f5a710..1bc87d7c82eed 100644
--- a/llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll
+++ b/llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll
@@ -3,7 +3,6 @@
; Test that FastISel does not generate instructions with NoReg
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK: i32.const $push0=, 0
diff --git a/llvm/test/CodeGen/WebAssembly/fast-isel-pr47040.ll b/llvm/test/CodeGen/WebAssembly/fast-isel-pr47040.ll
index 616ce295d7f2f..61dfeecb00d10 100644
--- a/llvm/test/CodeGen/WebAssembly/fast-isel-pr47040.ll
+++ b/llvm/test/CodeGen/WebAssembly/fast-isel-pr47040.ll
@@ -9,7 +9,6 @@
; to set the Address to be relative to a register instead, triggering
; an assertion.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define i32 @foo() {
diff --git a/llvm/test/CodeGen/WebAssembly/fast-isel.ll b/llvm/test/CodeGen/WebAssembly/fast-isel.ll
index fa9bf247a4092..cd134b100e051 100644
--- a/llvm/test/CodeGen/WebAssembly/fast-isel.ll
+++ b/llvm/test/CodeGen/WebAssembly/fast-isel.ll
@@ -3,7 +3,6 @@
; RUN: -wasm-disable-explicit-locals -wasm-keep-registers \
; RUN: | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; This tests very minimal fast-isel functionality.
diff --git a/llvm/test/CodeGen/WebAssembly/frem.ll b/llvm/test/CodeGen/WebAssembly/frem.ll
index 117c299aa8401..c86970d604894 100644
--- a/llvm/test/CodeGen/WebAssembly/frem.ll
+++ b/llvm/test/CodeGen/WebAssembly/frem.ll
@@ -2,7 +2,6 @@
; Test that the frem instruction works.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: frem32:
diff --git a/llvm/test/CodeGen/WebAssembly/func.ll b/llvm/test/CodeGen/WebAssembly/func.ll
index 13a1cf2d513ab..97518ffa3ce41 100644
--- a/llvm/test/CodeGen/WebAssembly/func.ll
+++ b/llvm/test/CodeGen/WebAssembly/func.ll
@@ -2,7 +2,6 @@
; Test that basic functions assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: f0:
diff --git a/llvm/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll b/llvm/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll
index 01f0cb9039b62..235078acf5b29 100644
--- a/llvm/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll
+++ b/llvm/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll
@@ -3,7 +3,6 @@
; Test that function pointer casts casting away varargs are replaced with
; wrappers.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @callWithArgs() {
diff --git a/llvm/test/CodeGen/WebAssembly/function-bitcasts.ll b/llvm/test/CodeGen/WebAssembly/function-bitcasts.ll
index 8ff0a4d0d94ad..36cd5d8094e61 100644
--- a/llvm/test/CodeGen/WebAssembly/function-bitcasts.ll
+++ b/llvm/test/CodeGen/WebAssembly/function-bitcasts.ll
@@ -2,7 +2,6 @@
; Test that function pointer casts are replaced with wrappers.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @has_i32_arg(i32) {
diff --git a/llvm/test/CodeGen/WebAssembly/function-info.mir b/llvm/test/CodeGen/WebAssembly/function-info.mir
index 7453d24418902..1569884f6d97b 100644
--- a/llvm/test/CodeGen/WebAssembly/function-info.mir
+++ b/llvm/test/CodeGen/WebAssembly/function-info.mir
@@ -1,7 +1,6 @@
# RUN: llc -mtriple=wasm32-unknown-unknown -exception-model=wasm -mattr=+exception-handling,+multivalue,+simd128 -run-pass wasm-cfg-sort -run-pass wasm-cfg-stackify %s -o - | FileCheck %s
--- |
- target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i32 @__gxx_wasm_personality_v0(...)
diff --git a/llvm/test/CodeGen/WebAssembly/function-pointer64.ll b/llvm/test/CodeGen/WebAssembly/function-pointer64.ll
index 21b2a8e17147b..7c7b9e00c3f59 100644
--- a/llvm/test/CodeGen/WebAssembly/function-pointer64.ll
+++ b/llvm/test/CodeGen/WebAssembly/function-pointer64.ll
@@ -4,7 +4,6 @@
; This tests pointer features that may codegen
diff erently in wasm64.
-target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
target triple = "wasm64-unknown-unknown"
define void @bar(i32 %n) {
diff --git a/llvm/test/CodeGen/WebAssembly/global.ll b/llvm/test/CodeGen/WebAssembly/global.ll
index f0bd1a2ce312b..f5fefc3916848 100644
--- a/llvm/test/CodeGen/WebAssembly/global.ll
+++ b/llvm/test/CodeGen/WebAssembly/global.ll
@@ -3,7 +3,6 @@
; Test that globals assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-NOT: llvm.used
diff --git a/llvm/test/CodeGen/WebAssembly/global_dtors.ll b/llvm/test/CodeGen/WebAssembly/global_dtors.ll
index 9321dc511d4e9..3abe80deb5690 100644
--- a/llvm/test/CodeGen/WebAssembly/global_dtors.ll
+++ b/llvm/test/CodeGen/WebAssembly/global_dtors.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; Check that we do not crash when attempting to lower away
diff --git a/llvm/test/CodeGen/WebAssembly/globl.ll b/llvm/test/CodeGen/WebAssembly/globl.ll
index 7f9f81d7beb37..23a99330fcfc1 100644
--- a/llvm/test/CodeGen/WebAssembly/globl.ll
+++ b/llvm/test/CodeGen/WebAssembly/globl.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK: .globl foo
diff --git a/llvm/test/CodeGen/WebAssembly/i128-returned.ll b/llvm/test/CodeGen/WebAssembly/i128-returned.ll
index 619cb141974d7..7dedb1c90df6d 100644
--- a/llvm/test/CodeGen/WebAssembly/i128-returned.ll
+++ b/llvm/test/CodeGen/WebAssembly/i128-returned.ll
@@ -3,7 +3,6 @@
; Test that the "returned" attribute works with i128 types.
; PR36128
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i128 @bar(i128 returned)
@@ -17,4 +16,3 @@ define i128 @foo(i128) {
; CHECK-LABEL: foo:
; CHECK-NEXT: .functype foo (i32, i64, i64) -> ()
-
diff --git a/llvm/test/CodeGen/WebAssembly/i128.ll b/llvm/test/CodeGen/WebAssembly/i128.ll
index 1c6c132d50fdb..6be1457b149d8 100644
--- a/llvm/test/CodeGen/WebAssembly/i128.ll
+++ b/llvm/test/CodeGen/WebAssembly/i128.ll
@@ -2,7 +2,6 @@
; Test that basic 128-bit integer operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i128 @llvm.ctlz.i128(i128, i1)
diff --git a/llvm/test/CodeGen/WebAssembly/i32-load-store-alignment.ll b/llvm/test/CodeGen/WebAssembly/i32-load-store-alignment.ll
index cff7fc7faf6d5..082b1083ee55f 100644
--- a/llvm/test/CodeGen/WebAssembly/i32-load-store-alignment.ll
+++ b/llvm/test/CodeGen/WebAssembly/i32-load-store-alignment.ll
@@ -2,7 +2,6 @@
; Test loads and stores with custom alignment values.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
;===----------------------------------------------------------------------------
diff --git a/llvm/test/CodeGen/WebAssembly/i32.ll b/llvm/test/CodeGen/WebAssembly/i32.ll
index 897e4114f5565..be5f779ae8102 100644
--- a/llvm/test/CodeGen/WebAssembly/i32.ll
+++ b/llvm/test/CodeGen/WebAssembly/i32.ll
@@ -2,7 +2,6 @@
; Test that basic 32-bit integer operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i32 @llvm.ctlz.i32(i32, i1)
diff --git a/llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll b/llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll
index 5af843bcbaacb..3128180d1d624 100644
--- a/llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll
+++ b/llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll
@@ -2,7 +2,6 @@
; Test loads and stores with custom alignment values.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
;===----------------------------------------------------------------------------
diff --git a/llvm/test/CodeGen/WebAssembly/i64.ll b/llvm/test/CodeGen/WebAssembly/i64.ll
index 9ac52f97afac2..c93f43080c409 100644
--- a/llvm/test/CodeGen/WebAssembly/i64.ll
+++ b/llvm/test/CodeGen/WebAssembly/i64.ll
@@ -2,7 +2,6 @@
; Test that basic 64-bit integer operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i64 @llvm.ctlz.i64(i64, i1)
diff --git a/llvm/test/CodeGen/WebAssembly/ident.ll b/llvm/test/CodeGen/WebAssembly/ident.ll
index 8f00e94da1f43..f05ce67a36160 100644
--- a/llvm/test/CodeGen/WebAssembly/ident.ll
+++ b/llvm/test/CodeGen/WebAssembly/ident.ll
@@ -2,7 +2,6 @@
; Test llvm.ident.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK: .ident "hello world"
diff --git a/llvm/test/CodeGen/WebAssembly/immediates.ll b/llvm/test/CodeGen/WebAssembly/immediates.ll
index 33d55ab45613c..1aa2deeb05234 100644
--- a/llvm/test/CodeGen/WebAssembly/immediates.ll
+++ b/llvm/test/CodeGen/WebAssembly/immediates.ll
@@ -7,7 +7,6 @@
; Test that basic immediates assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: zero_i32:
diff --git a/llvm/test/CodeGen/WebAssembly/implicit-def.ll b/llvm/test/CodeGen/WebAssembly/implicit-def.ll
index c41e7844a637a..6c5cbab889ad8 100644
--- a/llvm/test/CodeGen/WebAssembly/implicit-def.ll
+++ b/llvm/test/CodeGen/WebAssembly/implicit-def.ll
@@ -1,6 +1,5 @@
; RUN: llc -o - %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -mattr=+simd128 | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; Test that stackified IMPLICIT_DEF instructions are converted into
diff --git a/llvm/test/CodeGen/WebAssembly/import-module.ll b/llvm/test/CodeGen/WebAssembly/import-module.ll
index 0cf0f2f25e0b9..1d423fbf5426d 100644
--- a/llvm/test/CodeGen/WebAssembly/import-module.ll
+++ b/llvm/test/CodeGen/WebAssembly/import-module.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @test() {
diff --git a/llvm/test/CodeGen/WebAssembly/indirect-import.ll b/llvm/test/CodeGen/WebAssembly/indirect-import.ll
index 986692c2200ce..4d00f420d4090 100644
--- a/llvm/test/CodeGen/WebAssembly/indirect-import.ll
+++ b/llvm/test/CodeGen/WebAssembly/indirect-import.ll
@@ -3,7 +3,6 @@
; ModuleID = 'test/dot_s/indirect-import.c'
source_filename = "test/dot_s/indirect-import.c"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32"
; CHECK: .functype extern_fd (f64) -> (f32)
@@ -76,5 +75,3 @@ declare i128 @extern_i128ret(i64) #1
attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" }
-
-
diff --git a/llvm/test/CodeGen/WebAssembly/inline-asm-m.ll b/llvm/test/CodeGen/WebAssembly/inline-asm-m.ll
index 97f7d8dda0c5a..5e30e23e33892 100644
--- a/llvm/test/CodeGen/WebAssembly/inline-asm-m.ll
+++ b/llvm/test/CodeGen/WebAssembly/inline-asm-m.ll
@@ -3,7 +3,6 @@
; Test basic inline assembly "m" operands, which are unsupported. Pass
; -no-integrated-as since these aren't actually valid assembly syntax.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @bar(i32* %r, i32* %s) {
diff --git a/llvm/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll b/llvm/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll
index 2f79cc88df6e0..a8f01629ec1a1 100644
--- a/llvm/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll
+++ b/llvm/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll
@@ -17,7 +17,6 @@
; return dst != 3;
; }
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: main:
@@ -40,4 +39,3 @@ entry:
%conv = zext i1 %cmp to i32
ret i32 %conv
}
-
diff --git a/llvm/test/CodeGen/WebAssembly/inline-asm.ll b/llvm/test/CodeGen/WebAssembly/inline-asm.ll
index aa8eb45d46f54..7a219febb59d5 100644
--- a/llvm/test/CodeGen/WebAssembly/inline-asm.ll
+++ b/llvm/test/CodeGen/WebAssembly/inline-asm.ll
@@ -3,7 +3,6 @@
; Test basic inline assembly. Pass -no-integrated-as since these aren't
; actually valid assembly syntax.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/WebAssembly/irreducible-cfg-exceptions.ll b/llvm/test/CodeGen/WebAssembly/irreducible-cfg-exceptions.ll
index 71ded152b215c..b948dbf01f38c 100644
--- a/llvm/test/CodeGen/WebAssembly/irreducible-cfg-exceptions.ll
+++ b/llvm/test/CodeGen/WebAssembly/irreducible-cfg-exceptions.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-block-placement -wasm-disable-explicit-locals -wasm-keep-registers -enable-emscripten-cxx-exceptions | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i32 @__gxx_personality_v0(...)
diff --git a/llvm/test/CodeGen/WebAssembly/irreducible-cfg.ll b/llvm/test/CodeGen/WebAssembly/irreducible-cfg.ll
index 00f396f947ad8..8277c2c9e144a 100644
--- a/llvm/test/CodeGen/WebAssembly/irreducible-cfg.ll
+++ b/llvm/test/CodeGen/WebAssembly/irreducible-cfg.ll
@@ -2,7 +2,6 @@
; Test irreducible CFG handling.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; A simple loop with two entries.
diff --git a/llvm/test/CodeGen/WebAssembly/irreducible-cfg.mir b/llvm/test/CodeGen/WebAssembly/irreducible-cfg.mir
index 7fd499b4dd251..af2f9b8137647 100644
--- a/llvm/test/CodeGen/WebAssembly/irreducible-cfg.mir
+++ b/llvm/test/CodeGen/WebAssembly/irreducible-cfg.mir
@@ -6,7 +6,6 @@
# for the entry should be generated right after the layout predecessor.
--- |
- target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @test0() {
diff --git a/llvm/test/CodeGen/WebAssembly/legalize.ll b/llvm/test/CodeGen/WebAssembly/legalize.ll
index 24b842513ddae..686bd23c9ff54 100644
--- a/llvm/test/CodeGen/WebAssembly/legalize.ll
+++ b/llvm/test/CodeGen/WebAssembly/legalize.ll
@@ -2,7 +2,6 @@
; Test various types and operators that need to be legalized.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: shl_i3:
diff --git a/llvm/test/CodeGen/WebAssembly/libcalls.ll b/llvm/test/CodeGen/WebAssembly/libcalls.ll
index d3de90432bbed..336368be15e69 100644
--- a/llvm/test/CodeGen/WebAssembly/libcalls.ll
+++ b/llvm/test/CodeGen/WebAssembly/libcalls.ll
@@ -2,7 +2,6 @@
; Test a subset of compiler-rt/libm libcalls expected to be emitted by the wasm backend
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare fp128 @llvm.sqrt.f128(fp128)
diff --git a/llvm/test/CodeGen/WebAssembly/load-store-static.ll b/llvm/test/CodeGen/WebAssembly/load-store-static.ll
index 3ad764a0db612..fa13fa1c0d875 100644
--- a/llvm/test/CodeGen/WebAssembly/load-store-static.ll
+++ b/llvm/test/CodeGen/WebAssembly/load-store-static.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s -check-prefixes=NON-PIC,CHECK
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-emscripten"
@hidden_global = external hidden global i32
diff --git a/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll b/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll
index 3477388f6969e..0edf2086b83ff 100644
--- a/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll
+++ b/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll
@@ -4,7 +4,6 @@
; Currently multivalue returning functions are not supported in Emscripten EH /
; SjLj. Make sure they error out.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
%struct.__jmp_buf_tag = type { [6 x i32], i32, [32 x i32] }
diff --git a/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll b/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
index 3403ce4590728..58a4dc852b9fc 100644
--- a/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
+++ b/llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
@@ -3,7 +3,6 @@
; RUN: llc < %s | FileCheck %s --check-prefix=NONE
; RUN: not --crash llc < %s -enable-emscripten-cxx-exceptions -exception-model=wasm 2>&1 | FileCheck %s --check-prefix=WASM-EH-EM-EH
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; EH: .functype invoke_vi (i32, i32) -> ()
diff --git a/llvm/test/CodeGen/WebAssembly/lower-em-sjlj-sret.ll b/llvm/test/CodeGen/WebAssembly/lower-em-sjlj-sret.ll
index aa5d3cc3d3a12..1ea09d89576ef 100644
--- a/llvm/test/CodeGen/WebAssembly/lower-em-sjlj-sret.ll
+++ b/llvm/test/CodeGen/WebAssembly/lower-em-sjlj-sret.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -enable-emscripten-sjlj -wasm-keep-registers | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
%struct.__jmp_buf_tag = type { [6 x i32], i32, [32 x i32] }
diff --git a/llvm/test/CodeGen/WebAssembly/lower-global-dtors.ll b/llvm/test/CodeGen/WebAssembly/lower-global-dtors.ll
index 82321144611c0..c366f312ed032 100644
--- a/llvm/test/CodeGen/WebAssembly/lower-global-dtors.ll
+++ b/llvm/test/CodeGen/WebAssembly/lower-global-dtors.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck --check-prefix=CHECK --check-prefix=FINI --check-prefix=NULL %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; Test that @llvm.global_dtors is properly lowered into @llvm.global_ctors,
diff --git a/llvm/test/CodeGen/WebAssembly/main-declaration.ll b/llvm/test/CodeGen/WebAssembly/main-declaration.ll
index 966c9f77c4e8b..445300f73fd14 100644
--- a/llvm/test/CodeGen/WebAssembly/main-declaration.ll
+++ b/llvm/test/CodeGen/WebAssembly/main-declaration.ll
@@ -2,7 +2,6 @@
; Test main functions with alternate signatures.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i32 @main()
diff --git a/llvm/test/CodeGen/WebAssembly/main-no-args.ll b/llvm/test/CodeGen/WebAssembly/main-no-args.ll
index db55b8ec1e5fd..b35e962fd50e8 100644
--- a/llvm/test/CodeGen/WebAssembly/main-no-args.ll
+++ b/llvm/test/CodeGen/WebAssembly/main-no-args.ll
@@ -2,7 +2,6 @@
; Test main functions with alternate signatures.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define i32 @main() {
diff --git a/llvm/test/CodeGen/WebAssembly/main-three-args.ll b/llvm/test/CodeGen/WebAssembly/main-three-args.ll
index 77b3e5b8c3063..06e7b0c399a2d 100644
--- a/llvm/test/CodeGen/WebAssembly/main-three-args.ll
+++ b/llvm/test/CodeGen/WebAssembly/main-three-args.ll
@@ -3,7 +3,6 @@
; Test that main function with a non-standard third argument is
; not wrapped.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define i32 @main(i32 %a, i8** %b, i8** %c) {
diff --git a/llvm/test/CodeGen/WebAssembly/main-with-args.ll b/llvm/test/CodeGen/WebAssembly/main-with-args.ll
index 205cb133f8ca6..c6782c3976021 100644
--- a/llvm/test/CodeGen/WebAssembly/main-with-args.ll
+++ b/llvm/test/CodeGen/WebAssembly/main-with-args.ll
@@ -2,7 +2,6 @@
; Test that main function with expected signature is not wrapped
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define i32 @main(i32 %a, i8** %b) {
diff --git a/llvm/test/CodeGen/WebAssembly/masked-shifts.ll b/llvm/test/CodeGen/WebAssembly/masked-shifts.ll
index 8feccaa478fe4..e261f4d218b40 100644
--- a/llvm/test/CodeGen/WebAssembly/masked-shifts.ll
+++ b/llvm/test/CodeGen/WebAssembly/masked-shifts.ll
@@ -3,7 +3,6 @@
;; Check that masked shift counts are optimized out.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define i32 @shl_i32(i32 %v, i32 %x) {
diff --git a/llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll b/llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll
index d3b543017a7a8..8491e246c7f66 100644
--- a/llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll
+++ b/llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll
@@ -2,7 +2,6 @@
; Test memcpy, memmove, and memset intrinsics.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1)
diff --git a/llvm/test/CodeGen/WebAssembly/memory-addr32.ll b/llvm/test/CodeGen/WebAssembly/memory-addr32.ll
index 26e9d4819ac61..5e8456874994a 100644
--- a/llvm/test/CodeGen/WebAssembly/memory-addr32.ll
+++ b/llvm/test/CodeGen/WebAssembly/memory-addr32.ll
@@ -2,7 +2,6 @@
; Test that basic memory operations assemble as expected with 32-bit addresses.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i32 @llvm.wasm.memory.size.i32(i32) nounwind readonly
diff --git a/llvm/test/CodeGen/WebAssembly/memory-addr64.ll b/llvm/test/CodeGen/WebAssembly/memory-addr64.ll
index 7268d166783ad..cc1ecdf5170d9 100644
--- a/llvm/test/CodeGen/WebAssembly/memory-addr64.ll
+++ b/llvm/test/CodeGen/WebAssembly/memory-addr64.ll
@@ -2,7 +2,6 @@
; Test that basic memory operations assemble as expected with 64-bit addresses.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm64-unknown-unknown"
declare i64 @llvm.wasm.memory.size.i64(i32) nounwind readonly
diff --git a/llvm/test/CodeGen/WebAssembly/muloti4.ll b/llvm/test/CodeGen/WebAssembly/muloti4.ll
index e8322627e640b..51ec452535b9c 100644
--- a/llvm/test/CodeGen/WebAssembly/muloti4.ll
+++ b/llvm/test/CodeGen/WebAssembly/muloti4.ll
@@ -2,7 +2,6 @@
; Test that 128-bit smul.with.overflow assembles as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define i128 @call_muloti4(i128 %a, i128 %b) nounwind {
diff --git a/llvm/test/CodeGen/WebAssembly/multi-return.ll b/llvm/test/CodeGen/WebAssembly/multi-return.ll
index a37e71350d526..d4b848c76ff83 100644
--- a/llvm/test/CodeGen/WebAssembly/multi-return.ll
+++ b/llvm/test/CodeGen/WebAssembly/multi-return.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; Return multiple values, some of which will be legalized into multiple values.
diff --git a/llvm/test/CodeGen/WebAssembly/multivalue-stackify.ll b/llvm/test/CodeGen/WebAssembly/multivalue-stackify.ll
index 2ec0dcf037c9b..52a8c686824d3 100644
--- a/llvm/test/CodeGen/WebAssembly/multivalue-stackify.ll
+++ b/llvm/test/CodeGen/WebAssembly/multivalue-stackify.ll
@@ -5,7 +5,6 @@
; Test that the multivalue stackification works
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare {i32} @op_0_to_1()
@@ -3252,4 +3251,3 @@ define void @f429() {
call void @op_2_to_0(i32 %t3, i32 %t4)
ret void
}
-
diff --git a/llvm/test/CodeGen/WebAssembly/multivalue-stackify.py b/llvm/test/CodeGen/WebAssembly/multivalue-stackify.py
index 18424261292e3..50aac5aba8758 100755
--- a/llvm/test/CodeGen/WebAssembly/multivalue-stackify.py
+++ b/llvm/test/CodeGen/WebAssembly/multivalue-stackify.py
@@ -197,7 +197,6 @@ def print_header():
print()
print('; Test that the multivalue stackification works')
print()
- print('target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"')
print('target triple = "wasm32-unknown-unknown"')
print()
for num_uses in range(MAX_OP_USES + 1):
diff --git a/llvm/test/CodeGen/WebAssembly/multivalue.ll b/llvm/test/CodeGen/WebAssembly/multivalue.ll
index aa2313f9ec09f..a0f36ea8265e0 100644
--- a/llvm/test/CodeGen/WebAssembly/multivalue.ll
+++ b/llvm/test/CodeGen/WebAssembly/multivalue.ll
@@ -6,7 +6,6 @@
; Test that the multivalue calls, returns, function types, and block
; types work as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
%pair = type { i32, i64 }
diff --git a/llvm/test/CodeGen/WebAssembly/mutable-globals.ll b/llvm/test/CodeGen/WebAssembly/mutable-globals.ll
index 45b485482c8ca..df698c1a11b82 100644
--- a/llvm/test/CodeGen/WebAssembly/mutable-globals.ll
+++ b/llvm/test/CodeGen/WebAssembly/mutable-globals.ll
@@ -2,7 +2,6 @@
; Test that mutable globals is properly emitted into the target features section
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @foo() {
diff --git a/llvm/test/CodeGen/WebAssembly/negative-base-reg.ll b/llvm/test/CodeGen/WebAssembly/negative-base-reg.ll
index c4f1639f0fa77..9ba25b3e4cff7 100644
--- a/llvm/test/CodeGen/WebAssembly/negative-base-reg.ll
+++ b/llvm/test/CodeGen/WebAssembly/negative-base-reg.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
@args = hidden local_unnamed_addr global [32 x i32] zeroinitializer, align 16
diff --git a/llvm/test/CodeGen/WebAssembly/null-streamer.ll b/llvm/test/CodeGen/WebAssembly/null-streamer.ll
index 2004b7df52e09..f617c0ab6562e 100644
--- a/llvm/test/CodeGen/WebAssembly/null-streamer.ll
+++ b/llvm/test/CodeGen/WebAssembly/null-streamer.ll
@@ -1,7 +1,6 @@
; RUN: llc < %s -O0 -filetype=null -exception-model=wasm -mattr=+exception-handling
; RUN: llc < %s -O0 -filetype=asm -asm-verbose=false -exception-model=wasm -mattr=+exception-handling | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @llvm.wasm.throw(i32, i8*)
diff --git a/llvm/test/CodeGen/WebAssembly/offset-atomics.ll b/llvm/test/CodeGen/WebAssembly/offset-atomics.ll
index 27c2aea48bf10..c8fff288ce626 100644
--- a/llvm/test/CodeGen/WebAssembly/offset-atomics.ll
+++ b/llvm/test/CodeGen/WebAssembly/offset-atomics.ll
@@ -3,7 +3,6 @@
; Test that atomic loads are assembled properly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
;===----------------------------------------------------------------------------
diff --git a/llvm/test/CodeGen/WebAssembly/offset-fastisel.ll b/llvm/test/CodeGen/WebAssembly/offset-fastisel.ll
index 9f10a6af17d47..bf57f69c3f7d5 100644
--- a/llvm/test/CodeGen/WebAssembly/offset-fastisel.ll
+++ b/llvm/test/CodeGen/WebAssembly/offset-fastisel.ll
@@ -2,7 +2,6 @@
; TODO: Merge this with offset.ll when fast-isel matches better.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: store_i8_with_variable_gep_offset:
diff --git a/llvm/test/CodeGen/WebAssembly/offset-folding.ll b/llvm/test/CodeGen/WebAssembly/offset-folding.ll
index 52e32d31ab9a8..8d5a484dda2cf 100644
--- a/llvm/test/CodeGen/WebAssembly/offset-folding.ll
+++ b/llvm/test/CodeGen/WebAssembly/offset-folding.ll
@@ -2,7 +2,6 @@
; Test that constant offsets can be folded into global addresses.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
@x = external dso_local global [0 x i32]
diff --git a/llvm/test/CodeGen/WebAssembly/offset.ll b/llvm/test/CodeGen/WebAssembly/offset.ll
index 8e89f2a02bb2d..1136dbb991767 100644
--- a/llvm/test/CodeGen/WebAssembly/offset.ll
+++ b/llvm/test/CodeGen/WebAssembly/offset.ll
@@ -2,7 +2,6 @@
; Test constant load and store address offsets.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
;===----------------------------------------------------------------------------
diff --git a/llvm/test/CodeGen/WebAssembly/phi.ll b/llvm/test/CodeGen/WebAssembly/phi.ll
index 2412c33602868..cbaf87f413e1d 100644
--- a/llvm/test/CodeGen/WebAssembly/phi.ll
+++ b/llvm/test/CodeGen/WebAssembly/phi.ll
@@ -2,7 +2,6 @@
; Test that phis are lowered.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; Basic phi triangle.
diff --git a/llvm/test/CodeGen/WebAssembly/pr47375.ll b/llvm/test/CodeGen/WebAssembly/pr47375.ll
index 4c04631f26b11..4934c4de0541b 100644
--- a/llvm/test/CodeGen/WebAssembly/pr47375.ll
+++ b/llvm/test/CodeGen/WebAssembly/pr47375.ll
@@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; Regression test for pr47375, in which an assertion was triggering
diff --git a/llvm/test/CodeGen/WebAssembly/reference-types.ll b/llvm/test/CodeGen/WebAssembly/reference-types.ll
index 2d045fe9941d9..d56541db8572e 100644
--- a/llvm/test/CodeGen/WebAssembly/reference-types.ll
+++ b/llvm/test/CodeGen/WebAssembly/reference-types.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -mattr=+reference-types | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: reference-types
diff --git a/llvm/test/CodeGen/WebAssembly/reg-stackify.ll b/llvm/test/CodeGen/WebAssembly/reg-stackify.ll
index 80507b52a0bf6..baeee63e0c7c1 100644
--- a/llvm/test/CodeGen/WebAssembly/reg-stackify.ll
+++ b/llvm/test/CodeGen/WebAssembly/reg-stackify.ll
@@ -6,7 +6,6 @@
; We have two sets of tests, one with registers and implicit locals, and
; a stack / explicit locals based version (NOREGS).
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; No because of pointer aliasing.
diff --git a/llvm/test/CodeGen/WebAssembly/return-address-emscripten.ll b/llvm/test/CodeGen/WebAssembly/return-address-emscripten.ll
index ebd57b69b9b13..6280efe08c4f2 100644
--- a/llvm/test/CodeGen/WebAssembly/return-address-emscripten.ll
+++ b/llvm/test/CodeGen/WebAssembly/return-address-emscripten.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-emscripten"
; This tests the implementation of __builtin_return_address on emscripten
diff --git a/llvm/test/CodeGen/WebAssembly/return-address-unknown.ll b/llvm/test/CodeGen/WebAssembly/return-address-unknown.ll
index 85f3e3eb98d22..bb89650e70999 100644
--- a/llvm/test/CodeGen/WebAssembly/return-address-unknown.ll
+++ b/llvm/test/CodeGen/WebAssembly/return-address-unknown.ll
@@ -1,6 +1,5 @@
; RUN: not llc < %s -asm-verbose=false 2>&1 | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; This tests the implementation of __builtin_return_address on the unknown OS.
diff --git a/llvm/test/CodeGen/WebAssembly/return-int32.ll b/llvm/test/CodeGen/WebAssembly/return-int32.ll
index e25ca94d85e35..590ee1de16d2d 100644
--- a/llvm/test/CodeGen/WebAssembly/return-int32.ll
+++ b/llvm/test/CodeGen/WebAssembly/return-int32.ll
@@ -1,7 +1,6 @@
; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: return_i32:
diff --git a/llvm/test/CodeGen/WebAssembly/return-void.ll b/llvm/test/CodeGen/WebAssembly/return-void.ll
index 8986e1707ab95..4e38ef207e27c 100644
--- a/llvm/test/CodeGen/WebAssembly/return-void.ll
+++ b/llvm/test/CodeGen/WebAssembly/return-void.ll
@@ -1,7 +1,6 @@
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: return_void:
diff --git a/llvm/test/CodeGen/WebAssembly/returned.ll b/llvm/test/CodeGen/WebAssembly/returned.ll
index f0dfde4c1728d..a78b30a1491ce 100644
--- a/llvm/test/CodeGen/WebAssembly/returned.ll
+++ b/llvm/test/CodeGen/WebAssembly/returned.ll
@@ -2,7 +2,6 @@
; Test that the "returned" attribute is optimized effectively.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: _Z3foov:
diff --git a/llvm/test/CodeGen/WebAssembly/select.ll b/llvm/test/CodeGen/WebAssembly/select.ll
index 5bf607cb21aff..53ad565a6454d 100644
--- a/llvm/test/CodeGen/WebAssembly/select.ll
+++ b/llvm/test/CodeGen/WebAssembly/select.ll
@@ -3,7 +3,6 @@
; Test that wasm select instruction is selected from LLVM select instruction.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: select_i32_bool:
diff --git a/llvm/test/CodeGen/WebAssembly/signext-arg.ll b/llvm/test/CodeGen/WebAssembly/signext-arg.ll
index f0b75ed56ef8b..fa595056c840c 100644
--- a/llvm/test/CodeGen/WebAssembly/signext-arg.ll
+++ b/llvm/test/CodeGen/WebAssembly/signext-arg.ll
@@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i32 @get_int(i16 %arg)
diff --git a/llvm/test/CodeGen/WebAssembly/signext-inreg.ll b/llvm/test/CodeGen/WebAssembly/signext-inreg.ll
index 3af90bef20f0c..5778a9418a3d4 100644
--- a/llvm/test/CodeGen/WebAssembly/signext-inreg.ll
+++ b/llvm/test/CodeGen/WebAssembly/signext-inreg.ll
@@ -1,7 +1,6 @@
; RUN: llc < %s -mattr=+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefix=NOSIGNEXT
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: i32_extend8_s:
@@ -63,4 +62,3 @@ define i64 @i64_extend32_s(i32 %x) {
%a = sext i32 %x to i64
ret i64 %a
}
-
diff --git a/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll b/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
index 287645689308b..f5dbfeb78c1db 100644
--- a/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
+++ b/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
@@ -2,7 +2,6 @@
; Test zeroext and signext ABI keywords
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: z2s_func:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-arith.ll b/llvm/test/CodeGen/WebAssembly/simd-arith.ll
index 45bf9f7c85dbb..a5221be266c0f 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-arith.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-arith.ll
@@ -12,7 +12,6 @@
; Test that basic SIMD128 arithmetic operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ==============================================================================
diff --git a/llvm/test/CodeGen/WebAssembly/simd-bitcasts.ll b/llvm/test/CodeGen/WebAssembly/simd-bitcasts.ll
index f6d7c4ec2d1a8..00584ac5976b5 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-bitcasts.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-bitcasts.ll
@@ -3,7 +3,6 @@
; Test that bitcasts between vector types are lowered to zero instructions
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: v16i8_to_v16i8:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-build-pair.ll b/llvm/test/CodeGen/WebAssembly/simd-build-pair.ll
index 3438c49caca1c..f1b5158c19996 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-build-pair.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-build-pair.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=simd128 | FileCheck %s --check-prefixes CHECK
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; Test that BUILD_PAIR dag nodes are correctly lowered.
diff --git a/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll b/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
index 7003714098f25..4fc5481cbdeec 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
@@ -4,7 +4,6 @@
; initialization and splat vector initialization and to optimize the
; choice of splat value works correctly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: same_const_one_replaced_i16x8:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-comparisons.ll b/llvm/test/CodeGen/WebAssembly/simd-comparisons.ll
index 78a1310639690..2c1bd831483d4 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-comparisons.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-comparisons.ll
@@ -3,7 +3,6 @@
; Test SIMD comparison operators
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: compare_eq_v16i8:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-concat.ll b/llvm/test/CodeGen/WebAssembly/simd-concat.ll
index 21fe627f125c1..ede1868917860 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-concat.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-concat.ll
@@ -3,7 +3,6 @@
; Check that all varieties of vector concatenations get lowered to shuffles.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown--wasm"
define <16 x i8> @concat_v8i8(<8 x i8> %a, <8 x i8> %b) {
diff --git a/llvm/test/CodeGen/WebAssembly/simd-conversions.ll b/llvm/test/CodeGen/WebAssembly/simd-conversions.ll
index 11d3750875d95..6a5f9372efaf5 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-conversions.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-conversions.ll
@@ -3,7 +3,6 @@
; Test that vector float-to-int and int-to-float instructions lower correctly
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: convert_s_v4f32:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll b/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll
index f1cd26401a04a..124ec36be643f 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll
@@ -13,7 +13,6 @@
; reduced from a private user bug report, and the vector extracts are
; optimized out via subsequent DAG combines.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-extending.ll b/llvm/test/CodeGen/WebAssembly/simd-extending.ll
index 9ecee61424e40..5cab13c0c61db 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-extending.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-extending.ll
@@ -3,7 +3,6 @@
;; Test that SIMD extending operations can be successfully selected
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define <8 x i16> @extend_low_i8x16_s(<16 x i8> %v) {
diff --git a/llvm/test/CodeGen/WebAssembly/simd-illegal-signext.ll b/llvm/test/CodeGen/WebAssembly/simd-illegal-signext.ll
index 20775f0ee3a54..c4380467cb2f3 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-illegal-signext.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-illegal-signext.ll
@@ -7,7 +7,6 @@
; ReplaceNodeResults to resolve, but the default implementation is to
; abort.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-emscripten"
; CHECK: i32.load8_s
diff --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
index 833f31302f7e0..d1e141999f4fa 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
@@ -5,7 +5,6 @@
; only expected to lower successfully if the simd128 attribute is
; enabled and legal types are used.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ==============================================================================
diff --git a/llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll b/llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll
index a91a864e0421f..26ac45e7162f8 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll
@@ -6,7 +6,6 @@
; TODO: Use the offset field by supporting more patterns. Right now only the
; equivalents of LoadPatNoOffset/StorePatNoOffset are supported.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare <16 x i8> @llvm.wasm.load8.lane(i8*, <16 x i8>, i32)
diff --git a/llvm/test/CodeGen/WebAssembly/simd-load-splat.ll b/llvm/test/CodeGen/WebAssembly/simd-load-splat.ll
index f976ac2630d5d..4ad75f927e546 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-load-splat.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-load-splat.ll
@@ -3,7 +3,6 @@
; Regression test for an ISel failure when a splatted load had more
; than one use. The main tests for load_splat are in simd-offset.ll.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: load_splat:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll b/llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll
index ce3a46248a5a8..97db928a6d60d 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll
@@ -3,7 +3,6 @@
; Test loads and stores with custom alignment values.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ==============================================================================
diff --git a/llvm/test/CodeGen/WebAssembly/simd-load-zero-offset.ll b/llvm/test/CodeGen/WebAssembly/simd-load-zero-offset.ll
index 3c4cc58f5082a..c582e1e5475e9 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-load-zero-offset.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-load-zero-offset.ll
@@ -3,7 +3,6 @@
; Test SIMD v128.load{32,64}_zero instructions
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare <4 x i32> @llvm.wasm.load32.zero(i32*)
diff --git a/llvm/test/CodeGen/WebAssembly/simd-nested-shuffles.ll b/llvm/test/CodeGen/WebAssembly/simd-nested-shuffles.ll
index b72086a2d6cb9..f39711b359e6b 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-nested-shuffles.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-nested-shuffles.ll
@@ -3,7 +3,6 @@
; Check that shuffles maintain their type when being custom
; lowered. Regression test for bug 39275.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK: i8x16.shuffle
diff --git a/llvm/test/CodeGen/WebAssembly/simd-nonconst-sext.ll b/llvm/test/CodeGen/WebAssembly/simd-nonconst-sext.ll
index 8c095aa099740..b8c734ec3aa89 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-nonconst-sext.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-nonconst-sext.ll
@@ -4,7 +4,6 @@
; with SIMD and without sign-ext where ISel would crash if the index
; of the vector extract was not a constant.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32"
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-offset.ll b/llvm/test/CodeGen/WebAssembly/simd-offset.ll
index 43046b8e599dd..b72ded143a296 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-offset.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-offset.ll
@@ -3,7 +3,6 @@
; Test SIMD loads and stores
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ==============================================================================
diff --git a/llvm/test/CodeGen/WebAssembly/simd-reductions.ll b/llvm/test/CodeGen/WebAssembly/simd-reductions.ll
index 500a4495028f0..2fbcec3a779a2 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-reductions.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-reductions.ll
@@ -3,7 +3,6 @@
; Tests that redundant masking and conversions are folded out
; following SIMD reduction instructions.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ==============================================================================
diff --git a/llvm/test/CodeGen/WebAssembly/simd-scalar-to-vector.ll b/llvm/test/CodeGen/WebAssembly/simd-scalar-to-vector.ll
index 506e7f113c56f..70982c763614b 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-scalar-to-vector.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-scalar-to-vector.ll
@@ -20,7 +20,6 @@
; t58: ch = TokenFactor t52, t53, t55, t57
; t24: ch = WebAssemblyISD::RETURN t58
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-select.ll b/llvm/test/CodeGen/WebAssembly/simd-select.ll
index 3a2775a52c020..715e73e6c18f2 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-select.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-select.ll
@@ -3,7 +3,6 @@
; Test that vector selects of various varieties lower correctly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ==============================================================================
diff --git a/llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll b/llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll
index c2f00b349489b..c4b94381e39a6 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll
@@ -3,7 +3,6 @@
; Test that vector sign extensions lower to shifts
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: sext_v16i8:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-shift-complex-splats.ll b/llvm/test/CodeGen/WebAssembly/simd-shift-complex-splats.ll
index 00a963b959ed6..88494c0c6aff2 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-shift-complex-splats.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-shift-complex-splats.ll
@@ -3,7 +3,6 @@
; Test that SIMD shifts can be lowered correctly even with shift
; values that are more complex than plain splats.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
;; TODO: Optimize this further by scalarizing the add
diff --git a/llvm/test/CodeGen/WebAssembly/simd-shuffle-bitcast.ll b/llvm/test/CodeGen/WebAssembly/simd-shuffle-bitcast.ll
index 3e73b47c5a5b8..662a7d74ace84 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-shuffle-bitcast.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-shuffle-bitcast.ll
@@ -4,7 +4,6 @@
; optimizes and lowers to a single splat instruction. Without a custom
; DAG combine, this ends up doing both a splat and a shuffle.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: f32x4_splat:
diff --git a/llvm/test/CodeGen/WebAssembly/simd-unsupported.ll b/llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
index f8b026453ce42..67be6a9c6a551 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
@@ -3,7 +3,6 @@
; Test that operations that are not supported by SIMD are properly
; unrolled.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ==============================================================================
diff --git a/llvm/test/CodeGen/WebAssembly/simd.ll b/llvm/test/CodeGen/WebAssembly/simd.ll
index b915b83cc1329..43d854e8cdd30 100644
--- a/llvm/test/CodeGen/WebAssembly/simd.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd.ll
@@ -3,7 +3,6 @@
; Test that basic SIMD128 vector manipulation operations assemble as expected.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ==============================================================================
diff --git a/llvm/test/CodeGen/WebAssembly/snan_literal.ll b/llvm/test/CodeGen/WebAssembly/snan_literal.ll
index 133f76b7292cf..ec4f6c8cfcbd2 100644
--- a/llvm/test/CodeGen/WebAssembly/snan_literal.ll
+++ b/llvm/test/CodeGen/WebAssembly/snan_literal.ll
@@ -1,5 +1,4 @@
; RUN: llc < %s --filetype=obj | llvm-objdump -d - | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define float @float_sNaN() #0 {
@@ -26,4 +25,3 @@ entry:
; CHECK: 00 00 00 00 00 00 fc 7f
ret double 0x7ffc000000000000
}
-
diff --git a/llvm/test/CodeGen/WebAssembly/stack-insts.ll b/llvm/test/CodeGen/WebAssembly/stack-insts.ll
index 506f43c1a6e51..c31f59202d5c2 100644
--- a/llvm/test/CodeGen/WebAssembly/stack-insts.ll
+++ b/llvm/test/CodeGen/WebAssembly/stack-insts.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-block-placement -verify-machineinstrs | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @foo0()
diff --git a/llvm/test/CodeGen/WebAssembly/store.ll b/llvm/test/CodeGen/WebAssembly/store.ll
index 66012a7a8b7c6..9c4c62a7209d7 100644
--- a/llvm/test/CodeGen/WebAssembly/store.ll
+++ b/llvm/test/CodeGen/WebAssembly/store.ll
@@ -5,7 +5,6 @@
; Test that basic stores are assembled properly.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: sti32:
diff --git a/llvm/test/CodeGen/WebAssembly/swiftcc.ll b/llvm/test/CodeGen/WebAssembly/swiftcc.ll
index dd704b89e2036..f3e684841ece3 100644
--- a/llvm/test/CodeGen/WebAssembly/swiftcc.ll
+++ b/llvm/test/CodeGen/WebAssembly/swiftcc.ll
@@ -1,7 +1,6 @@
; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s --check-prefix=REG
; RUN: llc < %s -asm-verbose=false | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; Test direct and indirect function call between mismatched signatures
@@ -43,4 +42,3 @@ define swiftcc void @bar() {
ret void
}
-
diff --git a/llvm/test/CodeGen/WebAssembly/switch-in-loop.ll b/llvm/test/CodeGen/WebAssembly/switch-in-loop.ll
index c466f291f4751..e3bb0e0b97f3a 100644
--- a/llvm/test/CodeGen/WebAssembly/switch-in-loop.ll
+++ b/llvm/test/CodeGen/WebAssembly/switch-in-loop.ll
@@ -4,7 +4,6 @@
;; bytecode interpreter) lowers reasonably without any irreducible
;; control flow being introduced.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32"
declare void @a(i32*)
diff --git a/llvm/test/CodeGen/WebAssembly/switch-unreachable-default.ll b/llvm/test/CodeGen/WebAssembly/switch-unreachable-default.ll
index af941da577cc2..f20b4c9017cc8 100644
--- a/llvm/test/CodeGen/WebAssembly/switch-unreachable-default.ll
+++ b/llvm/test/CodeGen/WebAssembly/switch-unreachable-default.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; Test that switches are lowered correctly in the presence of an
diff --git a/llvm/test/CodeGen/WebAssembly/tailcall.ll b/llvm/test/CodeGen/WebAssembly/tailcall.ll
index 149105b01b891..d0f39e6416ba8 100644
--- a/llvm/test/CodeGen/WebAssembly/tailcall.ll
+++ b/llvm/test/CodeGen/WebAssembly/tailcall.ll
@@ -4,7 +4,6 @@
; Test that the tail calls lower correctly
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
%fn = type <{i32 (%fn, i32, i32)*}>
diff --git a/llvm/test/CodeGen/WebAssembly/target-features-tls.ll b/llvm/test/CodeGen/WebAssembly/target-features-tls.ll
index f5ec6842de71f..ae5bf4cea9f6f 100644
--- a/llvm/test/CodeGen/WebAssembly/target-features-tls.ll
+++ b/llvm/test/CodeGen/WebAssembly/target-features-tls.ll
@@ -4,7 +4,6 @@
; Test that the target features section contains -atomics or +atomics
; for modules that have thread local storage in their source.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
@foo = internal thread_local global i32 0
diff --git a/llvm/test/CodeGen/WebAssembly/target-features.ll b/llvm/test/CodeGen/WebAssembly/target-features.ll
index f479e12a1afa0..ecb49766659b0 100644
--- a/llvm/test/CodeGen/WebAssembly/target-features.ll
+++ b/llvm/test/CodeGen/WebAssembly/target-features.ll
@@ -6,7 +6,6 @@
; function attributes correctly and that features are enabled for the
; entire module if they are enabled for any function in the module.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
define void @fn_atomics(i32* %p1, float %f2) #0 {
diff --git a/llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll b/llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
index cb20066e14c57..285a44e9197ce 100644
--- a/llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
+++ b/llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
@@ -3,7 +3,6 @@
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten | FileCheck %s --check-prefixes=CHECK,TLS
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten -fast-isel | FileCheck %s --check-prefixes=CHECK,TLS
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-bulk-memory | FileCheck %s --check-prefixes=CHECK,NO-TLS
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ERROR: LLVM ERROR: only -ftls-model=local-exec is supported for now on non-Emscripten OSes: variable tls
diff --git a/llvm/test/CodeGen/WebAssembly/tls-local-exec.ll b/llvm/test/CodeGen/WebAssembly/tls-local-exec.ll
index c6ae34b7fc81b..f863c70be64ad 100644
--- a/llvm/test/CodeGen/WebAssembly/tls-local-exec.ll
+++ b/llvm/test/CodeGen/WebAssembly/tls-local-exec.ll
@@ -1,7 +1,6 @@
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory | FileCheck %s --check-prefixes=CHECK,TLS
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory -fast-isel | FileCheck %s --check-prefixes=CHECK,TLS
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-bulk-memory | FileCheck %s --check-prefixes=CHECK,NO-TLS
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: address_of_tls:
diff --git a/llvm/test/CodeGen/WebAssembly/umulo-i64.ll b/llvm/test/CodeGen/WebAssembly/umulo-i64.ll
index 9e691a3b55fc1..30990845aa0d9 100644
--- a/llvm/test/CodeGen/WebAssembly/umulo-i64.ll
+++ b/llvm/test/CodeGen/WebAssembly/umulo-i64.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
; Test that UMULO works correctly on 64-bit operands.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: _ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE:
@@ -29,4 +28,3 @@ start:
%3 = extractvalue { i64, i1 } %2, 1
ret i1 %3
}
-
diff --git a/llvm/test/CodeGen/WebAssembly/unreachable.ll b/llvm/test/CodeGen/WebAssembly/unreachable.ll
index 120597312e5f2..ad1c90090ac58 100644
--- a/llvm/test/CodeGen/WebAssembly/unreachable.ll
+++ b/llvm/test/CodeGen/WebAssembly/unreachable.ll
@@ -4,7 +4,6 @@
; Test that LLVM unreachable instruction and trap intrinsic are lowered to
; wasm unreachable
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @llvm.trap()
diff --git a/llvm/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll b/llvm/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll
index 51aab7b613b0e..418408bf92c5d 100644
--- a/llvm/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll
+++ b/llvm/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll
@@ -3,7 +3,6 @@
; Test that function pointer casts that require conversions of arguments or
; return types are converted to unreachable.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i32 @has_i64_arg(i64)
diff --git a/llvm/test/CodeGen/WebAssembly/unused-argument.ll b/llvm/test/CodeGen/WebAssembly/unused-argument.ll
index 0ce81bb2c87c3..e37b014599cbb 100644
--- a/llvm/test/CodeGen/WebAssembly/unused-argument.ll
+++ b/llvm/test/CodeGen/WebAssembly/unused-argument.ll
@@ -2,7 +2,6 @@
; Make sure that argument offsets are correct even if some arguments are unused.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: unused_first:
diff --git a/llvm/test/CodeGen/WebAssembly/vector-sdiv.ll b/llvm/test/CodeGen/WebAssembly/vector-sdiv.ll
index 369cf32d95190..4739b3c5c376f 100644
--- a/llvm/test/CodeGen/WebAssembly/vector-sdiv.ll
+++ b/llvm/test/CodeGen/WebAssembly/vector-sdiv.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -fast-isel=false -disable-wasm-fallthrough-return-opt | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; This should be treated as a non-splat vector of pow2 divisor, so sdivs will be
diff --git a/llvm/test/CodeGen/WebAssembly/vtable.ll b/llvm/test/CodeGen/WebAssembly/vtable.ll
index 6a0d902254dd6..644d864a3bc95 100644
--- a/llvm/test/CodeGen/WebAssembly/vtable.ll
+++ b/llvm/test/CodeGen/WebAssembly/vtable.ll
@@ -11,7 +11,6 @@
; struct D : public B;
; Each with a virtual dtor and method foo.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
%struct.A = type { i32 (...)** }
diff --git a/llvm/test/CodeGen/WebAssembly/weak.ll b/llvm/test/CodeGen/WebAssembly/weak.ll
index 9510e02b50661..a1555b69b8cbb 100644
--- a/llvm/test/CodeGen/WebAssembly/weak.ll
+++ b/llvm/test/CodeGen/WebAssembly/weak.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK: .weak f
diff --git a/llvm/test/MC/WebAssembly/array-fill.ll b/llvm/test/MC/WebAssembly/array-fill.ll
index 61cdb91368cf8..2f4bf83205a4d 100644
--- a/llvm/test/MC/WebAssembly/array-fill.ll
+++ b/llvm/test/MC/WebAssembly/array-fill.ll
@@ -2,7 +2,6 @@
; PR33624
source_filename = "ws.c"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
%struct.bd = type { i8 }
diff --git a/llvm/test/MC/WebAssembly/assembler-binary.ll b/llvm/test/MC/WebAssembly/assembler-binary.ll
index b749b19d84c9d..e5dcd270603ea 100644
--- a/llvm/test/MC/WebAssembly/assembler-binary.ll
+++ b/llvm/test/MC/WebAssembly/assembler-binary.ll
@@ -7,7 +7,6 @@
; This specifically tests that we can generate a binary from the assembler
; that produces the same binary as the backend would.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @bar()
diff --git a/llvm/test/MC/WebAssembly/comdat-sections.ll b/llvm/test/MC/WebAssembly/comdat-sections.ll
index bb8421829f01b..8dc63e3c3f6fc 100644
--- a/llvm/test/MC/WebAssembly/comdat-sections.ll
+++ b/llvm/test/MC/WebAssembly/comdat-sections.ll
@@ -26,7 +26,6 @@
; ModuleID = 't.cpp'
source_filename = "t.cpp"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown-wasm"
%struct.S = type { i32 }
diff --git a/llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll b/llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll
index 84d7c537a4f4f..16c24ba2757ae 100644
--- a/llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll
+++ b/llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll
@@ -1,7 +1,6 @@
; RUN: not --crash llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s
; CHECK: data symbols must live in a data section: data_symbol
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
@data_symbol = constant [1024 x i32] zeroinitializer, section ".text", align 16
diff --git a/llvm/test/MC/WebAssembly/debug-byval-struct.ll b/llvm/test/MC/WebAssembly/debug-byval-struct.ll
index 54074ee493b0f..83edeffeaa183 100644
--- a/llvm/test/MC/WebAssembly/debug-byval-struct.ll
+++ b/llvm/test/MC/WebAssembly/debug-byval-struct.ll
@@ -14,7 +14,6 @@
; ModuleID = 't.c'
source_filename = "t.c"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
%union.u = type { i32 }
@@ -113,4 +112,3 @@ attributes #1 = { nofree nosync nounwind readnone speculatable willreturn }
; CHECK-LABEL: DW_TAG_formal_parameter
; CHECK-NEXT: DW_AT_location (DW_OP_fbreg +8)
; CHECK-NEXT: DW_AT_name ("a")
-
diff --git a/llvm/test/MC/WebAssembly/debug-localvar.ll b/llvm/test/MC/WebAssembly/debug-localvar.ll
index 46dd42ea97a8a..0174b7342fc3b 100644
--- a/llvm/test/MC/WebAssembly/debug-localvar.ll
+++ b/llvm/test/MC/WebAssembly/debug-localvar.ll
@@ -2,7 +2,6 @@
; ModuleID = 'debugtest.c'
source_filename = "debugtest.c"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32"
; Function Attrs: noinline nounwind optnone
define hidden i32 @foo(i32 %arg) #0 !dbg !7 {
diff --git a/llvm/test/MC/WebAssembly/file-headers.ll b/llvm/test/MC/WebAssembly/file-headers.ll
index 676494e8b8144..326f193648278 100644
--- a/llvm/test/MC/WebAssembly/file-headers.ll
+++ b/llvm/test/MC/WebAssembly/file-headers.ll
@@ -1,6 +1,5 @@
; RUN: llc -filetype=obj %s -o - | llvm-readobj --file-headers - | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK: Format: WASM{{$}}
diff --git a/llvm/test/MC/WebAssembly/function-alias.ll b/llvm/test/MC/WebAssembly/function-alias.ll
index 83923475fae7f..770beb1d15cd1 100644
--- a/llvm/test/MC/WebAssembly/function-alias.ll
+++ b/llvm/test/MC/WebAssembly/function-alias.ll
@@ -1,7 +1,6 @@
; RUN: llc -filetype=obj %s -o - | llvm-readobj --symbols - | FileCheck %s
; RUN: llc -filetype=obj %s -mattr=+reference-types -o - | llvm-readobj --symbols - | FileCheck --check-prefix=REF %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown-wasm"
@foo = alias i8, bitcast (i8* ()* @func to i8*)
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