[PATCH] D101633: [AMDGPU] Set number vgprs used in PS shaders based on input registers actually used

Sebastian Neubauer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 14 02:17:05 PDT 2021


sebastian-ne added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp:1154-1155
   if (isShader(F.getCallingConv())) {
+    bool ProcessingPS =
+        F.getCallingConv() == CallingConv::AMDGPU_PS && !STM.isAmdHsaOS();
+
----------------
Checking for AMDGPU_PS is enough, having this calling convention in AmdHsaOS would throw an error in SITargetLowering::LowerFormalArguments.
Also, maybe the name `IsPixelShader` is clearer? (It’s called that in AMDGPUAtomicOptimizer.cpp.)


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp:1173
+      // We only need to consider input args up to the last used arg
+      assert((InputEna | InputAddr) && "PSInputAddr and PSInputEnable should "
+                                       "never both be 0 for AMDGPU_PS shaders");
----------------
nit: I think `InputEna || InputAddr` is normally used in conditions.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101633/new/

https://reviews.llvm.org/D101633



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