[PATCH] D105935: WIP: [AArch64][GlobalISel] Legalize bswap <2 x i16>

[Jessica Paquette via Phabricator via llvm-commits]

paquette added inline comments.


================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp:3999
       Register InsertReg = MRI.createVirtualRegister(&AArch64::FPR128RegClass);
+      auto SubImm = [&]() {
+        switch (WideTy.getScalarSizeInBits() * NumElts) {
----------------
This looks similar to `getSubRegForClass`? Maybe it's possible to share some code there?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D105935/new/

https://reviews.llvm.org/D105935